Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

JOB DESCRIPTION

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition

• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.

• Develop ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards.

• Develop directed and constrain-random verification functional tests and simulate using EDA tools to verify functional spec is working

• Execute verification plans, including design bring-up, DV bring-up, regression enabling for all the features.

• Collaborate with digital design team to debug functional testcases and deliver functionally correct designs

The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment

JOB REQUIREMENTS

· BSEE or MSEE, entry level

· Strong communication, analytical and documentation skills and ability to interface with other groups

· Strong VLSI functional verification experience, preferably with exposure to complex, high speed custom VLSI products

· Strong hardware functional verification language and Object-oriental language development skill. Prefer with SystemVerilog/ UVM experience

· Familiar with ASIC verification methodology, tools, and development flow

· Working experience or familiar with Ethernet L2/L3 switch/router, SOC, AMBA bus, high-speed IO (USB-2/3, PCIe gen2/3, SATA), Flash controller, or CPU peripherals

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Position Overview:

As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.

Requirements:

1. Experience in UVM verification methodology

2. Disciplined, quality-minded, and highly driven for excellence,

3. Excellent team player and good communication skills

4. MSEE/BSEE in Electrical Engineering or Computer Engineering, with 3 years of relevant experience, but are open to fresh graduates with outstanding results

5. Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities

6. Experience in video processing and video analytics is a plus

7. Passionate and strong in general programming is a plus

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Job Description

Sea Forrest Engineering Pte Ltd (a subsidiary of BH Global Corporation Ltd) seeking a skilled and experienced Electrical Design and Commissioning Engineer to join our dynamic team specializing in marine vessel electrical propulsion and energy management systems. The ideal candidate will have a strong background in electrical engineering, a deep understanding of marine systems, and a proven track record of designing and commissioning complex electrical systems for marine vessels. This role will involve working on cutting-edge technologies to enhance the performance, efficiency, and reliability of propulsion and control systems for various types of marine vessels.

Responsibilities

1) Electrical Design

• Collaborate with cross-functional teams to define electrical system requirements, specifications, and design criteria for marine vessel propulsion and control systems.
• Develop detailed electrical schematics, wiring diagrams, and layouts using industry-standard design tools.
• Select appropriate electrical components, equipment, and materials to ensure compliance with safety, regulatory, and performance standards.
• Design and implement control logic, automation, and monitoring systems for propulsion and manoeuvring.

2) Commissioning and Integration

• Oversee the installation, integration, and testing of electrical systems on marine vessels during construction or retrofit projects.
• Conduct thorough testing, troubleshooting, and validation of electrical systems to ensure proper functionality and adherence to design specifications.
• Collaborate with shipyard personnel and subcontractors to ensure proper installation and alignment of propulsion and control components.
• Coordinate with project managers to establish commissioning schedules, manage resources, and ensure timely project completion.

3) System Optimization and Performance Enhancement

• Analyse and evaluate the performance of propulsion and control systems, identifying opportunities for optimization, efficiency improvement, and performance enhancement.
• Work closely with the research and development team to implement innovative technologies and solutions to address emerging challenges in marine propulsion and control.

4) Documentation and Reporting

• Create comprehensive technical documentation, including operation manuals, maintenance guides, and as-built drawings for electrical systems.
• Generate commissioning reports, test procedures, and status updates for internal teams, project stakeholders, and clients.

5) Regulatory Compliance and Safety

• Ensure that all designed and commissioned electrical systems comply with relevant maritime regulations, industry standards, and safety guidelines.
• Collaborate with regulatory bodies and classification societies to obtain necessary approvals and certifications for electrical systems.

Requirements

• Diploma or Bachelor's degree in Electrical Engineering or related field.
• Proven experience (5+ years) in electrical design and commissioning, preferably in marine propulsion and control systems.
• Proficiency in electrical design software (e.g., AutoCAD Electrical, EPLAN) and simulation tools.
• Strong knowledge of marine electrical systems, power distribution, propulsion methods, and control strategies.
• Familiarity with marine industry standards (e.g., ABS, DNV, IMO) and relevant regulations.
• Excellent problem-solving skills and ability to troubleshoot complex electrical issues.
• Effective communication skills for collaborating with multidisciplinary teams and presenting technical information to clients and stakeholders.
• Project management skills with the ability to manage priorities, timelines, and resources effectively.
• Willingness to travel to shipyards and vessels for commissioning activities.
• Willingness to travel overseas as required.
• Positive with a can-do attitude.

Interested candidates, do send your resume to [email protected]

**Shortlisted candidates will be notified through email for an interview.

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

We’re looking for a Product Design intern to join us, in empowering people to build their long-term wealth. This is a 6-month, paid position based in SG, where you’ll embed into the design team of 3 Senior Product Designers and 1 Head of Design (all in SG).

As a PD intern at StashAway, you’ll get hands-on experience in product design end-to-end, from user research, to rough wireframe flows, to polished high-fidelity mockups, prototypes and more. You’ll learn and practice different design skillsets as we iterate our mobile app that caters to 5 regions.

This internship offers great exposure to DesignOps, as we are rebuilding the StashAway design system to be more scalable, and improving our team processes along the way. At the same time, we’re constantly releasing improvements to our mobile app. This means you’ll have lots of chances to participate in user research where we talk to customers, and team critiques where we analyse and iterate designs. You’ll also be involved in localising designs, working with our regional teams to manage translations. So, if you’re organised, detail-oriented and a good communicator, you’ll be a great fit for this internship.

It’s an exciting time to be at StashAway and we love what we do. Come join us and learn first-hand how products get built alongside a team of passionate designers.

Responsibilities

• Create and migrate Design System components, with guidance
• Write component documentation and usage guidelines
• Maintain Master Design Files to reflect latest features
• Upload copy to Lokalise for translation
• Support in user research end-to-end, including preparation and execution
• Execute QA of new components and upcoming releases
• Participate in weekly and ad hoc design critiques
• Analyse competitor flows and features

Must-haves

• Strong work ethic
• Enthusiasm and growth mindset
• Working proficiency in Figma
• Writing sample (e.g. academic coursework)
• Sample Figma file

Employee financial well-being

• Management fee discount: you will receive an employee discount on your asset management fees when you invest with StashAway.

Team bonding budget and initiatives

• Quarterly team bonding budget: we encourage you to socialise with colleagues across job functions, departments, and entities to know them better as individuals beyond what they professionally do.

Job Responsibilities:

• Identify project design hazards, construction risks, and constructability issues.
• Develop corresponding mitigation measures together with the project team.
• Chair regular risk mitigation meetings and training with clients and internal parties.
• Advise management on alternative safer and higher productivity construction methodologies.
• Review method statements and risk assessments for safety and construction compliance.
• Attend meetings related to construction progress, risks, etc.
• Any other duties as assigned by the Managements.

Job Requirements:

• Have reasonable exposure in safety and health for construction especially on transportation infrastructure projects in a similar nature
• Attended the Design for Safety (DfS) for Professional Course and passed the assessment or equivalent.
• A registered PE or Architect with a Practicing Certificate OR
• Minimum 10 years relevant experience in the design and the supervision of the construction of structures with at least 5 years in design which includes contributions to designs and writing specification
• Have a degree accepted by PE Board or Board of Architect and construction related degree accepted by Singapore Institute of Surveyors (SISV) and Society of Project Managers (SPM)
• Possess excellent leadership, planning, good management skills, interpersonal communication and negotiation skills
• Have experience in LTA projects have an advantage

JOB DESCRIPTION

· Discussion with system engineers on SoC architecture and feedback on optimization.

· Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc;

· Discussion with synthesis engineer and back-end engineer on design optimization.

· SoC DFT support;

· SoC verification plan and SoC verification support

JOB REQUIREMENTS

· Bachelor’s or Master’s Degree in Electronic Engineering with ASIC design experience.

· Knowledge of ASIC design flow

· Experience in RTL coding, RTL and gate-level debug

· Understanding of DFT, timing and power requirements

· Familiar with UNIX/ Linux environment and scripting

· Good communication and interpersonal skills

· Strong analytical and problem-solving skills

· Knowledge on mixed-signal design would be an advantage.

JOB DESCRIPTION

· Discussion with system engineers on IP requirement and micro architecture.

· Develop IP (control path intensive or data path intensive) meet functional requirement and protocol standard.

· Support SoC designer on integration, timing constraints and power domain setting.

· Support IP verification for verification plan review, test case debugging.

JOB REQUIREMENTS

· Bachelor’s or Master’s Degree in Electronic Engineering with ASIC design experience.

· Experience in IP development (either control path intensive or data path intensive)

· Knowledge of timing, DFT and power structure.

· Familiar with UNIX/ Linux environment and scripting

· Experience on communication IP and/or video IP development would be advantage.

· Good communication and interpersonal skills

· Strong analytical and problem-solving skills

· Experience on communication IP development would be an advantage

· Experience on video IP development would be an advantage

Responsibilities

• Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)
• Verify Logic at ISP level and Digital System level
• Optimize Design for less gate count and low power consumption
• Drive ISP Design activities in close collaboration with ISP Algorithm Team

Requirements

• Minimum MSEE, or BSEE, or related/equivalent discipline
• Experience / knowledge in RTL, C/C++ programming and verification
• Strong debugging and problem-solving skills
• Good communication and interpersonal skills
• Result oriented and embrace change behaviours
• C++/SystemC knowledge with High Level Synthesis experience is a plus.
• Experience / knowledge in CMOS Image Sensor is a plus

JOB DESCRIPTION

· Work with system engineers on timing requirements and feedback on optimization.

· Work on SoC timing constraint, synthesis and timing closure.

· Work on power structure, eg. Isolation of power domains, level-shifter crossing voltage domains

· Conduct formal verification for release comparison.

· Support back-end implementation on timing violation analysis and fix.

· Support scan insertion and optimization.

· Support on power structure and power optimization.

JOB REQUIREMENTS

· Bachelor’s or Master’s Degree in Electronic Engineering with ASIC design experience.

· Familiar with ASIC design flow

· Experience in logic synthesis, static timing analysis, timing closure

· Good understanding of DFT and Power structure.

· Familiar with UNIX/ Linux environment and scripting

· Good communication and interpersonal skills

· Strong analytical and problem-solving skills

Responsibilities:

Your main responsibilities include planning, designing and implementing building projects such as residential & industrial developments, commercial complexes, parks and other township development projects both in the local and overseas markets. You will produce high quality architectural designs and concepts and/or assist in the design work. You will liaise with the clients, other consultants and the local authorities and work with the relevant parties in the authorities' submission, project execution, co-ordination and on-site construction supervision.

Requirements:

• Masters/ Bachelor Degree in Architecture.
• At least 1 year of relevant experience in Singapore.
• Good project management, excellent communication and co-ordination skills, and great conceptualization and presentation skills.
• Strong flair for design using computer-aided design such as AutoCAD. Applicants with Revit/ArchiCad/BIM skills will be preferred

Tasks and Responsibilities

• Assist Section Project Lead in day to day operations.
• Perform the assigned mechanical task under quality and schedule.
• Advise the project’s design mode & standard
• Familiar with Class regulation/rules, product, standard
• Report the project daily discipline (Man-hour/Schedule etc.)
• Able to work with other team members for the overall progress of the project
• Feedback for profession’s design mode & standard
• Train & Guide the other project mechanical engineer (AE or draft man) to work together.
• Study & Solve the project issues under mechanical responsibility
• Attend and report in project and section meeting
• Complete the assigned task for different project drawings or documents.
• Support Project Section Lead in Mechanical Technical issue.
• Coordinate with Shipyard /Consultant / Vendor
• Responsible to Mechanical Project Section Lead/ Mechanical Technical Lead
• Project Handling- New building project, Repair, Upgrading, Conversion project.

Job Requirements

• Minimum 5 years of relevant work experience in the marine/offshore industry Machinery/ Piping new-building engineering design.
• Familiar with Auto-CAD/ Microsoft Office/ AVEVA
• Familiar with Rules and Regulation from Classification Society and Authorities.
• Familiar with theory and calculation of marine/offshore Mechanical & Piping Design.

- Responsible of designing the Electrical system required to operate facility projects.

- Ensure smooth and proper execution of projects/contracts

- Supervision of construction works and co-ordinate with client’s representation, consultants and sub-contractors on technical issues

- Ensure quality of work is achieved and compliance of safety regulations

- Report schedule to Project Manager

- Attend site meeting with contractor on co-ordination and resolution of site problems.

- Must have good knowledge of generator electrical installation

• A1 Main Con
• LTA/Building projects
• 5 working days

Responsibilities:

• Coordinate design drawings with consultants to comply with requirements of the authorities
• Review and provide solutions to technical problems as well as plan, monitor and report shop drawing production progress
• Prepare technical submissions for materials, construction methods and C&S shop drawings
• Resolve construction issues on drawings and liaise closely with Architectural and M&E teams

Requirement:

• Degree in Civil / Structural Engineering or similar
• 3 years of working experience in the related field
• Experience in LTA projects/building projects

Kindly send your updated resume to"[email protected]"

EA Reg. No: R1880058 | Dylan

Responsibilities

• Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)
• Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation
• Verify Logic at ISP level and Digital System level
• Optimize Design for less gate count and low power consumption
• Drive ISP Design activities in close collaboration with ISP Algorithm Team, ISP Design leaders in other sites, and Digital System Design Team
• Leading, supervising and mentoring a team of RTL design engineers

Requirements

• Minimum MSEE, or BSEE, or equivalent, plus 7+ years of Digital Design and verification related experience
• 3+ years project management / people management experience / skill
• Experience / knowledge in CMOS Image Sensor and image signal processing (ISP)
• Experience / knowledge in System C/C++, System Verilog, and Catapult HLS tool.
• Ability to lead teams and collaborate effectively with people in different functions
• Strong time management skills to ensure timely completion of deliverables
• Good communication and interpersonal skills
• Result oriented and embrace change behaviours

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Your Job

As a Product Design Engineer specializing in IO connectors, your primary focus will be on supporting the development and manufacturing of new products. This will involve collaborating with manufacturing teams to review and provide feedback on the feasibility and plant capability of new concepts. You will also conduct analysis activities such as Proof of Concept (POC), Finite Element Analysis (FEA), and Tolerance Analysis to ensure product performance and integrity.

Our Team

You will be reporting to Manager, Product Design

What You Will Do

• Support of new Product Development and manufacturing for IO connectors.
• Review new concepts with manufacturing and provide feedback on feasibility and plant capability
• Support analysis activities such as POC, FEA and Tolerance Analysis
• Provide alternative solutions to resolve gaps in achieving target specifications
• Manage activities related to FOT, FSV and DVP&R testing
• Support existing product already in production or launching.
• Provide Engineering support of customer quality issues to ensure product reliability
• Provide Engineering support to plant for cost reductions and yield improvements
• Create Product Modifications and series expansions to increase market share
• Other duties as assigned by Management

Who You Are (Basic Qualifications)

• Bachelor’s degree in engineering
• 3 years mechanical product design experience with electronic products
• Experienced with product development process
• Understanding of Tolerance analysis, DFMEA, FEA
• Attention to details, be creative, good interpersonal skills to work effectively with internal cross functional teams and external customers
• Self-starter with confidence to initiate action independently

What Will Put You Ahead

• Bachelor’s degree in mechanical engineering and similar work experience
• From connector industries
• 5 years with specific high speed data connector design knowledge in the commercial or consumer space
• Knowledge of SMT design and signal integrity
• Strong mechanical aptitude and experience with clean sheet new product development component design
• Advanced tolerance stack understanding and risk mitigation skills
• Familiar with the component manufacturing environment, understanding of industry quality standards and requirements
• Basic knowledge on component design (injection, diecasting, sheet metal stamping)

At Koch companies, we are entrepreneurs. This means we openly challenge the status quo, find new ways to create value and get rewarded for our individual contributions. Any compensation range provided for a role is an estimate determined by available market data. The actual amount may be higher or lower than the range provided considering each candidate’s knowledge, skills, abilities, and geographic location. If you have questions, please speak to your recruiter about the flexibility and detail of our compensation philosophy.

Who We Are

As a Koch company, Molex is a leading supplier of connectors and interconnect components, driving innovation in electronics and supporting industries from automotive to health care and consumer to data communications. The thousands of innovators who work for Molex have made us a global electronics leader. Our experienced people, groundbreaking products and leading-edge technologies help us deliver a wider array of solutions to more markets than ever before.

At Koch, employees are empowered to do what they do best to make life better. Learn how our business philosophy helps employees unleash their potential while creating value for themselves and the company.

Additionally, everyone has individual work and personal needs. We seek to enable the best work environment that helps you and the business work together to produce superior results.

Your Job

As a Product Design Engineer specializing in IO connectors, your primary focus will be on supporting the development and manufacturing of new products. This will involve collaborating with manufacturing teams to review and provide feedback on the feasibility and plant capability of new concepts. You will also conduct analysis activities such as Proof of Concept (POC), Finite Element Analysis (FEA), and Tolerance Analysis to ensure product performance and integrity.

Our Team

You will be reporting to Manager, Product Design

What You Will Do

• Support of new Product Development and manufacturing for IO connectors.
• Review new concepts with manufacturing and provide feedback on feasibility and plant capability
• Support analysis activities such as POC, FEA and Tolerance Analysis
• Provide alternative solutions to resolve gaps in achieving target specifications
• Manage activities related to FOT, FSV and DVP&R testing
• Support existing product already in production or launching.
• Provide Engineering support of customer quality issues to ensure product reliability
• Provide Engineering support to plant for cost reductions and yield improvements
• Create Product Modifications and series expansions to increase market share
• Other duties as assigned by Management

Who You Are (Basic Qualifications)

• Bachelor’s degree in engineering
• 3 years mechanical product design experience with electronic products
• Experienced with product development process
• Understanding of Tolerance analysis, DFMEA, FEA
• Attention to details, be creative, good interpersonal skills to work effectively with internal cross functional teams and external customers
• Self-starter with confidence to initiate action independently

What Will Put You Ahead

• Bachelor’s degree in mechanical engineering and similar work experience
• From connector industries
• 5 years with specific high speed data connector design knowledge in the commercial or consumer space
• Knowledge of SMT design and signal integrity
• Strong mechanical aptitude and experience with clean sheet new product development component design
• Advanced tolerance stack understanding and risk mitigation skills
• Familiar with the component manufacturing environment, understanding of industry quality standards and requirements
• Basic knowledge on component design (injection, diecasting, sheet metal stamping)

At Koch companies, we are entrepreneurs. This means we openly challenge the status quo, find new ways to create value and get rewarded for our individual contributions. Any compensation range provided for a role is an estimate determined by available market data. The actual amount may be higher or lower than the range provided considering each candidate’s knowledge, skills, abilities, and geographic location. If you have questions, please speak to your recruiter about the flexibility and detail of our compensation philosophy.

Who We Are

As a Koch company, Molex is a leading supplier of connectors and interconnect components, driving innovation in electronics and supporting industries from automotive to health care and consumer to data communications. The thousands of innovators who work for Molex have made us a global electronics leader. Our experienced people, groundbreaking products and leading-edge technologies help us deliver a wider array of solutions to more markets than ever before.

At Koch, employees are empowered to do what they do best to make life better. Learn how our business philosophy helps employees unleash their potential while creating value for themselves and the company.

Additionally, everyone has individual work and personal needs. We seek to enable the best work environment that helps you and the business work together to produce superior results.