• Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
• Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
• Build reusable testbench, constrained-random/directed test cases, and verification associated behavioural modules for both block levels and system levels.
• Use regression strategy, methodology and tool scripts and measure the function coverage.

Requirements:

• Degree in Electrical/Computer Engineering or Computer Science or equivalent.
• At least 5 years of experience in building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification.
• Strong knowledge of UVM/OVM, Semiformal Verification, assertion-based verification, hardware and software co-verification methodology.
• Proficient with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

Geotechnical Engineer

Working Days: 5 Days (Monday – Friday)
Working Hours: 8.30am – 6pm
Location: Near Ubi Mrt
Salary: $3500 - $4200 (Based on experiences)

Job Scope:

• Plan, design, review and prepare drawings & specification & tender document
• Manage technical & engineering matter
• Resolve any technical difficulties & other problems that may rise
• Attending project technical
• Conversant with local codes and regulations Experience in engineering software Geotechnical Engineer
• Geotechnical design, analysis and assessment for ground improvement works, foundation, excavation, earth retaining structures, slope, instrumentation, and site investigation.
• Plan, design, supervise and coordinate for geotechnical/ civil engineering and infrastructural design and site works.
• Ensure all engineering works comply with all relevant statutory standards, regulations, and Codes of Practice.
• Liaison with project stakeholders, clients, other consultants, contractors, relevant authorities.
• Assist Team Leader in maintaining high quality standards of design and supervision

Requirements:

• Bachelor’s Degree in Civil Engineering
• At least 2 – 3 years’ experience with geotechnical

Lee Wan Ling | Reg No: R23116154

THE SUPREME HR ADVISORY PTE LTD | EA No: 14C7279

We are looking for a candidate for high-speed analog integrated circuit design. This candidate will contribute to the development of high linearity silicon photonics modulators for 6G and beyond communication systems. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications
• Design and tapeout ICs which include state-of-the-art circuit blocks, e.g. wideband linear low-noise amplifier and transimpedance amplifier with a focus on circuits interfacing with silicon photonics elements
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electronic Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

Requirements:

- Support the marketing team in strategic, tactical creative plans to drive sales for our business and ensure brand growth through various marketing activities.

- End to end execution and management of marketing campaigns - from content generation to copywriting to compaigns tracking and reporting .

- Strategize, plan, create and deliver quality, engaging social media and digital content for company blog site

- Handle artwork and design

- Contribute ideas, design new artwork and have the expertise to work with a wide range of digital graphi tools to produce high-quality visual communications.

https://t.me/fastrecruitmentsg

Add this telegram group for more details of Work.

• Responsible for RTL design, simulation, and verification for ASIC/SoC products.
• Identify internal and external requirements, PPA study, RTL coding, implementation and work closely with backend team.
• Create reusable internal IPs for AI and/or in-memory computing products.
• Handle IP integration and validation and support post-Si testing and validation.

Requirements:

• Degree in Electrical Engineering or equivalent
• At least 5 years of RTL/SoC/digital design with pre-layout simulation and post-layout simulation experience.
• Strong knowledge with Verilog and system Verilog, VCS, Verdi or other industry standard tools.
• Familiarity with AMBA APB AXI Protocol, RISC/Arm or other core architectures.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

• Identify requirements and features for semiconductor equipment and create concepts and architecture of new equipment.
• Design mechanical systems which involve the selection and use of motors, actuators, gear drives, pumps, and valves.
• Responsible for design verification and validation testing to ensure compliance with specifications, safety regulations and product requirements.
• Create a detailed Mechanical drawing and apply analysis tools like Fish Bone Diagram and FMEA.

Requirements:

• Degree in Mechanical Engineering or equivalent
• At least 5 years of experience in Die Sorter.
• Familiar with 3D CAD software.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R21100996

We are seeking a highly creative and skilled Marketing and Graphic Design Intern to join our Marketing and Communication team for a 3-month internship program. The intern will work closely with the Marketing and Communication Senior Manager to conceptualize, design, and create various marketing collaterals. This role provides an excellent opportunity to gain hands-on experience in a fast-paced professional environment in the financial digital assets industry.

The candidate will also be exposed to the planning and execution of SBI Digital Markets’ brand campaign at the upcoming Singapore Fintech Festival in November 2024.

Principal Duties and Responsibilities:

• Collaborate with the Marketing and Communication Senior Manager to understand project requirements and concepts.
• Design and create visually appealing marketing materials, including but not limited to LinkedIn videos, brochures, posters, banners, social media graphics, and presentations.
• Use Adobe Suite tools, including Illustrator, Photoshop, and InDesign, to bring creative ideas to life.
• Ensure all design elements, layouts, and graphics are visually appealing, cohesive, and on-brand.
• Work independently, manage multiple projects simultaneously, and meet deadlines effectively.
• Amend designs based on feedback and ensure final graphics and layouts are visually appealing and meet the company’s standards.
• Stay updated on emerging design trends and technologies.
• Events planning and management experience will be a plus.

Qualifications & Skills:

• Currently pursuing a Diploma or higher majoring in graphic design / branding.
• Experience and passion for Photography, typography, and layouts (big bonus on illustration).
• Proficient in creative software like Adobe Photoshop, Illustrator, AfterEffects & Premiere, Figma
• A strong design portfolio that best demonstrates your design skills
• Possesses creative flair, coupled with versatility and adaptability
• To be able to participate actively in brainstorming sessions and contribute creative ideas
• A self-starter and a collaborative team player with a positive attitude
• Respects tight timeline and schedules

• Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out.
• Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan.
• Study the physical design methodology of advanced process nodes and builds an automatic physical design platform.

Requirements:

• Degree or above in Electronic Engineering or equivalent.
• At least 5 years of hands-on project in digital backend design experience.
• Familiar with TCL, Perl, or Python script development with EDA tool design.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R1326740

• Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
• Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
• Build reusable testbench, constrained-random/directed test cases, and verification associated behavioural modules for both block levels and system levels.
• Use regression strategy, methodology and tool scripts and measure the function coverage.

Requirements:

• Degree in Electrical/Computer Engineering or Computer Science or equivalent.
• At least 5 years of experience in building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification.
• Strong knowledge of UVM/OVM, Semiformal Verification, assertion-based verification, hardware and software co-verification methodology.
• Proficient with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

• Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
• Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
• Build reusable testbench, constrained-random/directed test cases, and verification associated behavioural modules for both block levels and system levels.
• Use regression strategy, methodology and tool scripts and measure the function coverage.

Requirements:

• Degree in Electrical/Computer Engineering or Computer Science or equivalent.
• At least 5 years of experience in building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification.
• Strong knowledge of UVM/OVM, Semiformal Verification, assertion-based verification, hardware and software co-verification methodology.
• Proficient with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

• Identify requirements and features for semiconductor equipment and create concepts and architecture of new equipment.
• Design mechanical systems which involve the selection and use of motors, actuators, gear drives, pumps, and valves.
• Responsible for design verification and validation testing to ensure compliance with specifications, safety regulations and product requirements.
• Create a detailed Mechanical drawing and apply analysis tools like Fish Bone Diagram and FMEA.

Requirements:

• Degree in Mechanical Engineering or equivalent
• At least 5 years of experience in Die Sorter.
• Familiar with 3D CAD software.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R21100996

• Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out.
• Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan.
• Study the physical design methodology of advanced process nodes and builds an automatic physical design platform.

Requirements:

• Degree or above in Electronic Engineering or equivalent.
• At least 5 years of hands-on project in digital backend design experience.
• Familiar with TCL, Perl, or Python script development with EDA tool design.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R1326740

• Responsible for RTL design, simulation, and verification for ASIC/SoC products.
• Identify internal and external requirements, PPA study, RTL coding, implementation and work closely with backend team.
• Create reusable internal IPs for AI and/or in-memory computing products.
• Handle IP integration and validation and support post-Si testing and validation.

​

Requirements:

• Degree in Electrical Engineering or equivalent
• At least 5 years of RTL/SoC/digital design with pre-layout simulation and post-layout simulation experience.
• Strong knowledge with Verilog and system Verilog, VCS, Verdi or other industry standard tools.
• Familiarity with AMBA APB AXI Protocol, RISC/Arm or other core architectures.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

• Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out.
• Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan.
• Study the physical design methodology of advanced process nodes and builds an automatic physical design platform.

Requirements:

• Degree or above in Electronic Engineering or equivalent.
• At least 5 years of hands-on project in digital backend design experience.
• Familiar with TCL, Perl, or Python script development with EDA tool design.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R1326740

• Responsible for RTL design, simulation, and verification for ASIC/SoC products.
• Identify internal and external requirements, PPA study, RTL coding, implementation and work closely with backend team.
• Create reusable internal IPs for AI and/or in-memory computing products.
• Handle IP integration and validation and support post-Si testing and validation.

​

Requirements:

• Degree in Electrical Engineering or equivalent
• At least 5 years of RTL/SoC/digital design with pre-layout simulation and post-layout simulation experience.
• Strong knowledge with Verilog and system Verilog, VCS, Verdi or other industry standard tools.
• Familiarity with AMBA APB AXI Protocol, RISC/Arm or other core architectures.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

Responsibilities

• Manage ASIC/FPGA project lifecycle, from requirements, design, technical architecture, implementation, testing, acceptance, training, and documentation.
• Maintain close monitoring of project progress and report potential risks and challenges in a timely manner with proposed course of actions.
• Determine and manage resources from start to finish with attention to budgetary limitations.
• Build and maintain relationships with external stakeholders.
• Oversee and/or prepare incoming and outgoing project documentation. • Technical leadership of project team.
• Perform HDL coding, synthesis, verification, timing closure, tapeout for project.

Requirements

• A bachelor’s or master’s degree in engineering or relevant fields.
• Strong team leader and individual contributor.
• Experienced candidate with experience in project management or team lead in product development.
• Experienced in HDL coding, FPGA implementation and ASIC tapeout.

If you are interested in the position , kindly send your CVs to sean.ho(@)randstad.com.sg

Please include your availability, expected salary and reason for leaving current job

We regret that only shortlisted candidates will be contacted

Applicants must be fully vaccinated or have a valid exemption in accordance with MOM’s regulations to allow them to enter the workplace. Applicants may be required to share verifiable COVID-19 vaccination documents or proof of a valid exemption at the point of offer. Randstad Pte. Limited and/or the Client reserves the right to withdraw an offer if the applicant fails to provide verifiable COVID-19 vaccination and/or proof of exemption documents. EA: 94C3609 / Reg: R21103172

Responsibilities:

• Conduct Solution Architecture activities when required on Bids and Projects, in close collaboration with Systems Engineers and reporting to the PDA in that case. In charge of proposing Solution Compliance.
• Support the Solution Orientation Review (SOR) for Bids in collaboration with the Solution Engineering Manager (Bids), Services Engineering and assigned bid team members.
• Propose draft DVa and report to the PDA in terms of Solution definition for allocated Bids/Projects.
• Ensure that the design of the Solution satisfies:
  • Customer needs and contractual requirements for a project,
  • Contractually applicable technical standards,
  • Alignment with the Product Policy,
  • Cost effectiveness, and
  • Applicable design legislation, rules and regulations.
• Ensures, with the support of Specialty Engineering experts & HSE stakeholders that:
  • Solution design takes into account contract requirements in terms of Safety, Security and Human Factors and applicable legislation, rules & regulations, including Environmental/HSE requirements & standards,
  • Related certification activities are performed correctly.
• Particular focus on risks qualification and quantification and mitigation actions at Bid phase and follow-up at Project phase. Risks must be understood and mastered.
• Participate in specific actions plans and dedicated task forces as allocated to solve complex technical problems.
• Contribute to elaborate the TopSKY-ATC product policy through commonalising specific Solutions required by projects and support the HE Product Design Authority in maintaining a rigorous Product policy.
• Take charge of a Technical Speciality when required (e.g. Network & Infrastructure) with the aim to:
  • be the subject-matter expert within the organization,
  • provides a conduit for the sharing of state-of-the-art knowledge across the discipline,
  • be responsible for capitalisation within his/her discipline.
• Pro-actively share knowledge with the experts network inside the AMS Business Line and participate when required into external events in the technical & ATM expert fields to represent Thales AMS.

Requirement:

• Tertiary Qualifications in Engineering
• Degree in computer sciences (minimum Bachelor of Sciences) and network discipline
• 7 years minimum of experience holding positions in systems engineering and/or software engineering and/or integration on complex software-centric real-time systems.
• A proven track-record in supporting the design of Solutions for complex System Of Systems.
• Proven capability to work in a multi-cultural environment and with variety of international customers.
• Experience in the ATM Domain is mandatory.
• Language: fluent English, French would be a plus.
• International work context
• Aptitude to work effectively as part of a team.
• Resilience under pressure.
• Capacity to learn quickly.
• Capability to manage various stakeholders having different objectives.

We are looking for a candidate for high-speed analog integrated circuit design. This candidate will contribute to the development of high linearity silicon photonics modulators for 6G and beyond communication systems. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications
• Design and tapeout ICs which include state-of-the-art circuit blocks, e.g. wideband linear low-noise amplifier and transimpedance amplifier with a focus on circuits interfacing with silicon photonics elements
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electronic Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

• Need experience in Architectural metal works, metal cladding, Ceiling panels, Glass Wall, Glass Railing, Sky lights, Stainless Steel & Aluminium works.
• Planning of shop drawings submission schedule to control the sequence and time frame for development of shop drawings.
• Prepare documents/samples submission schedule to control the sequence and timing for samples submission/approval with preferable float time allowed for procurements.
• Co-ordinate all related design matters with Consultants/ Client.
• Ensure main contract and sub-contract designs co-ordinated fulfil all design requirements.
• Co-ordinate with Contract team for any formal and informal changes made by Consultants.
• Co-ordinate with Contract team for proper sequence of sub-contract awards.
• Resolve technical problems for team.

Interested applicants, please apply online or send your resume in WORD format to [email protected] & [email protected]

Thank you for your application but we regret that only shortlisted candidates will be notified.Design / Technical Manager

We are looking for a candidate for high-speed analog and mixed-signal integrated circuit design. This candidate will contribute to the development of high-speed silicon photonics transceiver for next generation wireline communication system. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications.
• Design and tapeout ICs which include state-of-the-art circuit blocks e.g. analog-to-digital converter, equalizers (CTLE, DFE) as part of the high-speed data link system.
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electrical Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog and mixed-signal IC design methodologies and successful tapeout experience
• Familiar with analog and mixed-signal IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

Mechanical Design Engineer

• Working Hours: Monday-Friday [8.30am - 5.45pm]
• Location: Kaki Bukit
• Salary: $3,000-$4,500

Requirements:

• Degree/Diploma in Mechanical Engineering
• Degree with min 3 years design experience and Diploma with min 4 years design experience
• Good design experience in Machine Automation, Robotic Systems, Material Handling Systems and good to have experience in Fixtures & Tooling.
• Good knowledge on Solid Works / Pro E / AutoCAD
• Must able to travel in short notice & Good in Customer Engineering

Jobs Scope:

• To plan organize, co-ordinate and implement projects in timely manner
• Ensure schedule and requirements are met to customer criteria
• Participation in feasibility studies, quotation, design, product development to presentation.
• Follow up with hand on troubleshooting and training.

Lim Jun Yao

Reg No: R1989028

The Supreme HR Advisory Pte Ltd

EA No: 14C7279