We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a candidate for high-speed analog integrated circuit design. This candidate will contribute to the development of high linearity silicon photonics modulators for 6G and beyond communication systems. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications
• Design and tapeout ICs which include state-of-the-art circuit blocks, e.g. wideband linear low-noise amplifier and transimpedance amplifier with a focus on circuits interfacing with silicon photonics elements
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electronic Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

Responsibilities:

• Conduct Solution Architecture activities when required on Bids and Projects, in close collaboration with Systems Engineers and reporting to the PDA in that case. In charge of proposing Solution Compliance.
• Support the Solution Orientation Review (SOR) for Bids in collaboration with the Solution Engineering Manager (Bids), Services Engineering and assigned bid team members.
• Propose draft DVa and report to the PDA in terms of Solution definition for allocated Bids/Projects.
• Ensure that the design of the Solution satisfies:
  • Customer needs and contractual requirements for a project,
  • Contractually applicable technical standards,
  • Alignment with the Product Policy,
  • Cost effectiveness, and
  • Applicable design legislation, rules and regulations.
• Ensures, with the support of Specialty Engineering experts & HSE stakeholders that:
  • Solution design takes into account contract requirements in terms of Safety, Security and Human Factors and applicable legislation, rules & regulations, including Environmental/HSE requirements & standards,
  • Related certification activities are performed correctly.
• Particular focus on risks qualification and quantification and mitigation actions at Bid phase and follow-up at Project phase. Risks must be understood and mastered.
• Participate in specific actions plans and dedicated task forces as allocated to solve complex technical problems.
• Contribute to elaborate the TopSKY-ATC product policy through commonalising specific Solutions required by projects and support the HE Product Design Authority in maintaining a rigorous Product policy.
• Take charge of a Technical Speciality when required (e.g. Network & Infrastructure) with the aim to:
  • be the subject-matter expert within the organization,
  • provides a conduit for the sharing of state-of-the-art knowledge across the discipline,
  • be responsible for capitalisation within his/her discipline.
• Pro-actively share knowledge with the experts network inside the AMS Business Line and participate when required into external events in the technical & ATM expert fields to represent Thales AMS.

Requirement:

• Tertiary Qualifications in Engineering
• Degree in computer sciences (minimum Bachelor of Sciences) and network discipline
• 7 years minimum of experience holding positions in systems engineering and/or software engineering and/or integration on complex software-centric real-time systems.
• A proven track-record in supporting the design of Solutions for complex System Of Systems.
• Proven capability to work in a multi-cultural environment and with variety of international customers.
• Experience in the ATM Domain is mandatory.
• Language: fluent English, French would be a plus.
• International work context
• Aptitude to work effectively as part of a team.
• Resilience under pressure.
• Capacity to learn quickly.
• Capability to manage various stakeholders having different objectives.

We are looking for a candidate for high-speed analog integrated circuit design. This candidate will contribute to the development of high linearity silicon photonics modulators for 6G and beyond communication systems. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications
• Design and tapeout ICs which include state-of-the-art circuit blocks, e.g. wideband linear low-noise amplifier and transimpedance amplifier with a focus on circuits interfacing with silicon photonics elements
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electronic Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a candidate for high-speed analog and mixed-signal integrated circuit design. This candidate will contribute to the development of high-speed silicon photonics transceiver for next generation wireline communication system. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications.
• Design and tapeout ICs which include state-of-the-art circuit blocks e.g. analog-to-digital converter, equalizers (CTLE, DFE) as part of the high-speed data link system.
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electrical Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog and mixed-signal IC design methodologies and successful tapeout experience
• Familiar with analog and mixed-signal IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a candidate for high-speed analog and mixed-signal integrated circuit design. This candidate will contribute to the development of high-speed silicon photonics transceiver for next generation wireline communication system. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications.
• Design and tapeout ICs which include state-of-the-art circuit blocks e.g. analog-to-digital converter, equalizers (CTLE, DFE) as part of the high-speed data link system.
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electrical Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog and mixed-signal IC design methodologies and successful tapeout experience
• Familiar with analog and mixed-signal IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

Tanglin Mission

Tanglin Trust School Singapore has a long tradition of providing British-based learning with an international perspective. At Tanglin we strive to make every individual feel valued, happy and successful. Responsibility, enthusiasm and participation are actively encouraged and integrity is prized. Working together in a safe, caring yet stimulating environment, we set high expectations whilst offering strong support, resulting in a community of lifelong learners who can contribute with confidence to our world.

Our Vision

We aspire to be the best school in the world with a dynamic learning community which nurtures and inspires every individual to be the best they can be. Our core values of Respect, Responsibility and Purpose are at the heart of everything we do across the school.

The Role

This is a rare and exciting opportunity to join a DT department within a well-established, outstanding school. Our vision is that the department will be modern and forward-thinking, with learning located in authentic contexts, and that the curriculum will reflect the successful candidate’s creative energy. He/she will have outstanding subject knowledge, a passion for designing and will be at the cutting edge of technological innovation within the field. The successful candidate will be a teacher with commitment, integrity and excellent communication skills and a teacher with flexibility, resilience and a caring approach towards students.

Key Responsibilities

1. Learning & Teaching

• Manage an effective, enthusiastic, and safe learning environment.
• Deliver the curriculum to assigned classes in accordance with the timetable.
• Differentiate lessons according to the abilities and learning needs of individual students.
• Promote independent learning by adopting teaching and learning strategies that develop the competence and confidence of every student.
• Seek to develop students’ attributes through the Tanglin Learner Profile, as well as seek opportunities to develop their own attributes through that framework.
• Ensure the thorough implementation of subject specifications, teaching schemes, assessment policies and reporting procedures.
• Create opportunities for students to develop confidence in the subject through carefully planned and managed activities.
• Support a departmental and whole school culture of innovation that includes varied and exciting teaching approaches, technological integration, and thoughtful evaluation.
• Possess the flexibility required to teach a range of materials, topics, and ability levels.
• Possess the flexibility required to teach either pathway (A level or IB) in the Sixth form.

2. Planning & Development

• Take responsibility for at least one aspect of D&T curriculum development each year following discussion and negotiation with the department leadership team (eg, creating a new scheme of work, drafting of departmental policy, organisation of trip).
• Assist the D&T department leadership team in evaluating and developing the new curriculum.
• Take advantage of opportunities for professional development offered by Tanglin.
• Take responsibility for their professional development and that of colleagues by occasionally leading departmental inset or department meetings in an area of expertise.
• Assist the HOD (Head of Department) in identifying areas for development in D&T within the broader aims of the school development plan.
• Collaborate with colleagues in the planning and delivery of schemes of work, including the choice of appropriate teaching and learning methods to meet the needs of the subject and of different pupils.
• Assist the HOD in adapting curriculum content and methods of teaching and examining as appropriate.
• Support a school culture of innovation that includes technological integration.
• Be supportive of and open to the frequent change that characterises a school such as Tanglin.

3. Management of Resources and the Teaching Environment:

• Assist the HOD in identifying appropriate resources within the limits of the departmental budget.
• Assist the HOD in ensuring that departmental rooms present stimulating environments that help to influence pupils’ attitudes positively towards D&T.

4. Assessment, Recording & Reporting

• Ensure students’ work is regularly assessed according to D&T departmental policy and that homework is in line with school policy.
• Report to parents in accordance with the school’s reporting policy as laid down in the Staff Handbook.
• To use information gained from assessment, recording and reporting procedures to generate further improvement in pupil achievement.
• Assist the HOD in the setting and marking of school examinations and to supervise entries for external examinations.

5. Pastoral and Co-Curricular

• Lead the development of the F1 in Schools program in D&T.
• Contribute to co-curricular activities that broaden pupils’ experiences and contribute to the general life of the school.
• When required, take on a form tutor role in the Senior School and fulfil the responsibilities of that position.
• Follow the School’s policies and procedures regarding discipline and behaviour, daily routines, duties, homework, leave of absence, and visits, as laid down in the Staff Handbook.
• Be responsible for reporting any concerns about a child to the Designated Safeguarding Lead.

6. Communication and Liaison

• Help to establish an ability to spot and solve problems and to increase resilience in learning, through your own enthusiasm for the subject.
• Contribute wholeheartedly to D&T department activities such as supporting each school with projects, planning ‘House Day’ activities, ‘Children’s University’ and transition days.
• Attend and contribute to meetings of a professional nature with HOD, HOF, HOY, SSLT and in other circumstances when requested.
• Liaise with the HOD and HOF in respect of pupil records, rewards, and sanctions.
• Maintain appropriate links with teaching colleagues in all sections of the school and foster cross-curricular links where appropriate.
• Liaise with members of the Learning Support Team regarding individual students who may have exceptional needs, to ensure that those needs are understood, planned for and met.
• Liaise with pastoral staff, including form tutors, Heads of Year, the Assistant Heads of School and the Head of Careers on matters pertaining to the study of D&T.
• Contribute to the strengthening of the parent-teacher partnership in individual and whole school initiatives as and when required.
• Assist the HOD in developing effective links with the wider community to extend the study of D&T and enhance teaching and learning.

Job Description:

We are looking for a highly motivated computational scientist with a deep understanding of chemistry/cheminformatics and structural biology to develop new AI models for ligand discovery. You will be working on a large collaborative project to build up A*STAR’s computational drug discovery capabilities. The candidate is expected to be familiar with the latest generative models. Familiarity with molecular docking programs is a plus.

Job Requirements:

• PhD degree in life sciences, chemistry, computational biology, or a related discipline
• Passion for science and research
• Highly motivated
• Proficiency in the use of machine learning frameworks (e.g. PyTorch, TensorFlow)
• Experienced in developing generative models
• Strong knowledge of chemistry/cheminformatics and structural biology
• Able to work independently and as part of a team
• Excellent written and oral communication skills

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Requirements :

1) A Degree in Civil or Structural Engineering from a recognized university or its equivalent recognized by the Professional Engineer Board, Singapore. A diploma holder with design experience will also be considered.

2) Minimum 2 years of design experience in Building projects and/or Earth Retaining Structures.

3) Conversant with local codes and authority submission procedures.

4) Competent in common engineering design software, analytical tools and BIM software.

5) Familiar with precast concrete, post-tensioned concrete and steelwork design, knowledge of MET design will be an advantage.

6) Proactive, responsible and keen to work in a team.

7) Excellent interpersonal, good verbal and written communication skills.

Job Description :

1) Perform Civil/Structural engineering design and analysis.

2) Participate in the BIM process. Involvement in the collaboration with peers and fellow Consultants from other disciplines.

3) Coordinate, monitor and track authority submissions for Projects.

4) Conduct feasibility studies, and inspections and prepare technical reports.

5) Attend meetings and design workshops, when necessary.

6) Liaise with Engineers and/or Consultant teams during the implementation of projects.

Responsibilities:

• Full responsible for Netlist-to-GDS physical design implementation of 12nm/6nm/4nm and below advanced process chips.
• Block owner, take block of 2~3 Million instances, working on Synthesis/APR(auto place and route)/Signoff
• Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners.
• TOP role for the complicated hierarchical chip (more than 20 Million instances plus 500+ macros), doing floorplan and partition, responsible for full chip tapeout

Requirements:

• Bachelor/Master Degree in Electrical/Computer Engineer.
• Experience in physical design with tape-outs.
• Knowledge of complete Netlist-to-GDS flow, Synopsys/Cadence tools like ICC2 or Innovus.
• Good in script programming with Perl, TCL/TK or other languages.

We are looking for a Chef who has rich experience in preparing North Indian Delicacies.

Job Requirements:

· At least 10 years of working experience as North Indian Chef.

· Knowledge about recipes of various Authentic North Indian dishes.

· Rich experience in preparing Indian Soups, Appetizers, Curries and Indian Chinese.

· Experience as Tandoor Chef is added advantage.

· Experience in preparing Indian sweets & desserts.

· Knowledge and Experience to introduce new dishes as “specials of the week".

· Ability to revisit and revise existing menu to better suit the customer needs.

· To cook tasty food using natural spices & healthy ingredients to bring the authentic flavour to dishes.

· To keep track of the stock of groceries, vegetables and meat and order appropriately.

· To avoid food wastage with proper planning.

· To speak English and Hindi fluently.

· To work with great team spirit with other chefs and service staff.

· To maintain kitchen neat and tidy always as per SFA & NEA regulations.

As a member of the Advanced Development team, you will lead the charge for new technology and design solutions for BISSELL products. You will be part of a collaborative innovation and advance development team to drive excellence in investigating and delivering new technology and design solutions for features, functions, and performance of components and sub-systems for products developed by BISSELL.

Responsibilities:

• Drive investigations, development and integration of technology and design solutions into BISSELL products
• Coordinate and converge internal and external organization activities to conclude on the technical and financial feasibility of technology and design solution proposals with the stakeholders in the company.
• Contribute to advance technology design knowledge and capabilities in the organization
• Complete analysis, design, and validation of new technology and design solutions ideas to mature readiness for product integration.
• Document and present investigations with clear data driven conclusions and recommendations that include solution value, limits, trade-offs, costs, risks, and effort.
• Engage with Global Product Marketing and Engineering Teams to review and conclude the feasibility of technology and design solutions proposed.
• Support product engineering teams in the integration and implementation of accepted technology and design solutions.

Qualification:

• Ph.D./Master's degree in Mechanical/ Mechatronics Engineering
• Industry experience is preferred but not required in the case of relevant experience gained through research and academic engagements.

Experience:

• Structural design and fabrication of mechanical components and assemblies.
• Design and fabrication of aerodynamic parts in turbomachinery, i.e. fans, rotors and impellers.
• Experience on single stage or multi-stage turbine design is an added advantage.
• Expertise to work with different materials, eg plastic, metal, etc. Technical acumen to explore new materials is desirable.
• Design with CAD Modelling and Design Tools (Experience in Creo will be an added advantage). Ability to read, understand and generate engineering drawings using CAD tools is a must.
• Able to carry out Aerodynamic CFD simulation. Experience with CFD design and meshing of complex assemblies with Ansys Mechanical and Fluent.
• Working knowledge of mechanical test standards and test execution activities related to area of work.
• Working knowledge for mechanical tolerancing and stack analysis.
• Able to work with Product Lifecycle Management tools (Experience in PTC Windchill will be an added advantage)
• Working knowledge on measurement/analysis of thermal profile of high-speed electromechanical devices is an added advantage.
• Working knowledge on design and fabrication of high speed electromechanical and electromagnetic components cooling solutions is an added advantage.
• Business acumen to analyze and gauge the commercial viability and IP feasibility is desirable.

Competencies:

• You must have passion, energy and a natural curiosity for research, technology and design. You associate yourself with the following characteristics.
• Proactive in learning and capability growth.
• Possess an innovation mindset.
• Able to do analytical and conceptual thinking.
• Structured, creative and self-driven in problem solving.
• Effective communication skills, both written and verbal.
• Good planning and stakeholder management skills.
• Approachable and engaging in collaboration work.
• A good team player and able to work well in a cross functional and international team environment.
• Effective at presenting results and recommendations to stakeholders and senior levels.
• Able to independently plan, manage and drive results and commitments.

Be part of a team in creating state-of-the-art Secure Low Power SoC ARM-based SoC/MCU for the Low-End , Mid and High-End performance MCU product line in a IC Design Environment.

Responsible:

• Engage design team and architects to strategies DFT Test plan for SoC top level
• Create DFT test modes, scan architecture, clocking and reset architecture.
• Plan Pin-Muxing and Pad and Boundary scan (BSDL) generation
• Execute JTAG TAP network generation and verification.
• Quality check with Spyglass analysis for scan using spyglass tool
• Execute Scan insertion using DC / Tessent tools
• Deploy Scan constraints development for Atspeed, shift and slow capture mode.
• Generate ATPG pattern generation using synopsys Tetramax tools
• Analyze and report on test coverage metrics to ensure comprehensive testing of designs.
• Implement improvements to enhance test coverage and efficiency.
• Verify No-timing and SDF simulation of ATPG patterns using VCS and NCSim tools
• Implement MBIST MBIST repair and verification using Mentor Graphic Tessent tools.
• Boundary scan verification
• Generate STIL test patterns for tester
• Silicon bring-up and failure debug

Requirements:

• Requires BSc/MSc or PhD in electrical and electronic or Computer engineering
• Requires > 5 years or more of experience in DFT at IP and SoC top level. Proficient at using DC ,tetramax and MG tessent DFT tools
• Tape-out at least 5 chips and tested to pass on tester.
• Requires strong understanding of state of the DFT methodology , flat and hierarchical implement of DFT from IP to SoC top.
• Capable of understanding UPF to enable multiple power domain verification
• Capable of leading, review and guiding younger DFT engineers in their daily tasks
• Able to work in a team with a strong drive to excel
• Able to work independently on a given assignment and work hard to finish on time
• Good written and communication skills

Founded in 2006, IGG is a leading global mobile games developer and publisher committed to making amazing innovative games for players all over the world. Our games are available in 23 different languages, and are enjoyed by 38 million monthly active users from over 200 countries and regions.

At IGG, we are innovators at work, gamers at heart.

We are currently on the lookout for a Game Design Intern to join us!

Responsibilities:

Collaborate with the game design team to create game concepts, mechanics, and systems

Assist in designing and balancing game levels, and challenges

Conduct playtesting and provide feedback on game mechanics and user experience

Assist in creating and maintaining game design documentation and spreadsheets

Requirements:

Has education background in game design or game development

Proficiency in Unity is a bonus.

Excellent communication and teamwork skills.

Ability to work independently and take initiative.

What’s in it for you!

Excellent projects and team members conducive to personal growth

Vibrant work environment

Well stocked pantry

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

COMPANY DESCRIPTION

Mediacorp is Singapore's largest content creator and national media network, operating a suite of TV channels, radio stations, and multiple digital platforms. Its mission is to engage, entertain, and enrich audiences by harnessing the power of creativity.

We are committed to creating an inclusive and diverse workplace where talent thrives. Our hiring decisions are made based on merit and fit-to-role. If you have a disability or special need which requires accommodation to participate in the recruitment process, please inform us when you submit your online application. We will be happy to support as necessary.

Thank you for your interest and application to this role. Please note that only short-listed candidates will be contacted.

RESPONSIBILITIES

• Prepare meeting materials for production planning such as line-ups, rundowns and location surveys which includes schedule paperwork and camera scripts for Producers.
• Requistion of props and costumes.
• Ensure that all props and costumes are ready for actual filming.
• Manage talents and crew both in Studio and location filming and see to crowd control.
• Prepare production reports.
• Ensure there is continuity of costumes and props during production.
• Follow up on editing such as transfer and logging, dialogue dubbing and transcribing.

• Diploma and Degree graduates or candidates with 2 years of related experience in media are welcome to apply.

COMPANY DESCRIPTION

Mediacorp is Singapore's largest content creator and national media network, operating a suite of TV channels, radio stations, and multiple digital platforms. Its mission is to engage, entertain, and enrich audiences by harnessing the power of creativity.

We are committed to creating an inclusive and diverse workplace where talent thrives. Our hiring decisions are made based on merit and fit-to-role. If you have a disability or special need which requires accommodation to participate in the recruitment process, please inform us when you submit your online application. We will be happy to support as necessary.

Thank you for your interest and application to this role. Please note that only short-listed candidates will be contacted.

RESPONSIBILITIES

• Conduct material and field research and verify facts before scripting for production.
• Provide advice to producers based on the facts/data gathered.
• Build script draft and sequence for content flow and eventually write good quality Chinese scripts for programme.
• Brainstorm interesting programme concepts and do presentation at pitch sessions.
• Source for talent and assess suitability of role based on requirement of programme.
• Source for location and assess for suitability and cost.

• Minimum a degree in education with 2 years of working experience.
• Passionate about the entertainment industry.
• A strong communicator and has a flair for writing.
• Possess good research skills.
• Good command of Chinese language - both written and spoken as you will be attached to the Chinese Entertainment production.
• Effectively bilingual in Mandarin and English to communicate with various departments and organisations.

Job description:

As a member of the filter design team, the successful candidate will play a key design role as a product owner of resonator/filter in development and commercialization of acoustic filters with both BAW and SAW technologies from beginning, concept meeting to end, mass production including characterization.

Experience with either SAW or BAW filter design -layout, simulation, fabrication, and characterization- is required for senior position and principal position is available for candidates with proven track record in ramping up commercialization of acoustics filters in mass production environment.

Responsibilities:

- Co-work with international team across China, Singapore, South Korea, and Europe on a cross-disciplinary team basis

- Use commercial circuit analysis and physical modelling tools as well as custom software packages to design and analyse acoustic filters

- Assist RF measurement analysis by generating test plans and analysing results

- Produce RF engineering reports to support team members

- Communicate with R&D team for co-design and device improvement

Qualifications/Desired skills:

- Track record in design and mass-production of SAW/BAW filters for mobile applications is highly desirable

- Strong skills and working knowledge of design simulation tools, e.g. ADS, AWR, HFSS, COMSOL, etc

- Understanding of RF test parameters and test equipment

- Understanding of filter application and mobile communication system and architecture

- Experience with drawing programs, schematic capture and PCB layout tools

- Experience in RFIC design, RF module and front-end system design is preferred

- Knowledge of MEMS fabrication

- Strong written and verbal English skills to support complex analysis

- Organized team player and a good learner who is open to discussions

UWCSEA Dover has a vacancy for an Art Technician from May 2024. Reporting to the Heads of Art, the successful incumbent will support the Art department and teachers with inventory and the creation and delivery of curriculum needs and materials.

Main Responsibilities

• Preparation of materials and provide classroom support for Teachers (delivery of iPad trolley, inventory and restocking of classroom supplies etc.).
• Assist in classroom routines and curriculum such as mounting/framing and hanging of artwork in the College, including annual Art exhibitions, GCSE exams, College displays etc.
• Conduct and maintain storeroom supply inventory.
• Assist students with technical constructions (i.e. general wood cutting).
• Work with a variety of common workshop tools and maintain the inventory, operation and proper storage of art tools (i.e. ceramics kiln, 3d printer, laser cutter etc. *Training for these tools can be provided.).
• Attend to any other duties as assigned.

Person Specifications

• Minimum Diploma in any related discipline with 2 years of experience.
• Relevant experience as a school art technician is desirable but will consider someone who has a good work history.
• Good initiative, self-management and communication skills.
• Ability to use basic woodcutting tools (i.e. cutting plywood down to standardised sizes)
• Knowledge of laser cutter, 3D printer, ceramics kiln is highly desirable, but some training can be provided.
• Ability to stretch canvas on frames.
• Ability to work independently and as part of a team.
• Approachable, friendly, and willing to assist in problem-solving.
• Able to manage time efficiently and prioritise tasks in the department.
• Physically fit to carry and handle artworks and materials (i.e. 10kg bags of clay).

Application

Apply via our portal by Tuesday, 2 April 2024 at 11:59pm Singapore Time.

The UWC Mission is to make education a force to unite people, nations and culture for peace and a sustainable future. We are committed to creating a community in which all members feel safe and secure, and know that their authentic selves and individual differences are accepted with respect and care. At UWCSEA, we acknowledge that diversity, equity, inclusion and justice (DEIJ) is an ongoing and evolving process and strive to create and sustain a sense of belonging for all members of our community, past, present and future. All qualified applicants, including those who identify as a part of marginalized group(s) and individuals with (dis)abilities are all encouraged to apply. Our school is committed to safeguarding and promoting the welfare of all the students in our care and expects all applicants to share this commitment. We follow safe recruitment practices and all appointments are subject to interview, satisfactory references, identity and criminal record checks.

Responsibilities:

• Manage and support the interior design development and coordination process throughout the design and documentation phases.
• Manage the execution of interior works from tender till completion and handover
• Monitor to ensure resolution of design and technical coordination issues at site
• Review of Contractors’ submissions, work schedules, materials samples, shop drawings etc.
• Conduct site & factory visits, monitoring of quality of on and off-site fabrication
• Monitor and report of interior works progress and qualities, to ensure delivery timeline and workmanship

Requirements:

• Degree in Interior Architecture / Architecture or any related field
• At least 6 years of relevant experience in Interior Design & Site Execution, preferably with premium residential, offices, hotels experiences
• Self-driven, and able to work independently.
• Ability to multi-task and to work under pressure.
• Excellent problem-solving skill.
• Strong organizational, communication and interpersonal skill.
• Proficient in Project Management Programs, AutoCAD, SketchUp, 3D Max, Illustrator or other design programs, Microsoft Excel, Word, etc.

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a candidate for high-speed analog and mixed-signal integrated circuit design. This candidate will contribute to the development of high-speed silicon photonics transceiver for next generation wireline communication system. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications.
• Design and tapeout ICs which include state-of-the-art circuit blocks e.g. analog-to-digital converter, equalizers (CTLE, DFE) as part of the high-speed data link system.
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electrical Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog and mixed-signal IC design methodologies and successful tapeout experience
• Familiar with analog and mixed-signal IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven