Job Summary:

We are seeking an experienced Design Verification Manager to lead our team in verifying complex System-on-Chip (SoC) designs. The ideal candidate will have expertise in IP verification, ARM architecture, and SoC design, as well as experience with UVM, AMBA, and SystemVerilog.

Key Responsibilities:

• Develop and execute comprehensive test plans for SoC IP blocks, including module-level and SoC-level verification
• Design and implement ASIC verification structures using UVM, including stimulus, checkers, assertions, monitors, and scoreboards
• Lead a team of design verification engineers to achieve project goals and deliver high-quality results
• Collaborate with other teams, including design, implementation, and validation, to ensure seamless integration and effective communication
• Develop and maintain documentation for test plans, verification methodologies, and IP blocks

Requirements:

• Bachelor's or Master's degree in Electrical Engineering, Computer Science, or related field
• At least 10 years of experience in design verification, with a focus on SoC IP verification and ARM architecture
• Proven expertise in UVM, AMBA, and SystemVerilog
• Strong knowledge of SoC design principles, including IP block integration and system-level verification
• Experience with test plan development, execution, and analysis
• Familiarity with EDA tools and development flows for ASIC verification
• Excellent communication, analytical, and documentation skills
• Experience with Ethernet L2/L3 switch/router, high-speed IO (USB-2/3/4, PCIe gen2/3/4/5, MIPI CSI-2/DSI-2 and SATA), Flash controller, or CPU peripherals

Technical Skills:

• UVM (Universal Verification Methodology)
• AMBA (Advanced Microcontroller Bus Architecture)
• SoC (System-on-Chip) design principles
• IP verification methodologies
• ARM architecture
• SystemVerilog programming language
• C programming language
• Python scripting language (nice to have)

Leadership Skills:

• Experience leading teams of design verification engineers
• Strong project management skills, including planning, execution, and delivery
• Excellent communication and interpersonal skills
• Able to manage multiple sites

Position Overview:

You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing, neural processing, advanced video analytics accelerators, and the entire Camera Processor SoC. You would be joining the team to explore, evaluate and define innovative design SoC architectures, to meet or exceed the technical requirements of the SoC. You would be responsible for the successful implementation of the designs in Verilog/SystemVerilog coding, metrics measurement to meet key objectives & results, and follow-through in comprehensive verifications to successful silicon.

Requirements:

1. Experience in SoC architecture and design, and RTL coding with Verilog/SystemVerilog

2. Experience in ARM, RISC processor system

3. Experience in embedded C and assembly code programming

4. Experience in analysis of power, timing and area

5. Experience in at least one of scripting languages (e.g. Perl, Python, TCL, or Bash)

6. Disciplined, quality-minded, and highly driven for excellence

7. Excellent team player and good communication skills

8. MSEE/BSEE in Electrical Engineering or Computer Engineering

9. Candidates with relevant experiences would be offered as Staff, taking on higher responsibilities

10. Experience in always-on system, automotive system, secured system, bus interconnect, neural processing, video processing and video analytics is a plus

11. Experience in system modelling and simulation using emulator and SystemC is a plus

12. Passionate and strong in general programming is a plus

Responsibilities

• Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)
• Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation
• Verify Logic at ISP level and Digital System level
• Optimize Design for less gate count and low power consumption
• Drive ISP Design activities in close collaboration with ISP Algorithm Team, ISP Design leaders in other sites, and Digital System Design Team
• Leading, supervising and mentoring a team of RTL design engineers

Requirements

• Minimum MSEE, or BSEE, or equivalent, plus 7+ years of Digital Design and verification related experience
• 3+ years project management / people management experience / skill
• Experience / knowledge in CMOS Image Sensor and image signal processing (ISP)
• Experience / knowledge in System C/C++, System Verilog, and Catapult HLS tool.
• Ability to lead teams and collaborate effectively with people in different functions
• Strong time management skills to ensure timely completion of deliverables
• Good communication and interpersonal skills
• Result oriented and embrace change behaviours

Key Responsibilities

* Design and analyze cabin interior and mechanical components in support of aircraft interior modification projects.

* Develop drawings (e.g. LOPA, installation drawings, production drawings, etc), work instructions, procedures and recommendations.

* Develop engineering substantiation reports (e.g. Weight & Balance, Structural, Flammability reports) and Engineering Authorizations (EAs).

* Coordinate with FAA DERs and DARs, EASA CVEs and/or local civil aviation authorities for any necessary assistance and/or approvals.

* Support interior and mechanical aspects of proposal development, customer and supplier meetings including onsite modification technical support.

* Other duties as assigned.

* Temporary assignment travel of up to 3 months in the US and other countries in Asia is required.

REQUIREMENTS

- Bachelor Degree in Engineering (Aerospace or Mechanical Engineering); Experience in related commercial aircraft field either in cabin interior design or technical services would be an added advantage.

- Able to research and analyze Boeing or Airbus documents (e.g. SRM, IPC, AMM, etc.) as well as Original Equipment Manufacturer (OEM) documents (e.g. Service Bulletins, CMM, etc.).

- Able to create engineering installation and assembly drawings using CATIA V5 or INVENTOR and AutoCAD. The candidate should already understand standard engineering drawing convention such as ASME Y14.5.

- Knowledge of aircraft seating, interior components (e.g. carpets, curtains, galleys, partitions, floor and ceiling structures, etc) and décor materials.

- Knowledge of aircraft structures analysis using both Classical and FEA Methods and ability to use FEA software such as ANSYS/NASTRAN an added advantage.

- Knowledge of FAA CFR 14 Part 25 and equivalent EASA CS Regulations.

- Candidates with at least 3 to 5 years of relevant experience will be considered.

Note: Certain AAR job assignments or facilities may require proof of US Citizenship and the ability to qualify for, and maintain, applicable US Defense Security Service Clearances.

Please email your resume to [email protected] or send it to 7 Changi Business Park Vista, #03-01 SooKee HQ, Singapore 486042 and attention it to the Managing Director of AAR Engineering Services – Asia.

Job Description:

• Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to assist in the production of detailed drawings, the development of quantities, materials lists and cost estimates as required.
• Coordinate with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Assist in the preparation of technical detail for quotations, contract documentation and technical specifications.
• Prepare technical submissions for materials, construction methods and C&S shop drawings.
• Liaise with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Report on work progress during meetings.

Job Requirement:

• Preferably with a Degree in Engineering related studies.
• Minimum 10 years of engineering/design experience
• Excellent written and verbal communication skills with an excellent eye for detail.
• Team Player

Job Description:

• Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to assist in the production of detailed drawings, the development of quantities, materials lists and cost estimates as required.
• Coordinate with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Assist in the preparation of technical detail for quotations, contract documentation and technical specifications.
• Prepare technical submissions for materials, construction methods and C&S shop drawings.
• Liaise with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Report on work progress during meetings.

Job Requirement:

• Preferably with a Degree in Engineering related studies.
• Minimum 10 years of engineering/design experience
• Excellent written and verbal communication skills with an excellent eye for detail.
• Team Player

Job Description:

• Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to assist in the production of detailed drawings, the development of quantities, materials lists and cost estimates as required.
• Coordinate with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Assist in the preparation of technical detail for quotations, contract documentation and technical specifications.
• Prepare technical submissions for materials, construction methods and C&S shop drawings.
• Liaise with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Report on work progress during meetings.

Job Requirement:

• Preferably with a Degree in Engineering related studies.
• Minimum 10 years of engineering/design experience
• Excellent written and verbal communication skills with an excellent eye for detail.
• Team Player

Responsibilities

• Work as Senior Tankage Design Engineers to execute the Tankage Design Engineering of

the Project which includes design of Fixed Roof Tank / Floating Roof Tank as per API 650,

Low Pressure Tank as per API 620, Spherical Tank and Bullets as per ASME Section VIII &

Cryogenic Double Wall Tanks as per API 620 & API 625.

• Preparation, Review & Checking of Tankage Design Documents such as Design Calculation

for Tank, Finite Element Analysis, Tank Data Sheets, Tankage Material specification,

Tankage Fabrication Drawings & ensure Compliance to API 650, API 620, API 625, ASME

Sec VIII, AP 2000 and all Applicable Codes & Standards.

• Prepare all Tankage documents in accordance with project specification. Maintain Design

integrity and quality within the Project Engineering Team

• Preparing Engineering schedule and Engineering man hours estimation to meet project

requirements.

• Coordination with PMC and Construction Coordination.

• Participates in discipline and inter-discipline design check and screening meetings for

compatibility, completeness and correctness in works.

• FEED & Pre-Bid works which involves Feasibility study & MTO estimation works.

• Preparation of Technical Specification for Works and Technical Bid Evaluation

• Technical assistance to construction activities and attending to Site Queries.

• Preparation of Foundation Loading Data.

• Generate 2D construction drawings and data sheet.

• Preparation of purchase requisition for tank accessories such as roof seal, roof drain system,

aluminium dome roof & etc. Preparing technical bid evaluation for item purchased.

Checking vendor’s calculation & construction drawings.

• Checking of construction drawings. Preparation of bill of material for purchasing.

• Preparation of technical queries to client base on design deviation.

• To be proactive in creating a safe working environment for everyone and ensuring that HSE

in-house rules are observed at all times.

• To consider HSE aspects when planning and carrying out tasks to eliminate and reduce

HSE hazards, aspects and risks.

• Any additional Adhoc related work

Qualification

Preferably Bachelor of Engineering (Mechanical)

Experience

Preferably Min. 10 years’ experience in oil and gas.

Software Requirements

• Autocad

• Good proficiency in MS Excel , MS word

Code Knowledge

• API 650/ API 620

• ASME Section VIII D1 & D2

• ASME Section II Part A & D

• ASTM

• NFPA

Design Project Manager - Bringing Creativity to Life with Efficiency

We are seeking a passionate and experienced Design Project Manager to join our team and lead the successful execution of exciting design projects from inception to completion. You will be responsible for overseeing all aspects of the project, from understanding client needs to managing delivery within budget and timeframe.

A Day in the Life:

• Client Relationship Management:

1. Collaborate with clients to clearly define their design aspirations and translate them into a formal design brief.
2. Facilitate seamless communication between the client and internal design team, ensuring client expectations are met and exceeded.
3. Proactively manage client expectations and navigate through any changes or challenges efficiently.

• Project Planning & Execution:

1. Develop comprehensive project plans using MS Project or similar project management software, outlining key milestones, timelines, and resource allocation.
2. Conduct regular meetings with client and internal teams to ensure clear communication, address design queries, and maintain project momentum.
3. Coordinate effectively with internal designers, landlords, architects, engineers, and other stakeholders involved in the project.

• Procurement & Tendering:

1. Identify and recommend qualified consultants to join the project team through a defined RFP process.
2. Assist the client in the tendering process, responding to technical queries, and clarifying project requirements.
3. Evaluate tender submissions, providing well-informed recommendations to the client for informed decision-making.

• Construction & Handover:

1. Facilitate regular stakeholder meetings throughout the construction phase, ensuring open communication and alignment.
2. Document meeting minutes for future reference and action tracking.
3. Manage client change requests, translating them into clear instructions for the project team.
4. Conduct regular site visits to monitor progress, oversee quality control, and address any logistical concerns.
5. Manage testing and commissioning procedures for project readiness.
6. Coordinate final inspections with landlord, consultants and contractors to ensure project compliance.
7. Prepare punch-lists and diligently follow up with contractors to rectify deficiencies.
8. Manage project close-out, including final accounts, handover documentation (as-built drawings, O&M manuals), and training sessions.
9. Oversee reinstatement and move management activities, ensuring a smooth transition to project completion.

What We Are Looking For:

• Minimum of 5 years of experience managing design projects in the Retail/Corporate industry. Junior candidates with demonstrably strong skills and relevant experience in design management may be considered.
• Proven track record of successfully delivering complex design projects on time and within budget.
• Excellent communication, interpersonal, and negotiation skills in both written and verbal formats.
• Strong organizational and time management abilities.
• Proven ability to prioritize tasks, manage multiple projects simultaneously, and adapt to changing circumstances while maintaining deadlines.
• Proficiency in design visualization software (e.g., AutoCAD, Revit), project management software (e.g., MS Project, Primavera), and communication tools (e.g., Microsoft Office Suite). Knowledge of BIM (Building Information Modelling) systems a plus.
• Experience with design procurement and tendering processes.
• Keen understanding of design constructability, able to identify potential constructability issues early in the design process and collaborate with designers to find solutions. Experience working with contractors and understanding how design decisions impact buildability and cost.
• Working knowledge of construction methods, materials, and regulations relevant to the industry. Ability to oversee construction activities, identify potential quality issues, and implement corrective actions promptly.
• PMP certification and/or LEED accreditation highly preferred. Demonstrates commitment to professional development and best practices in project management and sustainability.

Job Description & Requirements

• Responsible to the Principal Engineer, Piping for the preparation of design as per codes / standards and client’s specifications, requisitions for materials, equipment, valves, etc., and for the timely completion of each planned engineering activity assigned to him / her.
• Review of piping specification.
• Review piping stress analysis calculation.
• Review and finalize of piping routing, piping arrangement and support.
• Review design data for missing and / or ambiguities information.
• Reporting project progress to Principal Engineer, Piping on a weekly basis.
• Implementation of Engineering Procedure, drafting Standards and Quality Management.
• Preparation of proposals / estimations for equipment and tankage works.
• Review engineering calculation and technical specifications of storage tanks, pressure vessels and various mechanical equipment.
• Evaluate vendor’s bids and highlight deviations and omissions to purchasing for further clarifications with vendor.
• Perform any other responsibilities as directed by immediate supervisor.

Qualification & Experience generally required

• Bachelor Degree in Engineering.
• Min 8 years relevant working experience in Mechanical engineering in oil and gas sector or offshore sector.
• Know to use spring hanger in stress analysis.
• Proficient in Microsoft Office products, AutoCAD and Caesar ll Stress Analysis Software.
• Prefer to have at least 5 year of piping engineering related working experience.
• Prefer to have experience in Offshore/Shipyard project, Rig building/Ship building.
• Prefer to have experience in FPSO project, both topsides & marine.

Responsibilities

1. Develop design requirements of an NPU given system level specifications.
2. Being part of modelling the performance of the NPU module and its data transaction throughput.
3. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU.
4. Understanding the mathematics of different convolution operators including different arithmetic formats (fixed point and floating point)
5. Estimate, measure and optimize PPA (Performance / Power / Area) to meet key objectives and results.
6. Optimizing micro-architecture design for low power and area is required.
7. Work closely with verification engineers to ensure comprehensive testing and debug issues.
8. Support integration into the overall system, conducting design checks, and addressing lint/timing/CDC issues.
9. Collaborate with software teams to assist in compiler and toolchain development and their debugging.
10. Produce clear and concise design documentation.

Requirements

1. 8+ years of digital design with at least 2 to 3 years of SoC design experience is preferred.
2. At least one cycle of NPU design completion experience is required.
3. Hands on in digital design experience is a must.
4. Preferably has lead a team of at least 3 to 4 people in the past at the capacity of a design lead.
5. Experience in microarchitecture design, and RTL coding with Verilog/ System-Verilog.
6. Experience in synthesis, with analysis of power, timing and area.
7. Disciplined, quality-minded, and highly driven for excellence.
8. Excellent team player and good communication skills.
9. MSEE/BSEE in Electrical Engineering or Computer Engineering.
10. Understanding of convolution operator and number system is required.
11. Candidates with relevant experiences would be offered as Senior, taking on higher responsibilities.
12. Experience in UVM verification methodology is a plus.
13. A plus to have SoC design experience.
14. Experience with optimizing micro-architectures for low-power and low-area is a plus.
15. Knowledge in deep learning algorithms such as CNN / Transformer is a plus.
16. Experience with past design experience with NPU / GPU / DSP design is a plus.
17. Experience with ARM or RISC-V processor systems is a plus.
18. Passionate and strong in general programming is a plus.

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Position Overview:

As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.

Requirements:

1. Experience in UVM verification methodology

2. Disciplined, quality-minded, and highly driven for excellence,

3. Excellent team player and good communication skills

4. MSEE/BSEE in Electrical Engineering or Computer Engineering, with 3 years of relevant experience, but are open to fresh graduates with outstanding results

5. Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities

6. Experience in video processing and video analytics is a plus

7. Passionate and strong in general programming is a plus

• A1 Main Con
• LTA/Building projects
• 5 working days

Responsibilities:

• Coordinate design drawings with consultants to comply with requirements of the authorities
• Review and provide solutions to technical problems as well as plan, monitor and report shop drawing production progress
• Prepare technical submissions for materials, construction methods and C&S shop drawings
• Resolve construction issues on drawings and liaise closely with Architectural and M&E teams

Requirement:

• Degree in Civil / Structural Engineering or similar
• 3 years of working experience in the related field
• Experience in LTA projects/building projects

Kindly send your updated resume to"[email protected]"

EA Reg. No: R1880058 | Dylan

The Information Systems Technology and Design (ISTD) Pillar invites applications to fill several Tenure Track faculty positions. Appointments will be at the Assistant or Associate Professor level. Highly qualified applicants with a substantial track record of research accomplishments, an active research program, and strong teaching experience may be considered for appointment as Tenured Full Professor.

Faculty duties include teaching subjects at the undergraduate and graduate levels, research, supervision of students, advising undergraduate student projects, and service to SUTD and the community. At the start of employment, candidates should hold a Ph.D. in computer science, computer engineering, or a closely related field. Candidates for senior positions must demonstrate the ability to successfully create and manage an independent research program. Exceptional candidates in all areas will be considered, but priority will be given to those in the following areas.

• Artificial intelligence (with a focus on Machine Learning, Multi-agent Systems)
• Systems and networking
• Cyber security

Established in collaboration with MIT, SUTD is the proud host of several world-class centres of excellence in multi-disciplinary research, including the SUTD-MIT International Design Centre (IDC), iTrust Centre for cybersecurity research, Future Communications R&D Programme, Lee Kuan Yew Centre for Innovative Cities (LKYCIC), Digital Manufacturing and Design (DManD) Centre, and Temasek Labs.

Successful candidates can expect internationally competitive remuneration (commensurate with qualifications), assistance for relocation to Singapore, and an attractive startup package for research. Singapore offers many opportunities for external research grants for individual or team-based projects. If you share SUTD’s vision for multi-disciplinary curricula and research with a focus on “Design” in the broadest sense, please contact us. For further information, visit https://istd.sutd.edu.sg or https://www.sutd.edu.sg.

Job Requirements

Please submit your full application package, it should include:

• A cover letter Full resume (with research interest, list of publications)
• Research statement
• Teaching statement
• 3 representative research papers
• Names of 3 references (this should be mentioned in the resume)

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

• Create detailed designs and layouts for steel structures using CAD software (e.g., AutoCAD, Tekla, SolidWorks)
• Develop accurate structural drawings, including framing plans, connection details, and assembly drawings.
• Perform design calculations to ensure structural integrity, load-bearing capacity, and compliance with codes.
• Strong knowledge of steel structure design principles and software (e.g., STAAD.Pro, Tekla, SAP2000).
• Familiarity with construction materials, fabrication processes, and assembly techniques.

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628