Job Description

• Prepare Tender Drawings, Shop Drawings, Construction Drawings, As-Built Drawings, etc.
• Prepare Drawings submission format, including title block, notes and legends, drawing to scale, etc.
• Attend BIM Coordination Meeting
• Support Project Team in managing RFI and making presentation using BIM-Model.
• To monitor, update drawing submission status including compilation and discuss with Project Team.
• All other ad-hoc tasks as assigned by reporting Manager

Job Requirements

• Certificate in Autodesk Autocad and Autodesk Revit MEP Advanced Module
• Diploma/Degree in Mechanical Engineering or equivalent
• At least 3-5 years of working experience in M&E using AutoCAD, Revit and BIM preferably from Construction Industry
• Ability to work independently and target oriented in a stressful environmen

Responsibilities:

• Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• To be lead engineer or assistant lead engineer in new shipbuilding or ship repair/retrofit projects
• Provide specialist technical advice and information to internal and external parties
• Prepare detailed design drawing using 3D modelling tools, such detailed design drawing could include ducting design and necessary design document to enable production of prototype for product development
• Review and approve detailed design drawings and documents e.g., piping isometrics, piping layout, ducting arrangement, equipment foundation, equipment installation, machinery room layout, bill of materials and various mechanical outfitting drawings, and ensure that the deliverables meet contractual technical specification and Classification Society’s requirements
• Ensure the detailed design drawings and documents have met the standards set by the department and provide further input for improvement
• Update 3D software database on a regular basis to ensure correctness and consistency of component’s engineering attribute.
• Manage external consultants in engineering integration and deliverables
• Coordinate and lead a team of engineers to ensure timely and accurate engineering deliverables
• Participate in tests and sea trials, where required
• Liaise with ship owners and Classification Societies to obtain approval on engineering deliverables.
• Resolve technical issues raised by ship owners and Classification Societies
  

Requirements:

• Bachelor’s Degree with Honours in Mechanical/Marine/Offshore/Naval Architecture
• At least 5-8 years experience in engineering design on HVAC (Heating Ventilation and Air Conditioning) system
• Good working experience with HVAC turnkey contractor, HVAC equipment supplier, Shipyard HVAC related department
• Well-articulated in presentations to both clients and senior management, with good command of English, both spoken and written
• Strong leadership with project management and interpersonal skills

Knowledge and Skills:

• Strong knowledge of HVAC marine international design codes, Classification/Statutory Rules and Regulations.
• Engineering and design project management skills.
• Software (preferred): AVEVA Marine, AutoCAD or similar functions
• Software (need basis): VA One, Star CCM+, Aveva PID, Pipeflow Expert

Other Information:

• Location: Benoi Road (Island-wide transport provided)
• 5 days work week
• Working Hours: 7.25am-5pm

RESPONSIBILITY

• Assume a technical expertise in assessing sites, conducting detailed drawings, and estimating Solar project capacity and costs.
• Formulate comprehensive design specifications and functional requirements for the region, ensuring alignment with project needs.
• Complete system designs for projects including site plans, mechanical racking and attachment plans, single-line electrical drawings, specification of balance of system location and interconnection details.
• Conduct in-depth analysis of factors influencing system performance.
• Partner with the O&M Team to evaluate system performance, identify optimization opportunities, and drive continuous improvement initiatives.
• Perform software simulations of solar photovoltaic (PV) system performance & energy production
• Execute design calculations, encompassing voltage drop analysis, fault current assessments, and system optimization strategies.
• Ensure compliance with EPC contract specifications and regulatory requirements, mitigating risks and optimizing project outcomes including on-site engineering support.
• Collaborate closely with contractors to review and approve engineering drawing submissions, maintaining rigorous quality control standards.

QUALIFICATIONS & EXPERIENCE

• Degree/Diploma in Electrical Engineering discipline
• 3 to 5 years’ experience in Solar PV system design / engineering.

SKILLS/COMPETENCIES & PREFERRED CHARACTERISTICS

• Proactive self-starter with an ability to thrive in dynamic environments
• Solution-oriented approach with a track record of overcoming complex challenges and driving innovation
• Collaborative team player and able to guide the drafting team.
• Adaptability and willingness to embrace new technologies and methodologies
• Proficient in Microsoft Office and Excel capabilities for data analysis and reporting
• Proficient in design software such as PV AutoCAD,

Roles and responsibilities:

· To do conceptual and detailed machine design with regard to mechanical aspects;

· To prepare solid models, layouts, views and bills of materials for assigned design machine assemblies and sub-assemblies;

· To prepare final design configurations, layouts, solid models and production/engineering data;

· To assist in preparation of machine documentation, specifications, manual.

Job Requirements:

· Diploma or relevant in Mechanical Engineering;

· Will consider fresh-graduate.

· Preferably with working experience in designing automation systems , jig and fixture ,robotics and conveyor system.

· Proficiency with Solid Works is desirable;

· Ability to lead, manage project and communicate well with customers, vendors, engineers, technicians and team members.

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Job Responsibilities:

• Identify project design hazards, construction risks, and constructability issues.
• Develop corresponding mitigation measures together with the project team.
• Chair regular risk mitigation meetings and training with clients and internal parties.
• Advise management on alternative safer and higher productivity construction methodologies.
• Review method statements and risk assessments for safety and construction compliance.
• Attend meetings related to construction progress, risks, etc.
• Any other duties as assigned by the Managements.

Job Requirements:

• Have reasonable exposure in safety and health for construction especially on transportation infrastructure projects in a similar nature
• Attended the Design for Safety (DfS) for Professional Course and passed the assessment or equivalent.
• A registered PE or Architect with a Practicing Certificate OR
• Minimum 10 years relevant experience in the design and the supervision of the construction of structures with at least 5 years in design which includes contributions to designs and writing specification
• Have a degree accepted by PE Board or Board of Architect and construction related degree accepted by Singapore Institute of Surveyors (SISV) and Society of Project Managers (SPM)
• Possess excellent leadership, planning, good management skills, interpersonal communication and negotiation skills
• Have experience in LTA projects have an advantage

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Job description and scopes:

1. Oversee and supervise C&S design, including authoring submissions and coordinating with consultants and architects and architects
2. Design Coordination with Consultant, Client , AC, Inter-Disciplines (MEICA & BS) and Sub Contractors
3. Design Package preparation for MEICA Equipment Plinth and Bolts design
4. Prepare & update Schedules for Architectural Authority Submission & ST Submissions
5. Prepare & update Schedules for Submissions of Deliverables list
6. Prepare RFI & RFC for CSA related items
7. Prepare the workflow of QPD / QPS Roles
8. Prepare the BCA Permit forms for site commencement
9. Review and comments of Architectural authority Submission drawings (such as URA, FSSD, PUB, LTA, NEA ,etc…)
10. Review and comments of BCA Submission of Civil, Structural and Geotechnical work (ST Submissions)
11. Review and comments of IFC drawings , which are extracted from 3D Model
12. Review and comments of Shop drawings, developed by Sub-contractors for Construction
13. Review and comments of Design Drawings and Calculations of Miscellaneous design
14. Review and comments of QA / QC documents
15. BIM 3D Model review and Comments and clash resolutions
16. Follow up on Prolog Submissions
17. Follow up with Inter-disciplines leads for Design Input information for C&S design
18. Change Register for design change control
19. Preparing RFQ Packages for CSA items ( Design Drawings & Specifications ) to Procurement
20. Monitor Site construction Progress & addressing site issues
21. Assist and attending BIM Model Walk-through, Hazop , Almop and Dfs, PSR and Risk management Work shops
22. Co-ordinate and Attending Monthly Progress Meeting & CSA progress meeting with Client & Consultant , and Main QP
23. Co-ordinate and attending SOCT Meeting with potential sub-contractors & suppliers
24. Prepare MOM of CSA Meeting, presentation slides for Monthly progress meeting & preparing Monthly progress report for CSA updates
25. Verifying Claims from design consultant
26. Prefer to assis on the Role of Lifting Engineer , review Lifting plans and approval of Lifting Permit

Requirements (Qualification & Experience):

• With relevant experience in managing similar complexity and scale
• Applicants with Lifting Engineer certification will be preferred

JOB DESCRIPTION

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition

• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.

• Develop ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards.

• Develop directed and constrain-random verification functional tests and simulate using EDA tools to verify functional spec is working

• Execute verification plans, including design bring-up, DV bring-up, regression enabling for all the features.

• Collaborate with digital design team to debug functional testcases and deliver functionally correct designs

The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment

JOB REQUIREMENTS

· BSEE or MSEE, entry level

· Strong communication, analytical and documentation skills and ability to interface with other groups

· Strong VLSI functional verification experience, preferably with exposure to complex, high speed custom VLSI products

· Strong hardware functional verification language and Object-oriental language development skill. Prefer with SystemVerilog/ UVM experience

· Familiar with ASIC verification methodology, tools, and development flow

· Working experience or familiar with Ethernet L2/L3 switch/router, SOC, AMBA bus, high-speed IO (USB-2/3, PCIe gen2/3, SATA), Flash controller, or CPU peripherals

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Job Description

• Develop and create 2D and 3D piping layouts, plans, isometrics, ensure that piping designs are optimized for efficiency, ease of maintenance, and compliance with project and industry standards
• Create detailed piping layouts and general arrangements for the plant, ensuring that pipe routing minimizes interference with other disciplines (civil, mechanical, electrical) and optimizes space utilization
• Collaborate with stress engineers to ensure pipe routing and support arrangements can handle thermal expansion, seismic loads, and pressure differential
• Prepare detailed piping design deliverables, including pipe routing layouts, support details, isometric drawings, and bill of materials (BOM). Ensure designs comply with all relevant standards
• Collaborate with process, mechanical, civil, and electrical teams to ensure seamless integration of piping designs with other plant systems
• Work closely with the procurement team to prepare piping material specifications, liaise with suppliers for quotation and support vendor evaluations for piping components (valves, flanges, supports, etc.)
• Review piping installation drawings and provide feedback for improvement to ensure constructability
• Conduct site visits as needed to verify piping installations are in accordance with the approved designs

Requirements

• Diploma/Degree in Mechanical Engineering
• For Degree holder, minimum 5 years of experience in piping design. For Diploma holder, minimum 8 years of experience is required. For senior position, candidate must have at least 10 years of experience
• Must be a self-starter and be able to work with minimal supervision, make sound decisions, take independent action, and provide focused solutions to assigned projects
• Possess strong inter-personal and communication skills and be able to work well with people at all levels in the organization
• In-depth knowledge of piping design codes and standards (ASME, ANSI, PUB regulations)
• Must have advanced computer literacy in commonly usedsoftware applications such as Navisworks, Bentley View, AutoCAD, piping design & drafting tools and MS Office
• Experience in process plant (such as wastewater treatment plant, sludge incineration plant, etc.) is preferred

Job Description:

You will be responsible for the design of innovative, high-performance, and reliable high-speed analog ICs for SerDes applications. These products aim to enable the next-generation of data communication systems using high speed wireline transmission, empowering the ever growing digital revolution. You will work within a group of design experts interfacing with layout, overseas design teams to create detailed specifications, innovative designs to meet the technological requirements.

Key responsiblities:

• Planning and designing of high speed analog IC for Serdes application based on design requirements
• Perform circuit simulation and optimization to meet specification
• Prepare and discuss circuit, results of design in design reviews
• Conduct IC verification and debugging to ensure silicon perform according to design.
• Work with layout engineer for device level design to realize best circuit response
• Work with application engineers to support customer application issues

Requirements:

• Minimum Bachelor's degree in Electrical/Electronics engineering or equivalent.
• Possess experience working in IC design environment
• Good knowledge in CMOS analog circuit design/processes
• Good knowledge in High-Speed Interfaces design and be willing to take on the challenge of creating cutting-edge new technology by anticipating market trends and product evolution.
• Posess good knowledge in analyzing and designing High-Speed Interface PHY, ADC, PLL, Clock and data recovery (CDR),Equalization and signal integrity optimization, Ampllfiers, reference voltages etc.
• Experience in developing IC and proficient in design tools usage (Cadence/Synopsys, Custom Compiler/Fine Sim)
• Good communication skills and ability to work in a team

Job Responsibilities:

• Create specifications and define software architecture for embedded systems.
• Design and develop MCU based firmware for embedded system.
• Design and develop middleware, application and GUI in Windows, embedded Linux or other environments.
• Work closely with other engineers to analyze and resolve bugs.
• Analyze performance bottleneck and optimize product quality and throughput.

Job Requirements:

• Master or degree in computer science, computer engineering or electronic engineering, or equivalent
• At least 5 years direct relevant experience for the senior engineer position.
• Fresh graduates with relevant knowledge or experience are welcome.
• Experience in MCU firmware or embedded Linux development.
• Firmware development experience with STM32 family is a plus.
• Good understanding in hardware and ability to develop low level codes.
• Strong programming experience in C/C++. Rich experience on embedded software development is a plus.
• Good knowledge in software debugging and performance optimization.
• Good experience in embedded systems based on ARM Cortex-M or Cortex-A series processors.
• Familiar with ISO13485 or IEC 62304 design process, source version control and bug tracking system is an advantage.
• Independent and resourceful.

Job Summary:

We are seeking an experienced Design Verification Manager to lead our team in verifying complex System-on-Chip (SoC) designs. The ideal candidate will have expertise in IP verification, ARM architecture, and SoC design, as well as experience with UVM, AMBA, and SystemVerilog.

Key Responsibilities:

• Develop and execute comprehensive test plans for SoC IP blocks, including module-level and SoC-level verification
• Design and implement ASIC verification structures using UVM, including stimulus, checkers, assertions, monitors, and scoreboards
• Lead a team of design verification engineers to achieve project goals and deliver high-quality results
• Collaborate with other teams, including design, implementation, and validation, to ensure seamless integration and effective communication
• Develop and maintain documentation for test plans, verification methodologies, and IP blocks

Requirements:

• Bachelor's or Master's degree in Electrical Engineering, Computer Science, or related field
• At least 10 years of experience in design verification, with a focus on SoC IP verification and ARM architecture
• Proven expertise in UVM, AMBA, and SystemVerilog
• Strong knowledge of SoC design principles, including IP block integration and system-level verification
• Experience with test plan development, execution, and analysis
• Familiarity with EDA tools and development flows for ASIC verification
• Excellent communication, analytical, and documentation skills
• Experience with Ethernet L2/L3 switch/router, high-speed IO (USB-2/3/4, PCIe gen2/3/4/5, MIPI CSI-2/DSI-2 and SATA), Flash controller, or CPU peripherals

Technical Skills:

• UVM (Universal Verification Methodology)
• AMBA (Advanced Microcontroller Bus Architecture)
• SoC (System-on-Chip) design principles
• IP verification methodologies
• ARM architecture
• SystemVerilog programming language
• C programming language
• Python scripting language (nice to have)

Leadership Skills:

• Experience leading teams of design verification engineers
• Strong project management skills, including planning, execution, and delivery
• Excellent communication and interpersonal skills
• Able to manage multiple sites

JOB DESCRIPTION

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition

• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.

• Develop ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards.

• Develop directed and constrain-random verification functional tests and simulate using EDA tools to verify functional spec is working

• Execute verification plans, including design bring-up, DV bring-up, regression enabling for all the features.

• Collaborate with digital design team to debug functional testcases and deliver functionally correct designs

The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment

JOB REQUIREMENTS

· BSEE or MSEE, entry level

· Strong communication, analytical and documentation skills and ability to interface with other groups

· Strong VLSI functional verification experience, preferably with exposure to complex, high speed custom VLSI products

· Strong hardware functional verification language and Object-oriental language development skill. Prefer with SystemVerilog/ UVM experience

· Familiar with ASIC verification methodology, tools, and development flow

· Working experience or familiar with Ethernet L2/L3 switch/router, SOC, AMBA bus, high-speed IO (USB-2/3, PCIe gen2/3, SATA), Flash controller, or CPU peripherals

JOB DESCRIPTION

· Work on SoC architecture discussion and optimization with architect; SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc;

· Work on SoC floorplan with architect and APR; SoC power check; SoC timing constraints and review support; SoC DFT support; SoC verification plan and SoC verification support

JOB REQUIREMENTS

· Bachelor’s or Master’s Degree in Electronic Engineering with ASIC design experience.

· Experience with ASIC design flow

· Experience in RTL coding, RTL and gate-level simulation, logic synthesis, static timing analysis, timing closure and verification

· Good understanding of DFT

· Familiar with UNIX/ Linux environment and scripting

· Good communication and interpersonal skills

· Strong analytical and problem-solving skills

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Roles & Responsibilities

• To work as the Design Engineer to our LTA projects.
• To review of contractor’s Design and Construction submission and comment.
• To assist the SDE in the review of design submissions.
• To attend design meeting and all other relevant meetings as and when required.
• To give suggestion in construction sequence based on the design reviews.
• To follow PGI on rotational basis with the SDE.
• To review Shop Drawings and comment if any.
• To prepare Independent Design Reports.
• To visit site and review compliance with design requirements.

Requirements

• At least five (5) years of relevant experience on projects similar in nature to the Works in the Civil Contract.
• At least five (5) years in the design of structural and/or geotechnical works for deep excavation projects of a similar size and complexity.
• Experience in working in a structural engineering team within a large multi discipline project team.
• Experience in minimum facility platform design and including the substructure, topsides and bridges.
• Ability to meet agreed deadlines.
• Possess excellent interpersonal skills and ability to work as part of team.
• Familiarity of Singapore local codes & standards.

Interested applicants are invited to submit your updated resume, stating current/expected salaries to: [email protected]

We regret to inform that only short-listed candidates will be notified.

Position Overview:

You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing, neural processing, advanced video analytics accelerators, and the entire Camera Processor SoC. You would be joining the team to explore, evaluate and define innovative design SoC architectures, to meet or exceed the technical requirements of the SoC. You would be responsible for the successful implementation of the designs in Verilog/SystemVerilog coding, metrics measurement to meet key objectives & results, and follow-through in comprehensive verifications to successful silicon.

Requirements:

1. Experience in SoC architecture and design, and RTL coding with Verilog/SystemVerilog

2. Experience in ARM, RISC processor system

3. Experience in embedded C and assembly code programming

4. Experience in analysis of power, timing and area

5. Experience in at least one of scripting languages (e.g. Perl, Python, TCL, or Bash)

6. Disciplined, quality-minded, and highly driven for excellence

7. Excellent team player and good communication skills

8. MSEE/BSEE in Electrical Engineering or Computer Engineering

9. Candidates with relevant experiences would be offered as Staff, taking on higher responsibilities

10. Experience in always-on system, automotive system, secured system, bus interconnect, neural processing, video processing and video analytics is a plus

11. Experience in system modelling and simulation using emulator and SystemC is a plus

12. Passionate and strong in general programming is a plus

Responsibilities:

• Create mixed-signal verification and coverage strategies tailored to complex IC designs, aligning with design architecture and specifications.
• Construct verification testbenches using standard verification languages and methodologies, ensuring comprehensive coverage.
• Author and execute test cases to validate mixed-signal circuits, focusing on functionality, performance, and reliability.
• Analyze verification results meticulously, offering constructive feedback to design teams for improvements.
• Collaborate closely with design and layout teams to pinpoint and resolve any design issues encountered during verification.
• Innovate and refine verification methodologies, tools, and techniques to enhance scalability and portability.
• Provide final sign-off on mixed-signal designs, ensuring readiness for tape-out.

Requirements:

• Bachelor’s degree in electrical & electronic or equivalents and with minimum 7 years of working experience.
• Proficient in analog and mixed-signal circuit design and verification principles.
• Capability to formulate test plans, deliver presentations on findings, and communicate effectively with cross-functional teams.
• Familiarity with verification methodologies and tools including simulators, waveform viewers, automated execution, simulation time optimization, and coverage analysis.
• Proficient in programming abilities, capable of crafting efficient scripts or programs in languages such as Perl, Python, and/or C.

__________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

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Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Are you a talent looking to build business skills, gain experience, and take on exciting challenges?

Grow your career with Trelleborg and start shaping the industry from the inside.

About the Job

Trelleborg Singapore is looking for an excellent Design Engineer to join the Research and Development team. Reporting to the Engineering Director, you will be responsible to finish the design, modelling & drafting work allocated to you by your seniors in an efficient and timely manner. This job will entail completion of 3D models and engineering drawings, maintaining work documentation and keeping all projects organized. The duties and responsibilities of the Design Engineer is not limited to those listed below and are subject to change as per needs of the business.

• Provide engineered design & engineering to clients from conceptual design till award of the project.
• Efficiency run and maintain innovative finite element analysis tools within Trelleborg Group and its associated companies.
• Innovative and creative to promote and launch new product line to increase market share and profitability.
• Key collaboration with Sales & Marketing, Procurement, Technical, Production and customers to achieve agreement and clarification for new product design specifications. Implement work in accordance with applicable project procedures and standards.
• Establishment of the design work requirements for submission. The design work are drawings, engineering data sheets, design & engineering specification solution documents.
• Review design work together with the FEED design consultants/engineers and ensure that in order for submission.
• Attend engineering clarification meetings as and when required and also assist QA/QC to address engineering issues and establish method statements. Oversee new products' testing, new testing standard & procedure preparation and analyse results.
• Able to attend short overseas assignments when required.

About the Ideal Candidate

• Ideally a bachelor’s degree in Engineering or equivalent; minimum 2 years’ experience in engineering design
• Proven excellent skill in usage of CAD Solidworks and FEA Abaqus
• Have a good understanding of product realization process from development to production
• Strong Project Management skills
• An excellent teammate able to work well with all levels of people across various regions and cultures
• Good problem solving and interpersonal skills
• Good time management, proactive and able to work effectively in a fast-paced environment
• Ideally has knowledge and experience in the maritime, infrastructure, engineering or manufacturing environments but if no formal professional exposure, the candidate must demonstrate a keen interest in learning and acquiring the relevant industry knowledge to build compelling content
• Strong project and vendor leadership skills
• Possesses high level of integrity with good work ethics

Trelleborg is an equal opportunity employer! We celebrate diversity and are committed to creating an inclusive environment for all employees.

Don’t delay, apply today by submitting your CV along with your expected salary and notice period!

At Trelleborg our people are #shapingindustryfromtheinside

Responsibilities

1. Develop design requirements of an NPU given system level specifications.
2. Being part of modelling the performance of the NPU module and its data transaction throughput.
3. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU.
4. Understanding the mathematics of different convolution operators including different arithmetic formats (fixed point and floating point)
5. Estimate, measure and optimize PPA (Performance / Power / Area) to meet key objectives and results.
6. Optimizing micro-architecture design for low power and area is required.
7. Work closely with verification engineers to ensure comprehensive testing and debug issues.
8. Support integration into the overall system, conducting design checks, and addressing lint/timing/CDC issues.
9. Collaborate with software teams to assist in compiler and toolchain development and their debugging.
10. Produce clear and concise design documentation.

Requirements

1. 8+ years of digital design with at least 2 to 3 years of SoC design experience is preferred.
2. At least one cycle of NPU design completion experience is required.
3. Hands on in digital design experience is a must.
4. Preferably has lead a team of at least 3 to 4 people in the past at the capacity of a design lead.
5. Experience in microarchitecture design, and RTL coding with Verilog/ System-Verilog.
6. Experience in synthesis, with analysis of power, timing and area.
7. Disciplined, quality-minded, and highly driven for excellence.
8. Excellent team player and good communication skills.
9. MSEE/BSEE in Electrical Engineering or Computer Engineering.
10. Understanding of convolution operator and number system is required.
11. Candidates with relevant experiences would be offered as Senior, taking on higher responsibilities.
12. Experience in UVM verification methodology is a plus.
13. A plus to have SoC design experience.
14. Experience with optimizing micro-architectures for low-power and low-area is a plus.
15. Knowledge in deep learning algorithms such as CNN / Transformer is a plus.
16. Experience with past design experience with NPU / GPU / DSP design is a plus.
17. Experience with ARM or RISC-V processor systems is a plus.
18. Passionate and strong in general programming is a plus.

Position Overview:

As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.

Requirements:

1. Experience in UVM verification methodology

2. Disciplined, quality-minded, and highly driven for excellence,

3. Excellent team player and good communication skills

4. MSEE/BSEE in Electrical Engineering or Computer Engineering, with 3 years of relevant experience, but are open to fresh graduates with outstanding results

5. Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities

6. Experience in video processing and video analytics is a plus

7. Passionate and strong in general programming is a plus