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Analog/Mixed-Signal Verification Engineer (Semiconductor/Mixed-Signal Design/Analog Design)

Full-time
Singapore, Singapore
Engineering
5 days ago
Responsibilities: Create mixed-signal verification and coverage strategies tailored to complex IC designs, aligning with design architecture and sp..

Official account of Jobstore.

Mechanical Design Engineer (Automation Machine Design) - JD1506

Full-time
Singapore, Singapore
Engineering
2 weeks ago
Job Info: Salary: Basic up to $4000 + AWS + VB Working Hours: Monday - Friday (8:30am - 5:30pm) Location: Woodlands North MRT Job Scope: De..

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Design Verification Engineer (SoC/ASIC/RTL)

Full-time
Singapore, Singapore
Art / Design / Entertainment
1 week ago
Responsibilities: Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design. Esta..

Official account of Jobstore.

RTL Design Engineer (ASIC/SOC/Digital Design/Verilog/System Verilog)

Full-time
Singapore, Singapore
Art / Design / Entertainment
2 weeks ago
Responsibilities: Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness. Integrate and validate IP bl..

Official account of Jobstore.

Risk Management Facilitator (RMF)/ Design for Safety (DfS) Professional

Full-time
Singapore, Singapore
Art / Design / Entertainment
1 week ago
Job Responsibilities: Identify project design hazards, construction risks, and constructability issues. Develop corresponding mitigation measures..

Official account of Jobstore.

Manager / Senior Electrical & Instrumentation Design Engineer

Full-time
Singapore, Singapore
F&B / Tourism / Hospitality
2 weeks ago
Job Responsibilities: Assisting and supporting technical sales team in terms of scope of supplies and costing with respect to electrical, automatio..

Official account of Jobstore.

Senior Mechanical Design Engineer - Quantum Sensors

Full-time
Singapore, Singapore
Engineering
2 weeks ago
Are you interested in joining a team that is revolutionizing the resource exploration and navigation industry? Atomionics is developing quantum sensor..

Official account of Jobstore.

Design Verification Engineer (SOC/ASIC/Verilog)

Full-time
Singapore, Singapore
Art / Design / Entertainment
2 weeks ago
Responsibilities: Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design. Esta..

Official account of Jobstore.

RTL Design Engineer (ASIC/SOC/Digital Design/Verilog/System Verilog)

Full-time
Singapore, Singapore
Art / Design / Entertainment
2 weeks ago
Responsibilities: Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness. Integrate and validate IP bl..

Official account of Jobstore.

Senior/Staff ISP RTL Design Engineer

Full-time
Singapore, Singapore
Art / Design / Entertainment
2 weeks ago
Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP..

Official account of Jobstore.

MANAGER, SOLUTION DESIGN

Full-time
Singapore, Singapore
Others
2 weeks ago
OVERVIEW Responsible for designing and delivering customized logistics solutions that meet client needs and align with the company’s strategic goal..

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Senior Electrical Design Engineer

Full-time
Singapore, Singapore
Art / Design / Entertainment
2 weeks ago
Job Description& Responsibilities: · Responsible for advanced optical module/ethernet product hardware system and circuit design, provide design ..

Official account of Jobstore.

Mixed-Signal Verification Engineer (Semiconductor Front-End Design/Complex IC Designs)

Full-time
Singapore, Singapore
Engineering
4 days ago
Responsibilities: Create mixed-signal verification and coverage strategies tailored to complex IC designs, aligning with design architecture and sp..

Official account of Jobstore.

Mixed-Signal Verification Engineer (Semiconductor Front-End Design/Complex IC Designs)

Full-time
Singapore, Singapore
Engineering
1 week ago
Responsibilities: Create mixed-signal verification and coverage strategies tailored to complex IC designs, aligning with design architecture and sp..

Official account of Jobstore.

Design Verification Engineer (SOC/ASIC/Verilog)

Full-time
Singapore, Singapore
Art / Design / Entertainment
2 weeks ago
Responsibilities: Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design. Esta..

Official account of Jobstore.

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

Full-time
Singapore, Singapore
Art / Design / Entertainment
2 weeks ago
Responsibilities: Collaborate with Senior Engineers for design requirements and specifications. Assist in Analog, mixed-signal, and digital IC de..

Official account of Jobstore.

Electrical/ Solar Design Engineer

Full-time
Singapore, Singapore
Art / Design / Entertainment
3 weeks ago
RESPONSIBILITY Assume a technical expertise in assessing sites, conducting detailed drawings, and estimating Solar project capacity and costs. ..

Official account of Jobstore.

Senior Piping Design Engineer

Full-time
Singapore, Singapore
Art / Design / Entertainment
3 weeks ago
Job Description Develop and create 2D and 3D piping layouts, plans, isometrics, ensure that piping designs are optimized for efficiency, ease of ma..

Official account of Jobstore.

Electrical/ Solar Design Engineer

Full-time
Singapore, Singapore
Art / Design / Entertainment
3 weeks ago
RESPONSIBILITY Assume a technical expertise in assessing sites, conducting detailed drawings, and estimating Solar project capacity and costs. ..

Official account of Jobstore.

ISP RTL Design Engineer

Full-time
Singapore, Singapore
Art / Design / Entertainment
3 weeks ago
Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Verify Log..

Official account of Jobstore.

(Senior) ISP RTL Design Manager

Full-time
Singapore, Singapore
Art / Design / Entertainment
3 weeks ago
Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP..

Official account of Jobstore.

Design Engineer

Full-time
Singapore, Singapore
Art / Design / Entertainment
3 weeks ago
Job Description: Experienced in structural engineering design works mainly for road/viaduct projects. Supervision of drafting for the preparation..

Official account of Jobstore.

Design Engineer

Full-time
Singapore, Singapore
Art / Design / Entertainment
3 weeks ago
Job Description: Experienced in structural engineering design works mainly for road/viaduct projects. Supervision of drafting for the preparation..

Official account of Jobstore.

Senior Design Engineer

Full-time
Singapore, Singapore
Art / Design / Entertainment
3 weeks ago
Job Description: Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to ass..

Official account of Jobstore.

Marine System Design Engineer

Full-time
Singapore, Singapore
Information Technology
3 weeks ago
As a Marine Design Engineer, you will own engineering responsibilities for all Cavotec’s shipboard shore power retrofit projects. Type of retrofit c..

Official account of Jobstore.

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