Carbon Capture Composite Materials

Recruitment for Research Assistant / Research Engineer / Senior Research Assistant

A research assistant position is available at the Singapore University of Technology and Design. The successful candidate will work on the design and synthesis of composite materials for carbon capture applications. The research assistant should have experience in composite material synthesis and fabrication using solution chemistry methods. Desired skills include demonstrated experience with solution-based chemical synthesis, surface functionalization of materials (e.g., ligand exchange, polymer grafting), or polymeric composite fabrication methods. Additionally, the research engineer will also be working closely with the engineering team to implement an innovative gas separation system. The research engineer will also be involved in the development of customized lab-based and field tests to evaluate the performance of the material.

Job Requirements:

• Possesses a Bachelor or Master’s degree in Chemistry/Materials Science/Chemical Engineering or relevant field
• Excellent written and oral communication in English
• Able to work and learn independently and in teams in a multidisciplinary setting
• Possess a high level of personal initiative and motivation

Specific Responsibilities

• Fabrication and characterization of materials
• Lab-based and field tests of composite systems
• Assist with research lab maintenance and safety, as well as managing of lab equipment
• Drafting of professional reports and presenting results to the research team on a regular basis

How to Apply

Applicants should send the following documents:

1. curriculum vitae,
2. two references and
3. a writing sample or examples of any published works including final year projects or thesis to Prof. Mei-Chee Tan, [email protected]

We have several available postdoctoral and research assistant positions at the Singapore University of Technology and Design (SUTD) to work in the area of Robotics. This position focus on supporting the design of algorithm for various robotics applications.

Qualification:
- Relevant Degree in Electrical Engineering, , Mechanical Engineering, Robotics, or related areas
- Strong hands on experience Preference will be given to those with prior robotics project experience such as:
1) SLAM;
2) ROS;
3) Sensor fusion;
4) Machine Learning;
5) Mobile platforms (eg: wheeled robots, legged robots); and
6) Manipulators

Applications, assembled as a single PDF file, should contain a complete resume, full list of publications, as well as the names and contact information of up to three references.

Interested applicants may send his/her CV to Assoc/Prof U-Xuan Tan via email ( [email protected] ). Review of applications will continue until the position is filled. Only shortlisted candidates will be notified.

We are seeking a skilled Mechanical Engineer to join our team in developing the chassis and mechanical components for a state-of-the-art portable MRI system. This role involves the design and integration of high-precision mechanical components, electronic housings, and thermal management systems, focusing on optimizing manufacturability and durability for portability.

The ideal candidate will have expertise in CAD, additive manufacturing (AM) processes, and a strong background in mechanical design for high-tech medical devices or electronics enclosures.

• Design and develop the MRI chassis and mechanical housing for electronic components, ensuring that all designs meet specifications for strength, weight, thermal stability, and compliance. Ensure designs are optimized for manufacturability and assembly, using knowledge of advanced manufacturing techniques.
• Develop detailed CAD models, assemblies, and technical drawings of chassis, mounts, and enclosures using CAD software SolidWorks. Conduct finite element analysis (FEA) and other simulations to assess structural integrity, thermal performance, and material suitability.
• Lead efforts in prototyping, working with AM processes (SLS, SLA, MJF, DMLS, etc.), CNC,or traditional methods to create high-fidelity prototypes.
• Troubleshoot and solve design issues identified during testing, iterating quickly to improve reliability and performance.

Required/Desired Skills

• CAD Proficiency: Advanced skills in 3D CAD software (SolidWorks, Creo, or equivalent) with experience in generating fully constrained assemblies.
• Manufacturing Knowledge: Strong understanding of AM techniques, post-processing methods, and experience working with CNC, sheet metal, and injection moulding.
• Problem-Solving: Demonstrated experience in root cause analysis, DFMEA, and quick iteration on designs to address complex engineering challenges.
• Testing & Analysis: Hands-on experience with FEA tools, prototyping, and validation testing.
• Soft Skills: Strong communication skills, detail-oriented, and ability to work in a cross-functional team environment.

Required/Desired Qualifitaion & Experience

• Bachelor’s or master’s degree in mechanical engineering, Mechatronics, or a related field.
• 3+ years of experience in mechanical design, preferably with medical devices, high-tech enclosures, or electronics housings.

Email to: [email protected] for more information.

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***We do not charge our candidates any referral fee nor bind them with any contract.***

Abby Pang

Deputy Consulting Director (APAC)

Reg no.: R2093867

EA No: 13C6684

Thank you for your interest in this position. Our shortlisting period is 3 working days. Only shortlisted candidates will be contacted for further consideration.

If you do not receive communication from us within this timeframe, it's likely that your application has not been shortlisted by our client. In such cases, we recommend that you continue your job search to maximize your opportunities. We wish you all the best and should we have any suitable roles that match your experiences/ qualifications/ preferences, we will reach out to you.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME's advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME's heterogeneous integration platform.

Job Description:

Digital IC Design and system-level exploration:

• Contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.
• Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.
• Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.
• RTL implementation for custom circuit design using Verilog/SystemVerilog
• Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architectures.

Simulation, Verification, and Implementation:

• Conduct thorough simulation and verification of digital designs to validate functionality and performance.
• Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration
• Perform timing analysis and collaborate with the team to optimize designs for timing closure.
• Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

Prepare detailed design documentation, including specifications, test plans, and reports.

Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements:

• Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME's advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME's heterogeneous integration platform.

Job Description:

Digital IC Design and system-level exploration:

• Contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.
• Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.
• Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.
• RTL implementation for custom circuit design using Verilog/SystemVerilog
• Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architectures.

Simulation, Verification, and Implementation:

• Conduct thorough simulation and verification of digital designs to validate functionality and performance.
• Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration
• Perform timing analysis and collaborate with the team to optimize designs for timing closure.
• Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

Prepare detailed design documentation, including specifications, test plans, and reports.

Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements:

• Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

• Manage all accounting transactions
• Prepare budget forecasts
• Publish financial statements in time
• Handle monthly, quarterly and annual closings
• Reconcile accounts payable and receivable
• Ensure timely bank payments
• Compute taxes and prepare tax returns
• Manage balance sheets and profit/loss statements
• Report on the company’s financial health and liquidity
• Audit financial transactions and documents
• Reinforce financial data confidentiality and conduct database backups when necessary
• Comply with financial policies and regulations

• Plan and coordinate administrative procedures and systems and devise ways to streamline processes
• Recruit and train personnel and allocate responsibilities and office space
• Assess staff performance and provide coaching and guidance to ensure maximum efficiency
• Ensure the smooth and adequate flow of information within the company to facilitate other business operations
• Manage schedules and deadlines
• Monitor inventory of office supplies and the purchasing of new material with attention to budgetary constraints
• Monitor costs and expenses to assist in budget preparation
• Oversee facilities services, maintenance activities and tradespersons (e.g electricians)
• Organize and supervise other office activities (recycling, renovations, event planning etc.)
• Ensure operations adhere to policies and regulations
• Keep abreast with all organizational changes and business developments

We are looking for one (1) Research Fellow for research activities in the following areas:

1. Theory and computational modeling of electromagnetism in media, plasmonic systems, and metamaterials, including cavity quantum electrodynamics.
2. Inverse design in nanophotonics or quantum nanophotonics.
3. Application of plasma modeling tools like particle-in-cell and magnetohydrodynamics to plasmonic or excitonic systems.
4. Study novel optoelectronic effects in low-dimensional materials and time crystals.

The applicants should have a Master's degree (for the Senior Research Assistant position) or a Ph.D. degree (for the Research Fellow position) in Physics, Applied Physics, Engineering, or Applied Mathematics. Preference will be given to those with a strong publication record, open-minded, independent, and able to collaborate with other team members and experimental partners. Ph.D. students (graduating within 6 months) with relevant expertise are also encouraged to apply. Senior Research Assistants are expected to pursue Ph.D. degrees upon completing the contract if deemed suitable.

Technical requirements:

1. Ability to formulate physical models and solve the formulated equations analytically or numerically.
2. Strong foundation in numerical simulation, including developing and modifying existing codes to include multiple physics.
3. Solid foundation in electromagnetism, quantum mechanics, solid-state physics, material sciences, and computational methods like finite-difference-time-domain, finite-element, particle-in-cell, etc.

Responsibility:

• GDS layout and mask tapeout for MEMS devices;
• Performance and robustness simulation for MEMS microphones;
• Develop simulation models for MEMS microphone package/assembly level;
• Support failure analysis by simulation
• Write invention disclosures leading to patents for new devices

Requirement:

• At least a bachelor’s degree in Electronics /Physics/Mechanical Engineering or equivalent
• Skill at FEA modelling such as COMSOL, ANAYS etc. Experience with MEMS device layout using K-layout or similar tool
• Deep understand of mechanisms of MEMS devices
• Knowledge of MEMS fabrication processes
• Good analytical and problem solving skill

This is an opportunity to be a key player at a company with a great reputation in IoT semiconductor technology and growing business. We are looking for experienced/senior engineers to join our team in Singapore and be involved to develop the next generation IoT/AI chips based on a revolutionary architecture.

1. Work with team to define the design of WIFI/BT related modules.
2. Develop RTL design of one or more blocks, define RTL module partition, timing requirement etc.
3. Work with multi-disciplinary groups to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process.
4. Assist with the development of company documentation and generation of patents.

Qualification

1. Master's degree in Electrical Engineering (or equivalent), with 5+ years’ industry experience.
2. Team player, with good problem solving and communication skills.
3. Proficiency in System Verilog for RTL logic design and verification.
4. Familiarity with the design of digital MAC/baseband/high-speed interface/CPU or DSP is a plus.
5. Experience in Architecture/Block definition for SOC system such as WiFi, Bluetooth and GNSS.
6. Experience in micro-architecture design, and RTL coding with Verilog, familiar with Cadence and Synopsis tools.
7. Experience in synthesis, with analysis of power, timing and area.
8. Review micro-architecture to meet specification requirements and perform Design Quality Check
9. Experience in RTL and gate level simulation, unit test, system test and EDA verification

At Mediatek’s Memory Design Automation team, we work seamlessly with worldwide memory design team to deliver high performance, low power and small area in-house memories design kits and design flows under advanced technology nodes. We are looking for candidate to join us as memory design automation engineer for the delivery of robust memory and development of Memory Compiler automation flow.

Responsibility

1. Responsible for cutting edge technology node’s SRAM compiler design and deliver best quality of design kit.
2. Seamlessly collaborate with SRAM design and layout team to achieve highest quality of design kit delivery.
3. Responsible for data analysis and platform development of memory usage big data.
4. Responsible for physical verification (DRC/ERC/LVS/ANT/PERC) on SRAM compiler.
5. Responsible for spice simulation on timing, power and noise on SRAM compiler.
6. Responsible for QA check and development on SRAM compiler.

Requirements

1. Bachelor or Master Degree in Electrical and Electronic Engineering or Computer Engineering or Computer Science.
2. Multi-task capability and strong self-driven characteristics to meet challenging schedule.
3. Proficient with Perl, Shell, Python, C/C++ languages, knowledge with AI machine learning algorithm and infrastructure is an added advantage.
4. Strong interpersonal skills to work with team members with multi-cultural environment
5. Knowledge of high performance, low power SRAM/ROM and VLSI design is an added advantage. Experience with EDA tools will be helpful.
6. Candidate with experience is preferable.

Location: One North, Singapore

Why MediaTek?

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact. – Join us now!

Mediatek’s Memory Design Automation team is looking for fresh talent to join us as a modeling engineer for the development of behavioral, FPGA, timing and DFT simulation models. The role will be required to create, debug and optimize SRAM models for ASIC design flow.

The candidate must be a team player, able to communicate clearly and concisely to deliver quality work on time.

About the team:

The Mediatek’s Memory modelling team collaborates with the world-wide memory design teams to create and qualify front-end models for use in the ASIC design flow. Team members will also be expected to perform circuit design verification to ensure memory circuits robustness.

What you do:

• Develop and integrate automation code into existing memory compilers to generate models meant for ASIC design flow.
• Develop automation flow and scripts with Perl or Python.
• Execute EDA tools from vendors such as Synopsys, Mentor to verify models’ correctness.
• Stay up to date with current modeling standards and development to improve models and flows for better memory IP performance.
• Work with memory design, compiler team and DFT team and tool vendors to resolve model issues and find solutions.

What you bring:

• Must have a Bachelor’s degree or higher in Electrical Engineering, Electronics Engineering, or related discipline with at least 3 years of semiconductor industry experience.
• Have at least 3 years experience using Linux systems.
• Good understanding of verilog syntax and its various aspects, such as behavioral, RTL and synthesizable verilog is a must.
• Good understanding of liberty timing syntax.
• Good understanding of upf and system verilog.
• Knowledge and experience with EDA simulation tools such as VCS, NC is required
• Experience with EDA tools will be helpful:

o DFT: Logicvision, Tessent, Fastscan

o Synthesis: Design compiler, Genus

o Simulation tools:VCS, QuestaSim, NC

o STA tools such as PrimeTime

• Good scripting and flow automation skills, in Perl or Python.
• A team player, meticulous, able to work and learn independently are important attributes for this job.

Location: One North, Singapore

What you will do

• Develop and review test plans.
• Develop verification environment/testbench in Module/IP/SOC level.
• Develop verification IP and reference model.
• Implement test with randomization based coverage driven verification methodology.
• Implement functional and functional/code coverage closure.
• Hands-on code/debug with UVM, SystemVerilog, Verilog and SystemC.
• Low Power verification.
• Verification automation flow.

What you will bring

• Bachelor's/Master's Degree in EEE/Computer/IC design/equivalent.
• With min. of 8 years of relevant verification experiences.
• With IC/ASIC design verification experience on SOC, Ethernet, PCIe, DDR, USB, ARM CPU.
• Strong experience and debugging ability on SystemVerilog/UVM.
• Skilled in Synopsys/Cadence/Mentor Simulator and debugging flow.
• Experience on Low Power and formal verification is a plus.
• Strong in UNIX scripting with Pyhon, Perl, makefile Cshell.
• Fast learner and a good team player.
• Candidates with more years of experience will be considered for a more senior role.

About the team

Our ASIC DV Team focus on developing full and advanced verification methodology IP/SOC. You will have chance to work on challenging projects that attractive and be immersed in leading tech e.g.: WiFi, 5G, AR/VR, AI, Cloud Networking. A comprehensive program for professional development / career growth will be provided to the new joiner and he/she will have chance to learn from the best expert in this area.

In MediaTek, we promote diversity and inclusiveness. Passionate talents who love new challenges and keen on learning new technologies, do send us your cv our way today and join our multicultural team that consists of talents from all over the world!

Job Position: Research Engineer

Job Description

We are seeking machine learning and image recognition specialist to join our project team. The ideal candidate preferably has the background in machine learning techniques and image recognition algorithms to solve complex problems and improve project outcomes. You will work closely with a multidisciplinary team to develop, implement, and optimize ML models that are critical to the success of our projects.

• Design, develop, and deploy machine learning models and image recognition algorithms tailored to project-specific requirements.
• Collaborate with cross-functional teams to understand project needs, gather, and analyse requirements, and deliver ML-driven solutions.
• Conduct data collection, preprocessing, and augmentation to create training datasets.
• Implement and optimize image recognition models for accuracy, efficiency, and scalability.
• Evaluate model performance using appropriate metrics and make necessary adjustments to improve outcomes.
• Stay abreast of developments in machine learning and image recognition fields to incorporate cutting-edge technologies and methodologies into project solutions.
• Document model development processes, algorithms, and performance metrics.
• Provide technical guidance and mentorship to team members on machine learning and image recognition best practices.

Required/Desired Skills

• Experience in machine learning and image recognition, with a strong portfolio of project work that demonstrates expertise in these areas.
• Proficiency in programming languages such as Python, and familiarity with ML libraries (e.g., TensorFlow, PyTorch) and computer vision libraries (e.g., OpenCV).
• Experience with deep learning architectures (CNNs, RNNs, GANs) specifically designed for image processing tasks.
• Analytical skills with the ability to solve complex problems independently and as part of a team.

Required/Desired Qualifications

• Bachelor’s or master’s degree in Electronics & computer science, Artificial Intelligence, or a related field.

Experiences

Minimum 3 years’ experience in machine learning and image recognition within a technology/research organisation. Fresh graduate with relevant knowledge and skills will be considered.

Responsibilities:

• Manage and support the interior design development and coordination process throughout the design and documentation phases.
• Manage the execution of interior works from tender till completion and handover
• Monitor to ensure resolution of design and technical coordination issues at site
• Review of Contractors’ submissions, work schedules, materials samples, shop drawings etc.
• Conduct site & factory visits, monitoring of quality of on and off-site fabrication
• Monitor and report of interior works progress and qualities, to ensure delivery timeline and workmanship

Requirements:

• Degree in Interior Architecture / Architecture or any related field
• At least 6 years of relevant experience in Interior Design & Site Execution, preferably with premium residential, offices, hotels experiences
• Self-driven, and able to work independently.
• Ability to multi-task and to work under pressure.
• Excellent problem-solving skill.
• Strong organizational, communication and interpersonal skill.
• Proficient in Project Management Programs, AutoCAD, SketchUp, 3D Max, Illustrator or other design programs, Microsoft Excel, Word, etc.