Job Description

• Lead and manage a team of 18 pax to support Set Design and Staging activities for all Mediacorp’s productions.
• Plan and assign manpower, external resources, manage overall budget, timeline and deliverables.
• Provide guidance and advice to the team to achieve a the production requirement.
• Work with Props Store in maintaining and managing the inventory and processes
• Work closely with Props Resource team in securing suppliers on the Props items.

Qualifications

• At least 8 years of related work experience with relevant working knowledge of Set Design, Stage Design, Space Design, Interior, Landscape, Event, Exhibition, or Product Design, or 5 years of experience in project management in performing art and media industry, e.g. drama, movie, or theatre productions.
• Diploma/Degree in relevant discipline is preferred.
• Collaborative and a team player with strong communication skills.
• Effective time and stress management skills and the ability to meet deadlines.

Our team at the Singapore University of Technology and Design (SUTD) is looking at generative AI models for music. You will be joining our Audio, Music, and AI (AMAAI) Lab supervised by Prof. Dorien Herremans. At our lab, we aim to advance the state-of-the-art in AI for music and audio. You will be working on advancing the Mustango text-to-music model.

Ideal skillset:

• Strong knowledge of deep neural networks in PyTorch
• Interest in machine learning for audio
• Experience in NLP and computer vision
• Experience in Music Information Retrieval, ideally AI music generation and or audio transcription
• Interest or experience in music generation systems or audio classification systems
• Savvy programmer in PyTorch
• Creative problem solver with good academic writing skills

An ideal candidate should have a strong background in machine learning, familiarity in NLP and audio computing, PhD in Computer Science and related areas, and willing to work with PhD students in the lab to leverage individual efforts into a combined system.

• Position : Project Coordinator (Interior Design/Have Class 3 Driving License) - Up to $4500
• Location : North East - Macpherson/Paya Lebar
• Working hours : Monday to Friday | 10am to 6pm | Saturday half day
• Salary (commensurate with experience) : Up to $4500 (based on experience & qualifications) + Performance Bonus + Commission + Transport Allowance + Annual Leaves + Medical Benefits
• Duration : Permanent
• Industry : Interior Design

Main Responsibilities:

• Site planning, coordination with workers, scheduling and technical support to Project Manager
• Plan and discuss with Clients, Consultants, sub-contractors and Vendors on project execution including implementation.
• Manage and supervise project works as well as oversee all workers, sub-contractors and vendors to ensure proper work execution and good workmanship.
• Execute projects work based on drawing / specification.
• Resolve any Clients and / or residents’ complaints / feedbacks.
• Able to interpret drawings and Calculation of Site Materials
• Regular monitoring of project progress and reporting to Project Manager
• Attend site meeting, if applicable.
• Track work progress and submit progress report so as to ensure that the projects are executed on time and within budget.
• Coordinate the project work to ensure successful completion as well as hand over to the Clients.
• Coordinate and work with other departments as well as to supervise the project works.

Requirements:

• At least 3-4 years of working experience in the related field is required.
• Experienced in hand sketch site measurement with drawing
• Able to handle projects independently
• Possess a Singapore Class 3 driving license
• Immediately or within short notice to start work is an advantage
• Bilingual in English and Mandarin to communicate with Associates who can only converse in Mandarin

Email to: [email protected]

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***We do not charge our candidates any referral fee nor bind them with any contract.***

Chloe Ong

Consulting Manager (APAC)

Reg no.: R22105510

EA No: 13C6684

Responsibility

• Responsible for high-performance block implementation (RTL to GDSII).
• Perform block level floor planning, power grid implementation, APR placement, timing optimization, CTS and routing.
• Close the design to meet timing, power budget and area targets.
• Run physical verification flows (DRC/LVS/EM/IR), and implement fixes to meet the requirements.
• Implement ECO’s to address functional bugs, timing and physical verification violations.
• Responsible for the generation and maintenance of block-level STA constraints and performing STA signoff checks.
• Responsible for timing model generation and supporting the successful integration of blocks into SOC.

Qualification

• At least 3 years of hands-on experience in digital-physical design.
• Master’s/Bachelor’s degree in Electrical Engineering with an emphasis in IC design， master's degree preferred.
• Experience with digital Physical design and Static Timing Analysis
• Experience in floor planning and routing.
• Experience in advanced process nodes (5nm).
• Good experience with Synopsys implementation tools (DC, ICC2), and experience with Cadence (Innovus) implementation tool is a plus.
• Experience in Mentor Verification tool, Calibre.
• Proficient in TCL coding, Perl/Python knowledge is a plus.
• Good written and communication skills.
• Bilingual to communicate with associates in China is perferable.

Job Summary: We are in search of a highly motivated and accomplished Senior Research Assistant or Research Associate to join our team and contribute to our ongoing research project "Towards Realistic Deep Learning for 3D Vision". The successful candidate will collaborate closely with our research team, working on the development of ground-breaking algorithms and methodologies for 3D deep learning from heterogeneous data sources such as language and 3D data. This role offers an exciting opportunity to engage in cutting-edge research and have a substantial influence on the field.

Responsibilities:

• Undertake research in the field of realistic 3D deep learning, with a primary focus on pioneering algorithms and methodologies with language-guided 3D scene understanding.
• Design and execute experiments to validate the proposed approaches.
• Analyze and interpret data sourced from heterogeneous inputs.
• Stay up-to-date with the latest advancements in language-guided 3D scene understanding and related fields, and integrate new findings into research projects.
• Prepare research papers for publication in prestigious conferences.

Qualifications:

• A Master degree in computer science, Electrical Engineering, or a related discipline, with a specialization on computer vision, image processing, or 3D reconstruction.
• A strong background in computer vision, machine learning, and 3D geometry.
• Proficiency in programming languages such as Python, C++, or MATLAB.
• Experience with relevant software libraries and frameworks, such as Pytorch, OpenCV, or PCL.
• A solid grasp of mathematical concepts related to 3D computer vision, including geometry, optimization, and statistical methods.
• Good problem-solving and analytical abilities.
• Strong communication skills

Job Description:

You will be responsible for the design and development of BiCMOS Analog Integrated Circuit designs for Automotive and Industrial Battery management systems.

You will work within a group of design experts interfacing with layout, overseas design teams to create detailed specifications, innovative designs to meet the technological requirements, achieving sales and ultimately doing our part for empowering electrification of vehicles and enabling Metaverse; contributing to achieve carbon neutrality for our future generations.

Key responsibilities:

· Planning and designing IC block or system architecture based on design requirements

· Perform circuit design/analysis, simulation based on specs

· Prepare and discuss circuit, results of design in design reviews

· Conduct IC verification on bench to check IC performance with respect to design

· Work with layout engineer for device level design to realize best circuit response

· Work with application engineers to support customer application issues

Requirements:

· PHD/Masters/Bachelor's degree in Electrical/Electronics engineering or equivalent

· Possess experiences working in IC design environment

· Good analytical skills and technical skills in analog/digital function circuits such as switch capacitor amplifier, AD converter, high voltage power supply design : DCDC, LDO, chargepump, high precision reference BGR, oscillator, amplifier, comparator, etc

· Experience in developing IC and proficient in design tools usage (Cadence/Synopsys)

· Familiar with Lab measurement and characterization equipment

· Silicon debugging skills to solve design issues

· Good communication skills and ability to work in a team

· Preferably 3-5 years of analog IC design experience. Candidates with relevant design experience will be considered

Responsibilities:

• The Mixed-Signal IC (MEMS Interface) Design Engineer will be responsible for the design and development of capacitive and/or piezoelectric MEMS interface ASICs, including the required amplifiers, ADCs, filters and control logic, with characteristic high impedance inputs, ultra low power, low noise circuits etc .
• The responsibility of the Mixed-Signal IC Design Engineer includes scheduling, design, simulation and layout of mixed-signal circuit blocks, including pre- and post-silicon verification.
• It is also expected that you will conduct periodic design reviews, including with application engineers.
• It is also expected that you will support test development and product development teams in bringing projects to production.

Requirements:

• PhD/Master’s Degree in Electronics/Electrical Engineering.
• Minimum 6 years’ experience in Analog or Mixed-signal IC design.
• Very good knowledge of CMOS processes.
• Highly proficient in analog and mixed-signal IC design EDA tools.
• Experienced in analog and mixed-signal circuit designs, such as regulators, DC-DC converters, low-power, low-noise biasing circuits and amplifiers, sigma-delta modulation and ADCs, etc
• Experience in design of high resolution, low power sigma-delta modulation preferred.
• Experience in design of ultra low power ADC preferred.
• Skilled in laboratory testing of IC prototypes.
• Knowledge of Linux operating system required.
• Experience in MEMS interface ASIC design advantageous.

Responsibilities

1. Effectively collect the latest technical information/product information in the OIS industry, and effectively identify the development trends of OIS driver chip technology.

2. Grasp the technology development trend and combine the company's OIS driver chip planning to plan and deploy the OIS driver chip, design and develop it in advance to meet product and project needs.

3. Systematically evaluate OIS driver solutions, identify and control system risks and make improvements.

4. Establish an industry-leading OIS evaluation method, continue to white-box the OIS system, and effectively support the continuous improvement of OIS performance.

5. Integrate algorithms, IC design and lens module teams to lead the development of OIS driver chips from the system architecture level.

Requirements

1. More than 5 years of motor control-related work, preferably those with experience in OIS chip algorithm development.

2. Be familiar with the working principle of CCM, and have a deep understanding of gyroscope technical principles and signal processing, and Proportional–integral–derivative (PID).

3. Efficient execution and forward-looking thinking, and excellent systematic thinking ability.

4. Strong technical experience in implementing digital architecture development and algorithm design

5. Excellent communication skills in both English and Chinese (work effectively with R&D team based in China)