Job Description

· To create concepts for mechatronic systems (sub assemblies, assemblies) according to the required specification

· To design “Product Related” parts and pick-up tools

· To do feasibility studies, to provide effort and product cost estimation and risk indication to fulfill the specification

· Abide design to cost principles in any aspects

· Create 3D modules and BOM´s incl. 2D drawings following the BESI standards.

· Mind safety and international machine product standards.

· Initiate engineering change request and implement design changes.

· Project coordination and time management for responsible topics

· Work closely with other disciplines to meet project objectives; especially for CSR (customer specific requests) together with product marketing (PM).

· To write and present technical reports to internal and end customers to communicate design related issues and countermeasures when necessary.

To support technical inquiries from operations and the Technical Support

Requirements :

Education

Degree of mechanical / mechatronics engineering

Work experience

· Minimum 3-5 years or equivalent of relevant experience in automation / equipment industries

· Significant practical experience in mechanical design, construction and testing with a solid understanding of functional relationship of individual components and electromechanical systems.

· Good knowledge of mechanical parts evaluation and qualification

· Knowledge of structural dynamics/modal analysis is a plus

Expertise and methodology

· Strong analytical problem- solving skills and proficiency in CAD software and finite element tools such as Creo, Solid Edge, Mechanica / Ansys, etc.

· Working experience with equipment architecture design and system integration

Other requirement criteria

· Good communication skills

· Good English skills (verbal and written)

· Passion for continuous improvement

· Self starter, self organized

· Customer and service oriented

· Result oriented

· Team player

· Stress resistant

Job Responsibilities:

• Prepare meeting materials for production planning such as line-ups, rundowns and location surveys which includes schedule paperwork and camera scripts for Producers
• Requistion of props and costumes.
• Ensure that all props and costumes are ready for actual filming
• Manage talents and crew both in Studio and location filming and see to crowd control
• Prepare production reports
• Ensure there is continuity of costumes and props during production
• Follow up on editing such as transfer and logging, dialogue dubbing and transcribing

Job Requirements:

• Diploma and Degree graduates with no experience or candidates with 2 years of related experience are welcome to apply.

Interested applicants are invited to apply directly at the NUS Career Portal.

Your application will be processed only if you apply via NUS Career Portal.

We regret that only shortlisted candidates will be notified.

Job Description

Flexible electronics lab at NUS MSE is looking for a Research Assistant to work on a soft robotics project. This position requires following responsibilities;
- Design, fabrication and characterization of soft robotic devices.
- Working on experimental setup of actuator preparation, fabrication and characterization.
- Working closely with PI and lab members.

Qualifications

• Bachelor’s degree
• Experience on Control
• Experience on Robotics
• Experience on Design
• Individual and team work ability
• Good writing and communications skills
• Risk management and problem-solving ability

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a candidate for high-speed analog integrated circuit design. This candidate will contribute to the development of high linearity silicon photonics modulators for 6G and beyond communication systems. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications
• Design and tapeout ICs which include state-of-the-art circuit blocks, e.g. wideband linear low-noise amplifier and transimpedance amplifier with a focus on circuits interfacing with silicon photonics elements
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electronic Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

The Regional VM / Retail Design intern will be part of the APAC Retail Design and Visual Merchandising Department, supporting the function in providing layout/planning solutions & 3D renders supporting store openings and animations as well as Counter Updates for Travel Retail and Local Markets

Her/his role is to effectively contribute through the design development and implementation for permanent counters/points of sale and events in compliance with the guidelines. She/He will consistently deliver, in line with brand DNA, design proposals fulfilling the latest guidelines and as per briefed/instructed by his/her manager.

The incumbent will work closely their managers in keeping track that Design guidelines and deliverables are timely received and executed.

He/She will be engaged working Counter projects and Project Management of Retail Space, based on the needs.

Main Responsibilities

CREATIVE

• To elaborate/develop design proposals & renderings, technical drawings in line with HQ Guidelines and the brief defined by Merchandising, Commercial and Marketing teams.
• Study, adapt and implement guidelines to different markets’ needs.
• Managing the project(s) as Project Leaders to ensure qualitative deliverables are being carried over from start to finish with supervision of respective reporting line manager.

OPERATIONAL

• Work closely and supporting Retail Design Manager / Merch Executives to ensure flawless execution of counters, animations, launches and permanent merchandising.
• Manage POS (Point of Sales) / Database Excel for the Region, ensuring accuracy and robust update from the market / relevant stakeholders & to provide daily maintenance of data with merch related information – cross collaborative function with Supply Chain team.
• To supervise and review project execution from technical drawings development to installation: including sourcing, sample validation, prototyping, and quality control.
• Manage external suppliers (contractors, agency , vendors, etc) to ensure all collaterals are well ordered and/or produced in concurrent with the standard and guideline.
• To upkeep the database of counters and work with external department (Marketing, Retail Excellence , Finance, Supply Chain) 
• To manage the weekly newsletter provided by HQ and do readaptation on local / regional context across all region – cross function scope together with marketing team
• Attend team meetings to gain insights into the strategic planning process as well as providing a thorough minutes of meeting

Responsibilities:

• Conduct Solution Architecture activities when required on Bids and Projects, in close collaboration with Systems Engineers and reporting to the PDA in that case. In charge of proposing Solution Compliance.
• Support the Solution Orientation Review (SOR) for Bids in collaboration with the Solution Engineering Manager (Bids), Services Engineering and assigned bid team members.
• Propose draft DVa and report to the PDA in terms of Solution definition for allocated Bids/Projects.
• Ensure that the design of the Solution satisfies:
  • Customer needs and contractual requirements for a project,
  • Contractually applicable technical standards,
  • Alignment with the Product Policy,
  • Cost effectiveness, and
  • Applicable design legislation, rules and regulations.
• Ensures, with the support of Specialty Engineering experts & HSE stakeholders that:
  • Solution design takes into account contract requirements in terms of Safety, Security and Human Factors and applicable legislation, rules & regulations, including Environmental/HSE requirements & standards,
  • Related certification activities are performed correctly.
• Particular focus on risks qualification and quantification and mitigation actions at Bid phase and follow-up at Project phase. Risks must be understood and mastered.
• Participate in specific actions plans and dedicated task forces as allocated to solve complex technical problems.
• Contribute to elaborate the TopSKY-ATC product policy through commonalising specific Solutions required by projects and support the HE Product Design Authority in maintaining a rigorous Product policy.
• Take charge of a Technical Speciality when required (e.g. Network & Infrastructure) with the aim to:
  • be the subject-matter expert within the organization,
  • provides a conduit for the sharing of state-of-the-art knowledge across the discipline,
  • be responsible for capitalisation within his/her discipline.
• Pro-actively share knowledge with the experts network inside the AMS Business Line and participate when required into external events in the technical & ATM expert fields to represent Thales AMS.

Requirement:

• Tertiary Qualifications in Engineering
• Degree in computer sciences (minimum Bachelor of Sciences) and network discipline
• 7 years minimum of experience holding positions in systems engineering and/or software engineering and/or integration on complex software-centric real-time systems.
• A proven track-record in supporting the design of Solutions for complex System Of Systems.
• Proven capability to work in a multi-cultural environment and with variety of international customers.
• Experience in the ATM Domain is mandatory.
• Language: fluent English, French would be a plus.
• International work context
• Aptitude to work effectively as part of a team.
• Resilience under pressure.
• Capacity to learn quickly.
• Capability to manage various stakeholders having different objectives.

We are looking for a candidate for high-speed analog integrated circuit design. This candidate will contribute to the development of high linearity silicon photonics modulators for 6G and beyond communication systems. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications
• Design and tapeout ICs which include state-of-the-art circuit blocks, e.g. wideband linear low-noise amplifier and transimpedance amplifier with a focus on circuits interfacing with silicon photonics elements
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electronic Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a candidate for high-speed analog and mixed-signal integrated circuit design. This candidate will contribute to the development of high-speed silicon photonics transceiver for next generation wireline communication system. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications.
• Design and tapeout ICs which include state-of-the-art circuit blocks e.g. analog-to-digital converter, equalizers (CTLE, DFE) as part of the high-speed data link system.
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electrical Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog and mixed-signal IC design methodologies and successful tapeout experience
• Familiar with analog and mixed-signal IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a candidate for high-speed analog and mixed-signal integrated circuit design. This candidate will contribute to the development of high-speed silicon photonics transceiver for next generation wireline communication system. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications.
• Design and tapeout ICs which include state-of-the-art circuit blocks e.g. analog-to-digital converter, equalizers (CTLE, DFE) as part of the high-speed data link system.
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electrical Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog and mixed-signal IC design methodologies and successful tapeout experience
• Familiar with analog and mixed-signal IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

Tanglin Mission

Tanglin Trust School Singapore has a long tradition of providing British-based learning with an international perspective. At Tanglin we strive to make every individual feel valued, happy and successful. Responsibility, enthusiasm and participation are actively encouraged and integrity is prized. Working together in a safe, caring yet stimulating environment, we set high expectations whilst offering strong support, resulting in a community of lifelong learners who can contribute with confidence to our world.

Our Vision

We aspire to be the best school in the world with a dynamic learning community which nurtures and inspires every individual to be the best they can be. Our core values of Respect, Responsibility and Purpose are at the heart of everything we do across the school.

The Role

This is a rare and exciting opportunity to join a DT department within a well-established, outstanding school. Our vision is that the department will be modern and forward-thinking, with learning located in authentic contexts, and that the curriculum will reflect the successful candidate’s creative energy. He/she will have outstanding subject knowledge, a passion for designing and will be at the cutting edge of technological innovation within the field. The successful candidate will be a teacher with commitment, integrity and excellent communication skills and a teacher with flexibility, resilience and a caring approach towards students.

Key Responsibilities

1. Learning & Teaching

• Manage an effective, enthusiastic, and safe learning environment.
• Deliver the curriculum to assigned classes in accordance with the timetable.
• Differentiate lessons according to the abilities and learning needs of individual students.
• Promote independent learning by adopting teaching and learning strategies that develop the competence and confidence of every student.
• Seek to develop students’ attributes through the Tanglin Learner Profile, as well as seek opportunities to develop their own attributes through that framework.
• Ensure the thorough implementation of subject specifications, teaching schemes, assessment policies and reporting procedures.
• Create opportunities for students to develop confidence in the subject through carefully planned and managed activities.
• Support a departmental and whole school culture of innovation that includes varied and exciting teaching approaches, technological integration, and thoughtful evaluation.
• Possess the flexibility required to teach a range of materials, topics, and ability levels.
• Possess the flexibility required to teach either pathway (A level or IB) in the Sixth form.

2. Planning & Development

• Take responsibility for at least one aspect of D&T curriculum development each year following discussion and negotiation with the department leadership team (eg, creating a new scheme of work, drafting of departmental policy, organisation of trip).
• Assist the D&T department leadership team in evaluating and developing the new curriculum.
• Take advantage of opportunities for professional development offered by Tanglin.
• Take responsibility for their professional development and that of colleagues by occasionally leading departmental inset or department meetings in an area of expertise.
• Assist the HOD (Head of Department) in identifying areas for development in D&T within the broader aims of the school development plan.
• Collaborate with colleagues in the planning and delivery of schemes of work, including the choice of appropriate teaching and learning methods to meet the needs of the subject and of different pupils.
• Assist the HOD in adapting curriculum content and methods of teaching and examining as appropriate.
• Support a school culture of innovation that includes technological integration.
• Be supportive of and open to the frequent change that characterises a school such as Tanglin.

3. Management of Resources and the Teaching Environment:

• Assist the HOD in identifying appropriate resources within the limits of the departmental budget.
• Assist the HOD in ensuring that departmental rooms present stimulating environments that help to influence pupils’ attitudes positively towards D&T.

4. Assessment, Recording & Reporting

• Ensure students’ work is regularly assessed according to D&T departmental policy and that homework is in line with school policy.
• Report to parents in accordance with the school’s reporting policy as laid down in the Staff Handbook.
• To use information gained from assessment, recording and reporting procedures to generate further improvement in pupil achievement.
• Assist the HOD in the setting and marking of school examinations and to supervise entries for external examinations.

5. Pastoral and Co-Curricular

• Lead the development of the F1 in Schools program in D&T.
• Contribute to co-curricular activities that broaden pupils’ experiences and contribute to the general life of the school.
• When required, take on a form tutor role in the Senior School and fulfil the responsibilities of that position.
• Follow the School’s policies and procedures regarding discipline and behaviour, daily routines, duties, homework, leave of absence, and visits, as laid down in the Staff Handbook.
• Be responsible for reporting any concerns about a child to the Designated Safeguarding Lead.

6. Communication and Liaison

• Help to establish an ability to spot and solve problems and to increase resilience in learning, through your own enthusiasm for the subject.
• Contribute wholeheartedly to D&T department activities such as supporting each school with projects, planning ‘House Day’ activities, ‘Children’s University’ and transition days.
• Attend and contribute to meetings of a professional nature with HOD, HOF, HOY, SSLT and in other circumstances when requested.
• Liaise with the HOD and HOF in respect of pupil records, rewards, and sanctions.
• Maintain appropriate links with teaching colleagues in all sections of the school and foster cross-curricular links where appropriate.
• Liaise with members of the Learning Support Team regarding individual students who may have exceptional needs, to ensure that those needs are understood, planned for and met.
• Liaise with pastoral staff, including form tutors, Heads of Year, the Assistant Heads of School and the Head of Careers on matters pertaining to the study of D&T.
• Contribute to the strengthening of the parent-teacher partnership in individual and whole school initiatives as and when required.
• Assist the HOD in developing effective links with the wider community to extend the study of D&T and enhance teaching and learning.

Job Description:

We are looking for a highly motivated computational scientist with a deep understanding of chemistry/cheminformatics and structural biology to develop new AI models for ligand discovery. You will be working on a large collaborative project to build up A*STAR’s computational drug discovery capabilities. The candidate is expected to be familiar with the latest generative models. Familiarity with molecular docking programs is a plus.

Job Requirements:

• PhD degree in life sciences, chemistry, computational biology, or a related discipline
• Passion for science and research
• Highly motivated
• Proficiency in the use of machine learning frameworks (e.g. PyTorch, TensorFlow)
• Experienced in developing generative models
• Strong knowledge of chemistry/cheminformatics and structural biology
• Able to work independently and as part of a team
• Excellent written and oral communication skills

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Requirements :

1) A Degree in Civil or Structural Engineering from a recognized university or its equivalent recognized by the Professional Engineer Board, Singapore. A diploma holder with design experience will also be considered.

2) Minimum 2 years of design experience in Building projects and/or Earth Retaining Structures.

3) Conversant with local codes and authority submission procedures.

4) Competent in common engineering design software, analytical tools and BIM software.

5) Familiar with precast concrete, post-tensioned concrete and steelwork design, knowledge of MET design will be an advantage.

6) Proactive, responsible and keen to work in a team.

7) Excellent interpersonal, good verbal and written communication skills.

Job Description :

1) Perform Civil/Structural engineering design and analysis.

2) Participate in the BIM process. Involvement in the collaboration with peers and fellow Consultants from other disciplines.

3) Coordinate, monitor and track authority submissions for Projects.

4) Conduct feasibility studies, and inspections and prepare technical reports.

5) Attend meetings and design workshops, when necessary.

6) Liaise with Engineers and/or Consultant teams during the implementation of projects.

Responsibilities:

• Full responsible for Netlist-to-GDS physical design implementation of 12nm/6nm/4nm and below advanced process chips.
• Block owner, take block of 2~3 Million instances, working on Synthesis/APR(auto place and route)/Signoff
• Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners.
• TOP role for the complicated hierarchical chip (more than 20 Million instances plus 500+ macros), doing floorplan and partition, responsible for full chip tapeout

Requirements:

• Bachelor/Master Degree in Electrical/Computer Engineer.
• Experience in physical design with tape-outs.
• Knowledge of complete Netlist-to-GDS flow, Synopsys/Cadence tools like ICC2 or Innovus.
• Good in script programming with Perl, TCL/TK or other languages.

We are looking for a Chef who has rich experience in preparing North Indian Delicacies.

Job Requirements:

· At least 10 years of working experience as North Indian Chef.

· Knowledge about recipes of various Authentic North Indian dishes.

· Rich experience in preparing Indian Soups, Appetizers, Curries and Indian Chinese.

· Experience as Tandoor Chef is added advantage.

· Experience in preparing Indian sweets & desserts.

· Knowledge and Experience to introduce new dishes as “specials of the week".

· Ability to revisit and revise existing menu to better suit the customer needs.

· To cook tasty food using natural spices & healthy ingredients to bring the authentic flavour to dishes.

· To keep track of the stock of groceries, vegetables and meat and order appropriately.

· To avoid food wastage with proper planning.

· To speak English and Hindi fluently.

· To work with great team spirit with other chefs and service staff.

· To maintain kitchen neat and tidy always as per SFA & NEA regulations.

As a member of the Advanced Development team, you will lead the charge for new technology and design solutions for BISSELL products. You will be part of a collaborative innovation and advance development team to drive excellence in investigating and delivering new technology and design solutions for features, functions, and performance of components and sub-systems for products developed by BISSELL.

Responsibilities:

• Drive investigations, development and integration of technology and design solutions into BISSELL products
• Coordinate and converge internal and external organization activities to conclude on the technical and financial feasibility of technology and design solution proposals with the stakeholders in the company.
• Contribute to advance technology design knowledge and capabilities in the organization
• Complete analysis, design, and validation of new technology and design solutions ideas to mature readiness for product integration.
• Document and present investigations with clear data driven conclusions and recommendations that include solution value, limits, trade-offs, costs, risks, and effort.
• Engage with Global Product Marketing and Engineering Teams to review and conclude the feasibility of technology and design solutions proposed.
• Support product engineering teams in the integration and implementation of accepted technology and design solutions.

Qualification:

• Ph.D./Master's degree in Mechanical/ Mechatronics Engineering
• Industry experience is preferred but not required in the case of relevant experience gained through research and academic engagements.

Experience:

• Structural design and fabrication of mechanical components and assemblies.
• Design and fabrication of aerodynamic parts in turbomachinery, i.e. fans, rotors and impellers.
• Experience on single stage or multi-stage turbine design is an added advantage.
• Expertise to work with different materials, eg plastic, metal, etc. Technical acumen to explore new materials is desirable.
• Design with CAD Modelling and Design Tools (Experience in Creo will be an added advantage). Ability to read, understand and generate engineering drawings using CAD tools is a must.
• Able to carry out Aerodynamic CFD simulation. Experience with CFD design and meshing of complex assemblies with Ansys Mechanical and Fluent.
• Working knowledge of mechanical test standards and test execution activities related to area of work.
• Working knowledge for mechanical tolerancing and stack analysis.
• Able to work with Product Lifecycle Management tools (Experience in PTC Windchill will be an added advantage)
• Working knowledge on measurement/analysis of thermal profile of high-speed electromechanical devices is an added advantage.
• Working knowledge on design and fabrication of high speed electromechanical and electromagnetic components cooling solutions is an added advantage.
• Business acumen to analyze and gauge the commercial viability and IP feasibility is desirable.

Competencies:

• You must have passion, energy and a natural curiosity for research, technology and design. You associate yourself with the following characteristics.
• Proactive in learning and capability growth.
• Possess an innovation mindset.
• Able to do analytical and conceptual thinking.
• Structured, creative and self-driven in problem solving.
• Effective communication skills, both written and verbal.
• Good planning and stakeholder management skills.
• Approachable and engaging in collaboration work.
• A good team player and able to work well in a cross functional and international team environment.
• Effective at presenting results and recommendations to stakeholders and senior levels.
• Able to independently plan, manage and drive results and commitments.

Be part of a team in creating state-of-the-art Secure Low Power SoC ARM-based SoC/MCU for the Low-End , Mid and High-End performance MCU product line in a IC Design Environment.

Responsible:

• Engage design team and architects to strategies DFT Test plan for SoC top level
• Create DFT test modes, scan architecture, clocking and reset architecture.
• Plan Pin-Muxing and Pad and Boundary scan (BSDL) generation
• Execute JTAG TAP network generation and verification.
• Quality check with Spyglass analysis for scan using spyglass tool
• Execute Scan insertion using DC / Tessent tools
• Deploy Scan constraints development for Atspeed, shift and slow capture mode.
• Generate ATPG pattern generation using synopsys Tetramax tools
• Analyze and report on test coverage metrics to ensure comprehensive testing of designs.
• Implement improvements to enhance test coverage and efficiency.
• Verify No-timing and SDF simulation of ATPG patterns using VCS and NCSim tools
• Implement MBIST MBIST repair and verification using Mentor Graphic Tessent tools.
• Boundary scan verification
• Generate STIL test patterns for tester
• Silicon bring-up and failure debug

Requirements:

• Requires BSc/MSc or PhD in electrical and electronic or Computer engineering
• Requires > 5 years or more of experience in DFT at IP and SoC top level. Proficient at using DC ,tetramax and MG tessent DFT tools
• Tape-out at least 5 chips and tested to pass on tester.
• Requires strong understanding of state of the DFT methodology , flat and hierarchical implement of DFT from IP to SoC top.
• Capable of understanding UPF to enable multiple power domain verification
• Capable of leading, review and guiding younger DFT engineers in their daily tasks
• Able to work in a team with a strong drive to excel
• Able to work independently on a given assignment and work hard to finish on time
• Good written and communication skills

Founded in 2006, IGG is a leading global mobile games developer and publisher committed to making amazing innovative games for players all over the world. Our games are available in 23 different languages, and are enjoyed by 38 million monthly active users from over 200 countries and regions.

At IGG, we are innovators at work, gamers at heart.

We are currently on the lookout for a Game Design Intern to join us!

Responsibilities:

Collaborate with the game design team to create game concepts, mechanics, and systems

Assist in designing and balancing game levels, and challenges

Conduct playtesting and provide feedback on game mechanics and user experience

Assist in creating and maintaining game design documentation and spreadsheets

Requirements:

Has education background in game design or game development

Proficiency in Unity is a bonus.

Excellent communication and teamwork skills.

Ability to work independently and take initiative.

What’s in it for you!

Excellent projects and team members conducive to personal growth

Vibrant work environment

Well stocked pantry

As the Product Design Lead/Manager, you will spearhead the designers that are driving Customer Retention through compelling design strategies. Your leadership will bridge UX, product management and engineering, ensuring seamless collaboration and communication with key stakeholders. Your role is pivotal in harmonizing design processes and language across the Product organization, while also contributing to project-specific needs and novel concepts.

What's on the menu:

• Leadership & Development: Leading by example and not being afraid to get hands-on. Nurturing, mentoring, and empowering a lean team of product designers to excel in their craft and career.
• User Advocacy: Championing user needs, integrating user-centric approaches across design and development phases, thereby enhancing product relevance and user satisfaction.
• Data-Informed Design: Utilising data analysis and user feedback to refine concepts, ensuring our designs meet and exceed user expectations.
• Design Excellence: Elevating our global design standards by expanding our toolkit and pattern library, rooted in user and product insights.
• Process Innovation: Optimising and refining design processes within an agile framework, adapting to the dynamic needs of the business.
• Collaboration & Influence: Forging strong relationships with peers across design, product, and engineering, contributing to a culture of innovation and excellence.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are seeking a new Manager/ Sr. Manager-Client Solutions for our Singapore office

In brief

As our new Manager/Sr. Manager-Client Solutions - Singapore. you will be responsible for acquisition of new clients. Reporting to the Head of Hyderabad, you will drive business development efforts that generate leads, enhance brand visibility, and increase sales.

• You will drive business development efforts in the region, acquire new clients and manage sales targets .
• You will gather market intelligence, including information on clients and competitors in the "Office Interiors Design & Build" market sector, industry trends, future projects, etc.
• You will generate and track leads and forecast your sales efforts to create new bookings.
• You will work closely with the Director and the Team to complete the sales cycle
• You will collaborate in developing the systems, materials, and resources necessary for business development, including proposals, presentations, and serving offerings to win work.

What we expect

• You are a goal oriented sales professional with experience of managing complex sales cycles with B2B selling process to multi-national companies in Bangalore.
• You have achieved quota/annual targets in your previous roles
• You have an engaging personality with excellent communication skills

• You have experience working in Interior Design firms selling "Office Interiors Design & Build" services.
• You have an undergraduate or graduate degree in business, marketing, or another field relevant to this role, with a minimum of 5 years of sales/ business development experience .

Who We Are

To find out more visit www.spacematrix.com

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.