ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

As part of IME Integrated Circuit Design and System Department, we are looking for a candidate with relevant experience in ultrasound imaging system design. This candidate will define an ultrasound transducer array beamformer IC architecture for imaging applications. The candidate will work closely with MEMS team on system architecture, circuit design, simulation, validation, and integration.

Role & Responsibilities

• Perform system-level beamformer architecture, design, and simulation, to derive circuit-level design specifications.
• Beamforming array optimization using AI algorithms.
• Design and implementation of beamformer algorithm in hardware.
• Work together with team to investigate novel circuit/system solutions to create new inventions.

Requirements

• Master’s / PhD degree in Electrical Engineering or equivalent
• Good understanding of ultrasound imaging systems and beamforming theories.
• Knowledge of AI algorithms and implementation will be a plus
• Familiar with IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

Scratch is a design and build consultancy that is focused on developing holistic spaces in the built environment for residential and commercial applications.

We are looking for design oriented self-starters, with high level of attention to detail and curiosity for innovation.

Project Managers to be Involved in:

1. Project coordination and site planning, handling of schedule and timelines.

2. Purchasing with suppliers, and delivery coordination with quality assurance.

3. Communication with team and stakeholders with 3D and 2D CAD visualisation and drawings.

4. Client coverage and to develop a close relationship with all stakeholders throughout duration of project.

This position reports to the project director and interfaces with design and projects team, contractors, suppliers and clients.

Technical Skills and Competencies:

- Active participation in strategic planning process, including developing goals and objectives.

- Active learning in project management software, while forecasting effective management of stakeholders.

- Active familarisation in 2d and 3d visualisation software.

- Active coordination of various subs, elements, sourcing and fabrication within the project.

- Self motivated and willingness to learn.

Scratch is committed to an employee-orientated, high performance culture that emphasises empowerment, quality, continuous improvement, and the recruitment and on-going development of a superior workplace.

This position is open for both recent graduates and mid-career individuals (mature and non mature).

Graduates interested in this position should possess a Degree and above qualification.

Mid-career individuals from any qualification level can apply.

Interns can apply for traineeship positions.

Benefits:

• Competitive salary
• Health and wellness allowance
• Paid time off and holidays
• Opportunities for professional growth and development
• Collaborative and creative work environment

How to Apply:

Please submit your resume, portfolio, and a cover letter outlining your experience and design philosophy to [email protected]

As part of IME Integrated Circuit Design and System Department, we are seeking a candidate with relevant experience in analog integrated circuit design. This candidate will contribute to developing analog circuit blocks e.g. low-power operational amplifiers, voltage/current references, and voltage regulators based on thorough topology analysis. This candidate will work closely with other team members for the circuit design, test verification, as well as system integration and validation for a broad range of innovative sensor systems.

Role & Responsibilities

• Circuit schematic design and simulation, layout supervision, pre-tapeout design verification, test plan development and chip measurement
• Work together with teams to investigate novel circuit/system solutions to create new inventions

Requirements

• Bachelor’s / Master’s degree in Electronic Engineering
• Good understanding of CMOS analog IC design methodologies
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

Job Responsibilities:

• Identify project design hazards, construction risks, and constructability issues.
• Develop corresponding mitigation measures together with the project team.
• Chair regular risk mitigation meetings and training with clients and internal parties.
• Advise management on alternative safer and higher productivity construction methodologies.
• Review method statements and risk assessments for safety and construction compliance.
• Attend meetings related to construction progress, risks, etc.
• Any other duties as assigned by the Managements.

Job Requirements:

• Have reasonable exposure in safety and health for construction especially on transportation infrastructure projects in a similar nature
• Attended the Design for Safety (DfS) for Professional Course and passed the assessment or equivalent.
• A registered PE or Architect with a Practicing Certificate OR
• Minimum 10 years relevant experience in the design and the supervision of the construction of structures with at least 5 years in design which includes contributions to designs and writing specification
• Have a degree accepted by PE Board or Board of Architect and construction related degree accepted by Singapore Institute of Surveyors (SISV) and Society of Project Managers (SPM)
• Possess excellent leadership, planning, good management skills, interpersonal communication and negotiation skills
• Have experience in LTA projects have an advantage

• Need experience in Architectural metal works, metal cladding, Ceiling panels, Glass Wall, Glass Railing, Sky lights, Stainless Steel & Aluminium works.
• Planning of shop drawings submission schedule to control the sequence and time frame for development of shop drawings.
• Prepare documents/samples submission schedule to control the sequence and timing for samples submission/approval with preferable float time allowed for procurements.
• Co-ordinate all related design matters with Consultants/ Client.
• Ensure main contract and sub-contract designs co-ordinated fulfil all design requirements.
• Co-ordinate with Contract team for any formal and informal changes made by Consultants.
• Co-ordinate with Contract team for proper sequence of sub-contract awards.
• Resolve technical problems for team.

Interested applicants, please apply online or send your resume in WORD format to [email protected] & [email protected]

Thank you for your application but we regret that only shortlisted candidates will be notified.Design / Technical Manager

Job Description (Key Responsibilities):

• To ensure an efficient Civil & Structural and Geotechnical & Tunnel design is achieved in accordance with Design Criteria and relevant standards
• To liaise with internal and external parties on all Civil & Structural and Geotechnical & Tunnel design matters and advises the NSC’s PRPM/SPM/PM regularly
• To liaise with internal and external parties on all Civil & Structural and Geotechnical design matters and advises the NSC’s PRPM/SPM/PM regularly
• To co-ordinate the review of Contractor’s Civil & Structural and Geotechnical & Tunnel submissions and assists the NSC’s SPM/PM in conveying a timely response to the Contractor
• To co-ordinate the review of Contractor’s Civil & Structural and Geotechnical submissions and assists the NSC’s SPM/PM in conveying a timely response to the Contractor
• To identify and resolve potential design related issues during construction phase
• To carry out any other duties as required by the Authority’s Project Management Team, including attending technical meetings and discussions, preparation of minutes of technical meetings and to provide technical support as required in the evaluations of Contractor’s claims
• To ensure that the design intent is translated to construction on site by means of correct drawings and specifications

Job Requirements & Person Specification (Qualifications, Experience, Skills & Behaviours)

• Degree in Civil & Structural (C&S) Engineering / Construction Management (Preferable from government university in Malaysia for Malaysia candidate)
• Relevant experience in a C&S, geotechnical, tunnel, or viaduct project / construction environment
• Proficiency in relevant software programmes for planning and project work is advantageous
• Experience with C&S, geotechnical, tunnel, or viaduct design would be an advantage
• Strong analytical and communication skills
• Any offer of employment for the role of Project Engineer is also subject to approval from our client for you to commence work on their project

About Asia Infrastructure Solutions:

Asia Infrastructure Solutions is a leader in delivering project & programme management, cost management, sustainable design, engineering, business advisory and consultancy solutions for the infrastructure, buildings, and environmental sectors. The company was established by Global Infrastructure Solutions Inc. (GISI), the largest privately owned construction manager in the commercial building, industrial and healthcare markets, and a leading project / construction manager in the environmental and public infrastructure sectors. GISI and its founding members have over 90 years of project experience in Asia and currently employs 12,500 employees globally, operating in more than 90 countries.

Asia Infrastructure Solutions has a strong and diversified team of project managers, construction managers, programme managers, cost managers, sustainability consultants and various disciplines of engineering professionals with a long track record in the infrastructure, building and environmental sectors delivering the future for the built and natural environment. Our professional and technical expertise and capabilities are inherited from the Arcadis Design & Engineering / Hyder / Freeman Fox in Hong Kong and Arcadis Consulting / EC Harris / Davis Langdon & Seah businesses in Singapore which span many decades in the Asia region.

Notable projects in Singapore include the Jewel at Changi, CapitaSpring, the North-South Corridor, various hotels, data centers and corporate headquarters for the world’s leading MNCs to name a few.

We empower our employees to succeed and we invest in their professional growth through learning & development programmes as well as membership of professional bodies. Our employees also receive a range of benefits that includes opportunities for hybrid/flexible working, a share-ownership scheme, and private healthcare coverage.

Asia Infrastructure Solutions . Delivering the Future . AsiaInfraSolutions.com

Fair recruitment practices:

Asia Infrastructure Solutions adheres to the Tripartite Standards for Recruitment Practices in Singapore and uses fair, merit-based, and inclusive hiring practices.

Employment agencies:

Candidates referred by employment agencies will not be considered unless the agency has been explicitly instructed to provide candidates for the stated role.

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

Lead Engineer, Design Verification

(Senior Staff Engineer)

Responsibilities:

You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications.

• The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.

• Develop test plans at block, sub-system, and chip level.

• Execute SoC-based verification at full-chip.

• Write C-based lib packages and tests.

• Architect and implement scalable and reusable test benches using SystemVerilog and UVM.

• Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.

• Automating the test environment for randomized testing and scoreboarding.

• Utilize advanced debugging techniques to identify and resolve design and verification issues.

• Perform root-cause analysis and work with design teams to fix identified issues

• Define and track functional and code coverage metrics to ensure thorough verification.

• Ensure that verification quality meets or exceeds industry standards and project requirements.

• Edge-based AI inference is preferred.

Requirements

• BSEE /MSEE 8-12 years Degree of experience in block, sub-system, and full-chip verification

• Should have delivered multiple chips functioning to Specification.

• Identify and manage verification deliverables, milestones, and schedules.

• Proactively identify potential verification risks and develop mitigation strategies.

• Collaborate with design, architecture, and software teams to understand and verify design intent.

• Communicate verification progress, issues, and results to stakeholders and management.

• Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges

• Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.

• C-based verification in an SoC environment is required

• Experience with ARM processor-based designs and low-power design techniques is a plus.

• Languages: SystemVerilog (UVM), Verilog, C/C++, Python, Perl or Makefile

• Technologies: ARM M/RISC-V (Preferred), AMBA AXI/AHB/APS, DMA, Flow Control, Serial Devices, Qo5

• Preferred technologies: MIPI(CSI/DSI), Crypto, OTP, DSP, Low-Power

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Key Responsibilities:

• Collaborate with the front-end design team to complete chip floorplan, clock architecture, and power plan.
• Take ownership of physical design tasks, including P&R (Place and Route), formal verification, static timing analysis, physical verification, power analysis, and design for reliability.
• Manage the full backend design flow, ensuring that designs meet all specifications and constraints for successful tapeout.
• Research and develop methodologies for advanced process nodes in physical design.
• Build and optimize automated physical design platforms to enhance efficiency.
• Write and maintain scripts (TCL, Perl, or Python) to support design tasks and tool automation.
• Work with EDA tools to perform analysis and optimizations, ensuring the quality of physical design and compliance with industry standards.

Required Qualifications:

• Extensive experience in the digital backend design field, with a focus on physical design, P&R, static timing analysis, and verification.
• Strong expertise in physical design methodologies for advanced process nodes.
• Proficient in scripting languages such as TCL, Perl, or Python to automate tasks and build platforms.
• In-depth knowledge of EDA tools used in physical design, such as Cadence, Synopsys, or Mentor Graphics.
• Experience with design for reliability, power analysis, and physical verification.
• Proven track record of successful tapeouts and deep understanding of the full backend design flow.

Thank you for your application and we regret that only shortlisted applicants will be notified

By submitting any application or resume to us, you will be deemed to have agreed & consented to us collecting, using, retaining & disclosing your personal information to prospective employers with the services provided by us.

EA (18C9514/R23118479)

Job Descriptions

• Develop and Review Test Plan based on IC design specification
• Develop constrained-Random verification environment for complex DUT
• Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs
• Implement coverage matrix using cover point and assertion
• Create and debug tests for DUT
• Resolve bugs with remote designers

Requirements

• Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering with min 1 year of experience
• Hands-on experience in Silicon/ IP verification using SystemVerilog/ UVM
• Strong understanding of verification process from test plan to coverage completion
• Strong communication and Analytical skills
• Understanding of HDL (Verilog, VHDL)
• Experience with designing with FPGA using Vivado is a plus

Ethos Search Associates Pte. Ltd.

EA Licence No: 13C6655
EA Reg No: R1109557 Rose

Job Descriptions

• Develop and Review Test Plan based on IC design specification
• Develop constrained-Random verification environment for complex DUT
• Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs
• Implement coverage matrix using cover point and assertion
• Create and debug tests for DUT
• Resolve bugs with remote designers

Requirements

• Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering with min 1 year of experience
• Hands-on experience in Silicon/ IP verification using SystemVerilog/ UVM
• Strong understanding of verification process from test plan to coverage completion
• Strong communication and Analytical skills
• Understanding of HDL (Verilog, VHDL)
• Experience with designing with FPGA using Vivado is a plus

Position title : Power Packages Designer x 2 (Junior / Senior level)

Location: Admiralty
Working Days: 5 Day A Week
Working hours : 9:00am - 6:00pm

Responsibilities:

• Design with Customer support innovative package based on PEP technologies for Semiconductor Power Applications using IGBT, GaN, SiC and Si Mosfet devices with device driver integration where reasonable
• Perform design rule checks (DRC) and edit data to comply with manufacturing guidelines. (DFM)
• Identify limitations of the design and suggest improvements to meet DFM for new products. Provide feedback on process critical dimensions and product features.
• Itemize and correspond to design Issues with customers.
• Perform Package layout, identifying stackup specifications as appropriate and prepare designs for production
• Identify and lead any prototype work required in early design stage to verify use of new technology or concepts in product or process design to reduce risk and improve profitability.
• Recommend new design concepts and validate the concept feasibility using thermal/electrical modelling
• Perform package reliability test according to the Semi standard specifications to ensure and improve the package robustness according to the mission profile defined by the customer or by application.
• Follow the customer characterization and qualification of the power package
• Provide technical support to process engineers to evaluate and provide strategy for advanced processing / implementation of product packaging

Requirements:

• Degree / Diploma in Electronic Engineering or equivalent
• Good engineering foundation and technical knowledge
• PCB / Substrate manufacturing knowledge
• 2D and 3D design know-how ( AutoDesk preferred )
• Background on semiconductor packaging and assembly processes
• Knowledge with semiconductor power packaging assembly (interconnection, epoxy encapsulation, thermal dissipation, electrical impedance)
• Must be willing to travel both international and domestic as required to remote plants, facilities, customers or suppliers.
• Senior and Staff level with at least 5 years experience in related field.

Interested Personal kindly contact WhatsApp :+65 8833 7969(Lydia)

OR

Email to : [email protected]

The Supreme HR Advisory Pte Ltd

Reg No: R1988890

EA No: 14C7279

• Monthly salary $4500 + $6000 + Variable Bonus

• Company located at Woodlands

• Monday – Friday: 8:30am – 5:30pm

• Excellent Welfare & Benefits

• Well Established Industrial Automation Company (MNC)

Job Scope

• Analyze project requirements and develop innovative solutions to meet customer needs.
• Design high precision and high-tech automation equipment, ensuring that it meets performance, quality, and reliability standards.
• Select components such as servo axes and robots based on project requirements.
• Coordinate with fabrication houses and component suppliers to ensure timely delivery of parts and components.
• Guide assembly technicians in building and testing the equipment, ensuring that it meets design specifications and performance requirements.
• Conduct design reviews and provide feedback to ensure continuous improvement of our products.
• Stay up to date with the latest developments in mechanical engineering and automation technology.
• Other duties as assigned.

Requirement

• Degree in Mechanical Engineering / Mechatronics or related disciplines
• 4 - 6 years of relevant experiences in automation equipment design
• Experience in factory automation / electrical, pneumatic, and sensor component selections is an advantage
• Proficient in SolidWorks 3D software

Candidates are encouraged to apply this position via Apply Now button with the following information in the resume:

• Work experiences and job responsibilities
• Current and Expected salary
• Reason for leaving
• Date of availability
• Education background

We regret that only shortlisted candidates will be contacted.

KHOO SOT MEI (R21102604)

EA Recruitment Pte Ltd

EA License No: 21C0492

Position title : Goldsmith

Location: Farrer Park

Working Days: 6 days a week (Must be able to work on weekends)

Working hours : 11am to 9pm

Salary : $3,500

Key Responsibilities:

1. Designing Jewelry and Objects:Create custom designs for jewelry (rings, necklaces, bracelets, etc.) based on customer requests or original ideas.
   Sketch or use computer-aided design (CAD) software to create detailed blueprints of the final product.
   
2. Metalworking:Melt and alloy gold and other metals to achieve the desired color, strength, and consistency for specific pieces.
   Shape and mold the metal using various techniques such as casting, forging, and soldering.
   
3. Casting and Shaping:Pour molten gold into molds to create base shapes for jewelry, and refine or finish pieces through techniques like hammering, rolling, or polishing.
   Use tools such as files, pliers, and hammers to shape metal and add intricate details to the designs.
   
4. Stone Setting:Set precious or semi-precious stones (diamonds, sapphires, etc.) into the metal using various setting techniques such as prong, bezel, or pave settings.
   
5. Finishing and Polishing:Smooth rough edges and surfaces to achieve a high-quality finish.
   Polish pieces using specialized tools to enhance shine and detail.
   
6. Repairing and Restoring Jewelry:Repair damaged jewelry by re-soldering, re-setting stones, or replacing broken parts.
   Restore old or antique pieces to their original form, while maintaining or enhancing their integrity.
   
7. Quality Control:Inspect finished pieces to ensure they meet design specifications, quality standards, and durability.
   Ensure that the weight, size, and quality of metals and gemstones are as required by the customer or company.
   
8. Customer Interaction:Consult with clients to understand their preferences, budget, and desired outcomes.
   Make adjustments to designs based on feedback or specific requests.
   

Chew Xing Shan Reg No: R22107044

The Supreme HR Advisory Pte Ltd EA No: 14C7279

WhatsApp: +65 83592812 [Shannon]

(2 years contract, conversion or extension based on performance)

• Involved in large projects ranging from commercial, industrial, institutional, residential, healthcare and etc.
• Coordinate and carry out tender, evaluation, recommendation and award processes.
• Confidently administer the contract and effectively manage the project team and Consultants for best results.
• Proactively identify and resolve technical coordination, site and/or authorities compliance problems.
• Well versed with planning, codes and building regulations and be updated on contractual and authorities’ requirements.
• Strong design portfolio exhibiting a range of sustainable design project experience.
• Possess creative design thinking and excellent design detailing skills.

Requirements

• Architectural masters/degree recognized by Board of Architects Singapore.
• Minimum 5 years of post graduate architectural experience.
• Bim/Revit, Archicad, Autocad, Sketchup, In-Design, as well as basic rendering and graphics publishing software programs.

Other information

• 2 years contract basis (upon expiry of contract, either extension or conversion to perm based on performance, there is no bond to be served)
• All company benefits will be the same as a permanent staff

Interested and suitable candidate kindly click quick apply. Resume will be routed to Jasmine Chin Yan Min. We regret that only suitable candidate will be notified.

GEMS Recruit/EA License: 23C1459

EA Personnel No: R1442379 (Jasmine Chin Yan Min)