Key Responsibilities
• Fast development of analog IC physical designs, including layout drawing, DRC, LVS
• Layout extractions and analysis for IC designers
• Develop analog and/or digital library cells in various technologies (e.g. CMOS & SOI)
• Layout digital cells for various trade-offs (including speed, power, area, reliability)
• Layout analog circuits and IO circuits
• Characterize digital cell cells for timing and power analyses
• Construct test structures for validating various digital and analog cells
• Layout integration and optimization
• Advise IC designers for best layout practice
• Work with the IC design team to deliver IC physical designs
• Support the team lead for layout design integrations
Minimum Requirements
•Degree in electrical engineering or related field
• Strong experience in analog physical design, particularly bandgap, amplifier, comparator, LDO, current sensing, power switch, etc.
• Proficiency with industry-standard tools such as Cadence, Spectre, HSPICE, and Matlab
• Familiarity with CMOS, BiCMOS, and other process technologies
• Excellent problem-solving skills and ability to work in a fast-paced startup environment
• At least 3-year experience of analog layout design with at 2 IC product tapeouts.
• Some understanding of circuit analysis and implementation
• Strong expertise in power management including DC/DC converter design.
• Able to do design verifications