ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

As part of IME Integrated Circuit Design and System Department, we are looking for a candidate with relevant experience in ultrasound imaging system design. This candidate will define an ultrasound transducer array beamformer IC architecture for imaging applications. The candidate will work closely with MEMS team on system architecture, circuit design, simulation, validation, and integration.

Role & Responsibilities

• Perform system-level beamformer architecture, design, and simulation, to derive circuit-level design specifications.
• Beamforming array optimization using AI algorithms.
• Design and implementation of beamformer algorithm in hardware.
• Work together with team to investigate novel circuit/system solutions to create new inventions.

Requirements

• Master’s / PhD degree in Electrical Engineering or equivalent
• Good understanding of ultrasound imaging systems and beamforming theories.
• Knowledge of AI algorithms and implementation will be a plus
• Familiar with IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

Scratch is a design and build consultancy that is focused on developing holistic spaces in the built environment for residential and commercial applications.

We are looking for design oriented self-starters, with high level of attention to detail and curiosity for innovation.

Project Managers to be Involved in:

1. Project coordination and site planning, handling of schedule and timelines.

2. Purchasing with suppliers, and delivery coordination with quality assurance.

3. Communication with team and stakeholders with 3D and 2D CAD visualisation and drawings.

4. Client coverage and to develop a close relationship with all stakeholders throughout duration of project.

This position reports to the project director and interfaces with design and projects team, contractors, suppliers and clients.

Technical Skills and Competencies:

- Active participation in strategic planning process, including developing goals and objectives.

- Active learning in project management software, while forecasting effective management of stakeholders.

- Active familarisation in 2d and 3d visualisation software.

- Active coordination of various subs, elements, sourcing and fabrication within the project.

- Self motivated and willingness to learn.

Scratch is committed to an employee-orientated, high performance culture that emphasises empowerment, quality, continuous improvement, and the recruitment and on-going development of a superior workplace.

This position is open for both recent graduates and mid-career individuals (mature and non mature).

Graduates interested in this position should possess a Degree and above qualification.

Mid-career individuals from any qualification level can apply.

Interns can apply for traineeship positions.

Benefits:

• Competitive salary
• Health and wellness allowance
• Paid time off and holidays
• Opportunities for professional growth and development
• Collaborative and creative work environment

How to Apply:

Please submit your resume, portfolio, and a cover letter outlining your experience and design philosophy to [email protected]

As part of IME Integrated Circuit Design and System Department, we are seeking a candidate with relevant experience in analog integrated circuit design. This candidate will contribute to developing analog circuit blocks e.g. low-power operational amplifiers, voltage/current references, and voltage regulators based on thorough topology analysis. This candidate will work closely with other team members for the circuit design, test verification, as well as system integration and validation for a broad range of innovative sensor systems.

Role & Responsibilities

• Circuit schematic design and simulation, layout supervision, pre-tapeout design verification, test plan development and chip measurement
• Work together with teams to investigate novel circuit/system solutions to create new inventions

Requirements

• Bachelor’s / Master’s degree in Electronic Engineering
• Good understanding of CMOS analog IC design methodologies
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

Job Responsibilities:

• Identify project design hazards, construction risks, and constructability issues.
• Develop corresponding mitigation measures together with the project team.
• Chair regular risk mitigation meetings and training with clients and internal parties.
• Advise management on alternative safer and higher productivity construction methodologies.
• Review method statements and risk assessments for safety and construction compliance.
• Attend meetings related to construction progress, risks, etc.
• Any other duties as assigned by the Managements.

Job Requirements:

• Have reasonable exposure in safety and health for construction especially on transportation infrastructure projects in a similar nature
• Attended the Design for Safety (DfS) for Professional Course and passed the assessment or equivalent.
• A registered PE or Architect with a Practicing Certificate OR
• Minimum 10 years relevant experience in the design and the supervision of the construction of structures with at least 5 years in design which includes contributions to designs and writing specification
• Have a degree accepted by PE Board or Board of Architect and construction related degree accepted by Singapore Institute of Surveyors (SISV) and Society of Project Managers (SPM)
• Possess excellent leadership, planning, good management skills, interpersonal communication and negotiation skills
• Have experience in LTA projects have an advantage

Job Description

• Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing.
• Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc.
• Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies.
• Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and specification of the products.

Job Requirements

• Bachelor/Masters Degree in Electronics/Electrical/Computer Engineering with min 1 year experience
• Good experience and knowledge in design flow from Netlist to GDS, Floor Planning, Synthesis, route , STA, CTS, RC Extraction and correlation
• Static timing analysis, power and noise analysis and back-end verification across multiple projects.
• Proficient with backend design EDA tools, Synopsys ICC2 preferred
• Successfully track records of taping out complex SOC
• Working knowledge of deep sub-micron routing issues as they relate to power and timing.
• Proficiency using Perl and TCL
• Self-motivated team worker, good verbal and written communication skills

Ethos Search Associates Pte. Ltd.

EA Licence No: 13C6655

EA Reg No: R1109557 Rose

Job Description

• Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing.
• Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc.
• Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies.
• Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and specification of the products.

Job Requirements

• Bachelor/Masters Degree in Electronics/Electrical/Computer Engineering with min 1 year experience
• Good experience and knowledge in design flow from Netlist to GDS, Floor Planning, Synthesis, route , STA, CTS, RC Extraction and correlation
• Static timing analysis, power and noise analysis and back-end verification across multiple projects.
• Proficient with backend design EDA tools, Synopsys ICC2 preferred
• Successfully track records of taping out complex SOC
• Working knowledge of deep sub-micron routing issues as they relate to power and timing.
• Proficiency using Perl and TCL
• Self-motivated team worker, good verbal and written communication skills

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

Staff Engineer, Design Verification

Responsibilities:

You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications.

• The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.

• Develop test plans at block, sub-system, and chip level.

• Execute SoC-based verification at full-chip.

• Write C-based lib packages and tests.

• Architect and implement scalable and reusable test benches using SystemVerilog and UVM.

• Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.

• Automating the test environment for randomized testing and scoreboarding.

• Utilize advanced debugging techniques to identify and resolve design and verification issues.

• Perform root-cause analysis and work with design teams to fix identified issues

• Define and track functional and code coverage metrics to ensure thorough verification.

• Ensure that verification quality meets or exceeds industry standards and project requirements.

• Edge-based AI inference is preferred.

Requirements

• BSEE /MSEE 5-8 years Degree of experience in block, sub-system, and full-chip verification

• Should have delivered multiple chips functioning to Specification.

• Identify and manage verification deliverables, milestones, and schedules.

• Proactively identify potential verification risks and develop mitigation strategies.

• Collaborate with design, architecture, and software teams to understand and verify design intent.

• Communicate verification progress, issues, and results to stakeholders and management.

• Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges

• Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.

• C-based verification in an SoC environment is required

• Experience with ARM processor-based designs and low-power design techniques is a plus.

• Languages: SystemVerilog (UVM), Verilog, C/C++, Python, Perl or Makefile

• Technologies: ARM M/RISC-V (Preferred), AMBA AXI/AHB/APS, DMA, Flow Control, Serial Devices, Qo5

• Preferred technologies: MIPI(CSI/DSI), Crypto, OTP, DSP, Low-Power

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700

About the team:

MediaTek’s Physical design team is responsible to implement top quality digital backend design for our advanced process chips which have billions of transistors. Passionate talent who are eager to join this fast-growing IC design industry and grow together with our passionate team are welcome to apply!

Job Description

• Working on 6nm and below advanced process project APR and Timing/PI sign-off
• Take the TOP and PM role for the complicated hierarchical chip (more than 20M inst plus 500+ macros)
• Take the Block or Block coordinator role for complex blocks
• Do early prediction for critical APR/Timing/PI issues

Job Requirements

• APR/Timing/PI hands-on/tapeout experience on complicated hierarchical chip
• TCL/Perl/Python/C/C++ programming skill
• Have advanced process(n6 or below) experience is a plus
• Excellent communication and team work spirit

Location: One North, Singapore

Important Note: This advertisement is meant to source suitable candidates for future openings for this position.

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

Staff Engineer, RTL Design

Responsibilities:

We are seeking a talented RTL Engineer to join our team in Singapore. As an RTL Engineer, you'll ensure the highest quality products by developing and implementing robust methodologies. Work alongside a talented team of engineers to deliver innovative solutions that meet the evolving needs of our customers.

Responsibilities

• Own and be responsible for pre-tape out quality for digital SOC modules on the MCU

• Explore architecture and develop micro-architecture.

• RTL development for IPs and SOCs using Verilog

• 3rd party IP identification, selection, and integration

• Collaboration with verification and FPGA teams in test plan development and debug

• Collaborate with the Physical Design team to close the design on timing and power targets

• Assist in silicon bring-up and validation;

• Run tool for quality checks (LINT, CDC, and RDC) and fix/waive the issues

Requirements

• Bachelor’s degree in Electronics Engineering, Electrical Engineering, Instrumentation & Control Engineering, or a related field, plus 5-8 years of experience.

• Possess deep and broad knowledge of current and emerging SOC design technologies.

• Have expert knowledge in designing, implementing, and troubleshooting IPs and SOC

• Demonstrate a deep understanding of customer needs and the competitive landscape.

• Ability to estimate the impact of and help plan and lead the implementations and have a positive impact on the entire output

• Can architect and guide programs across the full range of technical areas.

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700

Secretlab is endeavoring uncharted waters by exploring exciting new product categories. Our commitment to innovation and excellence has positioned us as a leader in our industry. As we continue to expand our product portfolio, we are seeking a talented and passionate project lead to join our dynamic team.

Position Overview:

The PCB Designer will spearhead the design and development of PCB’s. This pivotal role entails team leadership, ensuring projects align with quality benchmarks and deadlines.

Experience:

• 3+ years of experience in PCB design, with a proven track record of successfully designing and manufacturing complex PCBs.
• Experience with high-speed digital circuits, analog circuits, RF circuits, or power electronics is a plus.
• Strong experience with industry-standard PCB design tools (e.g., Altium Designer, Cadence, Eagle, or similar).
• Familiarity with design for manufacturability (DFM) and assembly (DFA) guidelines.

Skills:

• Proficiency in schematic capture, PCB layout, and routing techniques.
• Understanding of signal integrity, high-speed circuit design, and electromagnetic interference (EMI) mitigation.
• Experience with power distribution design, thermal management, and grounding techniques.
• Knowledge of PCB fabrication and assembly processes, including surface-mount technology (SMT) and through-hole components.
• Familiarity with component libraries, part creation, and footprint design.

Qualifications:

• Bachelors degree in electrical engineering, computer engineering or related field.
• 8+ years of progressive leadership experience in engineering teams with expertise in audio DSP engineering.

Job Description

• Industry/ Organization Type: Marine/ Oil & Gas
• Position Title: Design Engineer
• Working Location: Loyang (Transport provided)
• Working Hours: Monday to Friday, 9 am – 6 pm
• Salary Package: Up to $4,200 + Variable Bonus
• Duration: Permanent

Key Responsibilities

• Ensure that engineering designs meet project-specific requirements, adhere to Engineering Standard Practices, and align with the company's ISO procedures, as well as national and international engineering norms, codes, and safety standards.
• Create essential documents and drawings, including block diagrams, bills of materials, functional design specifications, design calculations, wiring diagrams, and other necessary documentation. These ensure that equipment can be procured, integrated, tested, installed, and delivered to the customer on schedule.
• Verify that equipment provided for specific projects meets relevant specifications, complies with project technical standards, is correctly configured, and is fully completed.
• Ensure that the specified and designed equipment can be effectively integrated with other systems and equipment with which it interfaces.
• Develop test procedures suitable for project commissioning and provide technical support to the system assembly and integration team.
• Carry out other tasks as assigned by the Projects & Retrofit Manager or Assistant Manager.

APPLY NOW!!!

• At least a Diploma in IT or Engineering with minimum 2 years of related working experience.
• Proficient with AutoCAD and MS Office.
• Proficiency in one or more of the following systems:

1. LAN & IP Telephony: Experience in voice/data network design, implementation, and deployment; familiar with Juniper, Cisco, and HP Procurve switches and routers.
2. Radio Communication: Expertise in HF/VHF/UHF/Microwave/VSAT systems; capable of frequency interference analysis and radio coverage analysis; familiar with analogue/digital radio systems and trunked radio systems.
3. PAGA System: Experience in PAGA system design and sound coverage analysis simulation.
4. Security Systems (CCTV & Access Control): Experience with analogue/IP CCTV and access control systems; familiarity with Pelco, Bosch, Synetic, GE, LENEL, Bosch systems; PLC system experience is a plus.
5. Navigation Systems: Knowledge of Aeronautical VHF Radio, Meteorological Monitoring, Non-Directional Beacons, Marine Radar, GMDSS, Gyrocompass, and Navigation Aids.

Please apply through ANY of the following methods:

• Submit your application by clicking the APPLY button;
• Email your resume to Job(at)anradus.com.sg. Please indicate #68836 on the email subject.

Anradus Application Policy: We value each application and ensure every resume is reviewed. Our process is efficient, typically concluding within 3 working days. If you do not receive communication from us within this timeframe, it's likely that your application has not been shortlisted by our client. In such cases, we recommend continuing your job search to maximize your opportunities.

Anradus Pte Ltd | EA License No. 20C0161 | Adelin Chong | EA Reg No.: R1875641

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

Staff Engineer, Design Verification

Responsibilities:

You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications.

• The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.

• Develop test plans at block, sub-system, and chip level.

• Execute SoC-based verification at full-chip.

• Write C-based lib packages and tests.

• Architect and implement scalable and reusable test benches using SystemVerilog and UVM.

• Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.

• Automating the test environment for randomized testing and scoreboarding.

• Utilize advanced debugging techniques to identify and resolve design and verification issues.

• Perform root-cause analysis and work with design teams to fix identified issues

• Define and track functional and code coverage metrics to ensure thorough verification.

• Ensure that verification quality meets or exceeds industry standards and project requirements.

• Edge-based AI inference is preferred.

Requirements

• BSEE /MSEE 5-8 years Degree of experience in block, sub-system, and full-chip verification

• Should have delivered multiple chips functioning to Specification.

• Identify and manage verification deliverables, milestones, and schedules.

• Proactively identify potential verification risks and develop mitigation strategies.

• Collaborate with design, architecture, and software teams to understand and verify design intent.

• Communicate verification progress, issues, and results to stakeholders and management.

• Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges

• Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.

• C-based verification in an SoC environment is required

• Experience with ARM processor-based designs and low-power design techniques is a plus.

• Languages: SystemVerilog (UVM), Verilog, C/C++, Python, Perl or Makefile

• Technologies: ARM M/RISC-V (Preferred), AMBA AXI/AHB/APS, DMA, Flow Control, Serial Devices, Qo5

• Preferred technologies: MIPI(CSI/DSI), Crypto, OTP, DSP, Low-Power

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700

Leading provider of semiconductor equipment

Senior Design Engineer

Responsibilities:

• Manage mechanical design team

• Ensure mechanical design process meets schedule

• Conduct transforming, conceptualization and design review session with internal design team

• Continuous review, development, enhance and improve company products

• Provide technical support and solutions to products inquiry

Requirements:

• Degree in Mechanical, Mechatronics Engineering or equivalent

• Minimum 8 years of design experience in factory automation design

• Minimum 3 years in design supervisor experience

• Experience in semiconductor equipment handler will be an added advantage

• Analytical minded with strong organizational skills

• Proficient in using 3D software

• Able to effectively, interact with a variety of personnel at all organizational level and customers

Interested applicants, please email detailed updated resume in MICROSOFT WORD format and indicating your current salary and expected salary to:

[email protected]

David Lim

Principal Consultant/Manager

Registration No.: R1102027

[email protected]

FA Search Pte Ltd (lic no. 07C4794)

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

RTL Lead Engineer

Responsibilities:

We are seeking a talented RTL Engineer to join our team in Singapore. As an RTL Engineer, you'll ensure the highest quality products by developing and implementing robust methodologies. Work alongside a talented team of engineers to deliver innovative solutions that meet the evolving needs of our customers.

Responsibilities

• Own and be responsible for pre-tape out quality for digital SOC modules on the MCU

• Explore architecture and develop micro-architecture.

• RTL development for IPs and SOCs using Verilog

• 3rd party IP identification, selection, and integration

• Collaboration with verification and FPGA teams in test plan development and debug

• Collaborate with the Physical Design team to close the design on timing and power targets

• Assist in silicon bring-up and validation;

• Run tool for quality checks (LINT, CDC, and RDC) and fix/waive the issues

Requirements

• Bachelor’s degree in Electronics Engineering, Electrical Engineering, Instrumentation & Control Engineering, or a related field, plus 10-12 years of experience.

• Possess deep and broad knowledge of current and emerging SOC design technologies.

• Have expert knowledge in designing, implementing, and troubleshooting IPs and SOC

• Demonstrate a deep understanding of customer needs and the competitive landscape.

• Ability to estimate the impact of and help plan and lead the implementations and have a positive impact on the entire output

• Can architect and guide programs across the full range of technical areas.

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700