The division facilitates research collaboration agreements with partners and manages the adoption of research outputs by identifying, protecting, and licensing project IP to the industry.

The candidate will report to Director of the division. S/he is responsible for managing Technology Transfer for the university, namely, managing the Intellectual Property (IP) portfolio arising from research output. The job scope includes drafting and negotiation of research and licensing agreements, educating and creating awareness of intellectual property to academic staff, protecting and valuing the IP, structuring and negotiating IP licensing deals, conduct market landscape analysis as well as managing IP database and analysis.

Responsibilities

• Regularly review, update and formulate Intellectual Property Policy to evolve with progress of the university and industry feedback
• Develop and regularly review IP licensing strategies, licensing structure and guidelines to maximise adoption of research output
• Structure and negotiate contracts, such as research collaboration and IP licensing agreements
• Perform prior art searches, including liaise with external IP firms on IP searches and filings
• Assess value of IP, structure and negotiate on IP licensing deals
• Develop and manage an IP Management System
• Conduct market landscape analysis to identify and engage research collaborators and potential licensees
• Generate statistical reports with analysis on the impact of research output
• Create IP awareness and education, as well as provide IP advisory to academic staff and colleagues; and
• Work on strategic cross-divisional initiatives and University-wide planning
• Any other responsibilities

Requirements

• Strong knowledge with minimum of 10 years of relevant experience in Intellectual Property (IP) Management;
• Recognised IP-related qualifications or legal qualifications with experience in managing IP;
• Experience in managing collaboration agreements and licensing negotiations;
• Enjoy working closely with industry, academic staff and students in an Institute of Higher Learning;
• Strong leadership qualities, and self-motivated to improve processes and solve problems;
• Able to multi-task and work in a fast-moving environment;
• Possess strong analytical skills, strategic thinking and an eye-for-details; and
• Have good persuasive writing, communication and interpersonal skills.

Interested candidates are invited to submit their MS Word formatted CV with the current and expected salary remunerations.

• JonDavidson Pte Ltd • EA Lic-22S1412 • MOM Reg No-R1440770 •

Advance Packaging Integration – Senior Engineer (Package Development Engineering, Silicon Technology Package Integration) (PDE STPI)

We are looking for a Package Silicon Integrator in Package Development Engineering (PDE) Senior Engineer who will lead and drive Micron’s Packaging Technology Development Projects meeting Time to Market (TTM) business unit needs as well as meeting performance targets for Thermal, Electrical, Mechanical, Reliability and Cost. You will collaborate with Micron’s multi-functional team that include Product Development, Wafer level process, Assembly, Test, Manufacturing and Global Quality. Together, we will be responsible for the designing Test Vehicle Development Strategy, and execution to definition, development, and delivery of state-of-the-art product/packages that will shape the future of advanced computing, automotive and mobile products.

Responsibilities will include, but are not limited to:

• Drive package technology integration activities for the silicon test chip development projects and support NPIs to keep roadmap items on track to meet “go to market” timelines.
• Coordinate core team in Development and NPI space of advanced 2.5D/3D packages and standard packaging to drive material and BOM choices, body sizes, manufacturability, and package constructions to achieve acceptable Design for Manufacturing (DFM) and Design for Reliability (DFR) requirements.
• Evaluate wafer design inclusive of bondpad, scribe, pillars/bump and polyimide, and drive materials and BOM choices such as die thickness and mold compound to meet chip package interaction requirements.
• Drive materials characterization from both package and die components to understand chip package interaction mechanism using TMA, DMA, nanoindentation, and packaging mechanical and thermal stress stimulus.
• Drive novel solutions with silicon design and product teams to recommend the optimum package solutions to meet electrical, mechanical (1st, 2nd, and 3rd level interconnect), thermal, reliability, cost, and other system level requirements.
• Interface closely with multi-functional team that include Product Development, Wafer Level Process, Assembly, Test, Manufacturing and Global Quality and manage the product/package to mass production.

Requirements:

• Bachelor/Masters of Science in physics, materials, mechanical, chemical, or electrical engineering. MS or PhD preferred
• 5+ years of relevant experience in semiconductor manufacturing or a related field, with hands-on experience in semiconductor packaging or Frontend processes, specifically in technology on
• Appreciation for Structured Problem Solving
• Ability to interpret die-, package-, and system-level design and simulation (thermal/mechanical/electrical) methodologies and results
• Knowledge in Chip Package Interaction (CPI)
• Experience and working knowledge with 2.5D/3D heterogeneous integration technologies such as WLFO, SoIC, CoWoS, WoW, InFO, and other chiplet/SiP architectures is a plus
• Experience with wafer bumping, package assembly, substrate technology, BOM selection, testing and product development lifecycle
• Excellent communication skills with the ability to convey complex technical concepts to both technical and non-technical partners
• Demonstrated leadership experience in guiding multi-functional teams and driving technical excellence

Keen on the role? Apply now!

Advance Packaging Integration – Senior Engineer (Package Development Engineering, Silicon Technology Package Integration) (PDE STPI)

We are looking for a Package Silicon Integrator in Package Development Engineering (PDE) Senior Engineer who will lead and drive Micron’s Packaging Technology Development Projects meeting Time to Market (TTM) business unit needs as well as meeting performance targets for Thermal, Electrical, Mechanical, Reliability and Cost. You will collaborate with Micron’s multi-functional team that include Product Development, Wafer level process, Assembly, Test, Manufacturing and Global Quality. Together, we will be responsible for the designing Test Vehicle Development Strategy, and execution to definition, development, and delivery of state-of-the-art product/packages that will shape the future of advanced computing, automotive and mobile products.

Responsibilities will include, but are not limited to:

• Drive package technology integration activities for the silicon test chip development projects and support NPIs to keep roadmap items on track to meet “go to market” timelines.
• Coordinate core team in Development and NPI space of advanced 2.5D/3D packages and standard packaging to drive material and BOM choices, body sizes, manufacturability, and package constructions to achieve acceptable Design for Manufacturing (DFM) and Design for Reliability (DFR) requirements.
• Evaluate wafer design inclusive of bondpad, scribe, pillars/bump and polyimide, and drive materials and BOM choices such as die thickness and mold compound to meet chip package interaction requirements.
• Drive materials characterization from both package and die components to understand chip package interaction mechanism using TMA, DMA, nanoindentation, and packaging mechanical and thermal stress stimulus.
• Drive novel solutions with silicon design and product teams to recommend the optimum package solutions to meet electrical, mechanical (1st, 2nd, and 3rd level interconnect), thermal, reliability, cost, and other system level requirements.
• Interface closely with multi-functional team that include Product Development, Wafer Level Process, Assembly, Test, Manufacturing and Global Quality and manage the product/package to mass production.

Requirements:

• Bachelor/Masters of Science in physics, materials, mechanical, chemical, or electrical engineering. MS or PhD preferred
• 5+ years of relevant experience in semiconductor manufacturing or a related field, with hands-on experience in semiconductor packaging or Frontend processes, specifically in technology on
• Appreciation for Structured Problem Solving
• Ability to interpret die-, package-, and system-level design and simulation (thermal/mechanical/electrical) methodologies and results
• Knowledge in Chip Package Interaction (CPI)
• Experience and working knowledge with 2.5D/3D heterogeneous integration technologies such as WLFO, SoIC, CoWoS, WoW, InFO, and other chiplet/SiP architectures is a plus
• Experience with wafer bumping, package assembly, substrate technology, BOM selection, testing and product development lifecycle
• Excellent communication skills with the ability to convey complex technical concepts to both technical and non-technical partners
• Demonstrated leadership experience in guiding multi-functional teams and driving technical excellence

Keen on the role? Apply now!

As a University of Applied Learning, SIT works closely with industry in our research pursuits. Our research staff will have the opportunity to be equipped with applied research skill sets that are relevant to industry demands while working on research projects in SIT.

The SIT-NVIDIA Joint AI Center represents a collaborative effort between SIT and Nvidia to support AI integration within local businesses, utilizing cutting-edge AI technologies, including foundational and Generative AI models, Large Language Models (LLM), Retrieval-Augmented Generation (RAG), Natural Language Processing (NLP), Computer Vision (CV), and more. SIT is currently on the lookout for Research Fellows to contribute to the Joint Centre. This position offers the chance to partake in pioneering AI research as part of a partnership between academia and industry.

Key Responsibilities

1. Research Execution and Management
• Develop and lead AI projects that integrate modern technologies, aimed at industry-relevant applications.
• Ensure all research activities are compliant with SIT’s ethical standards and operational policies.

2. Collaboration and Networking
• Work closely with NVIDIA and SIT researchers to foster technological exchange and innovation.
• Build partnerships with industry stakeholders to align research projects with market needs and opportunities.
• Participate in networking events to enhance the visibility and impact of research outcomes.

3. Publication and Dissemination
• Produce high-quality research publications for academic conferences/journals and industry white papers.
• Present findings at international conferences, workshops, and industry forums.

4. Mentoring and Leadership
• Mentor graduate students and junior researchers, promoting skill development and professional growth.
• Lead by example in fostering a culture of academic excellence and integrity.

Job Requirements

• PhD in n Computer Science, Artificial Intelligence, Computer Vision, Natural Language Processing, or allied disciplines is required. Preference will be given to candidates with expertise in Large Language Models, as well as the fine-tuning and customization of AI models.
• Proven record of AI research and applications, as demonstrated by publications, patents, or software developments.
• Strong technical proficiency in AI modeling, computational tools, and programming languages relevant to AI research (e.g., Python, CUDA).

Key Competencies

• Experience working in collaborative environments, especially involving industry and academia.
• Demonstrated ability to manage complex projects and multidisciplinary teams.
• Strong communication skills, capable of engaging both technical and non-technical audiences.

Attachment Description:

The trainee must ensure the health and safety of employees in the workplace.

Specific Responsibilities:

1. Creating and putting into place policies and programs to mitigate risk and promote a safe workplace culture.

2. Identifying potential hazards and ensuring safety measures are in place .

3. Providing training on safety protocols and procedures to employees, management, and the general public.

4. Ensuring compliance with health and safety regulations and initiating enforcement procedures when necessary.

5. Responding to and investigating accidents, injuries, and complaints from employees and employers. 6. Keeping records of accidents and incidents, and preparing reports for managers.

7. Overseeing emergency procedures like fire drills and first aid.

8. Communicating with employees and decision-makers to promote a culture of health and safety.

Technical Skills and Competencies:

1. Risk Assessment

2. Coordination of emergency procedures / Coordination and Collaboration 3. Safe working Techniques /Enforce safety policies

4. Policy development

5. Compilation of safety programs

6. Excellent communication skill

Mature Mid Career Individuals- $2, 800

This position is open for mid career individuals (Mature, 40 years and above).

Mid career individuals from any qualification level can apply.

Key Responsibilities:

• Provide comprehensive daily administrative support including but not limited to scheduling, meeting coordination, document management, and travel arrangements.
• Act as a liaison for internal and external communications, ensuring accurate and timely information flow and follow-up.
• Assist in the scheduling and organizing of meetings, including booking conference rooms, preparing materials, taking minutes, and following up on actions.
• Manage day-to-day tasks and projects delegated by the department, ensuring all work is completed on time.
• Handle the reception of clients, partners, and other visitors if needed, arranging necessary meetings and hospitality activities.
• General administrative support, including filing, stamping, and document management.
• Assist department payment schedule, and daily reimbursement.
• Perform other temporary tasks as assigned by the department.

How you can stand out:

• Bachelor’s degree or above, preferably in Administration, Business Management, English, or related fields.
• Excellent written and spoken communication skills in both English and Chinese, with the ability to handle bilingual documents and communication effectively.
• Proficiency in office software (e.g., Microsoft Office Suite), with strong information management and document processing skills.
• Outstanding interpersonal and coordination skills, with the ability to work efficiently.
• Highly meticulous with strong time management and multitasking abilities.
• High sense of responsibility and professional ethics, with the ability to adapt to urgent tasks and a fast-paced work environment.

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Desiwe is committed to providing equal employment opportunities in accordance with country, state, and local laws. Desiwe does not discriminate against employees or applicants based on conditions such as race, colour, gender identity and/or expression, sexual orientation, marital and/or parental status, religion, political opinion, nationality, ethnic background or social origin, social status, disability, age, indigenous status, and union.

Cognita Schools are committed to safeguarding and promoting the welfare of children and young people and expects all staff, volunteers and other third parties to share this commitment. Safer recruitment practice and pre-employment background checks will be undertaken before any appointment is confirmed.

An exciting opportunity for a Secondary Design Technology Teacher has opened in AIS. If you are someone who is driven in making a positive difference and with passion for growth and development, this role is meant for you!

Position Requirements:

• IBDP/IGCSE and/or HSC experience preferred, but not essential
• Experience in an International School environment would be a distinct advantage
• Excellent communication skills, multi-tasking and time management
• Ability to work as a part of a team and an interest in participating in the wider school community

Qualifications:

• A minimum four year recognised teaching qualification including a Bachelor’s Degree and Postgraduate Teaching Diploma/University Qualification or a Bachelor of Education
• A minimum of 3 years Full Time teaching experience in a recognised educational institution ideal, however graduates may be considered

Further information about this position is available in the job description found in the AIS website at https://www.ais.com.sg/work-for-us-positions-vacant/

Applicants are required to read the job description for the role prior to applying and submit a cover letter, curriculum vitae and a duly completed copy of the School's Job Application Form (downloadable from the school's website) to the email address: [email protected] by 17 December 2024. Kindly ensure that the position title is clearly specified in the job application form.

Only applications submitted using the school's job application form will be considered.

Cognita Schools are committed to safeguarding and promoting the welfare of children and young people and expects all staff, volunteers and other third parties to share this commitment. Safer recruitment practice and pre-employment background checks will be undertaken before any appointment is confirmed.

An exciting opportunity for a Secondary Design Technology Teacher has opened in AIS. If you are someone who is driven in making a positive difference and with passion for growth and development, this role is meant for you!

Position Requirements:

• IBDP/IGCSE and/or HSC experience preferred, but not essential
• Experience in an International School environment would be a distinct advantage
• Excellent communication skills, multi-tasking and time management
• Ability to work as a part of a team and an interest in participating in the wider school community

Qualifications:

• A minimum four year recognised teaching qualification including a Bachelor’s Degree and Postgraduate Teaching Diploma/University Qualification or a Bachelor of Education
• A minimum of 3 years Full Time teaching experience in a recognised educational institution ideal, however graduates may be considered

Further information about this position is available in the job description found in the AIS website at https://www.ais.com.sg/work-for-us-positions-vacant/

Applicants are required to read the job description for the role prior to applying and submit a cover letter, curriculum vitae and a duly completed copy of the School's Job Application Form (downloadable from the school's website) to the email address: [email protected] by 17 December 2024. Kindly ensure that the position title is clearly specified in the job application form.

Only applications submitted using the school's job application form will be considered.

Job Highlighted

- 5 days work week

Job Description

- Handle full sets of accounts AR, AP, GST F5 submission for two companies

- Perform monthly closing reports, bank reconciliation

- Manage debtors' control

- Submit quarterly GST report

- Process monthly payroll and generate payroll report

- Any other ad-hoc duties as assigned

Job Requirements

- Proficient in MS Words and MC Excel

- Familiar with Autocount software

- At least 2 years of relevant work experience

Job Summary:

You will be responsible for creating sales opportunities through specification of ADLINK product solutions, so as to achieve profitability and growth in market share. Additionally, you will assist to advice and support the sales team in terms of product’s applications.

Job Responsibilities:

• Understand customer’s technical needs and project specifications, ensure client’s needs and expectations are attainable and realistic, in relation to the product solutions that we offer.
• Attend customer’s meetings, and to present technical solutions to potential customers.
• Expected to facilitate workshops and trainings for customers and internal staffs, whenever necessary.
• ·Also expected to provide pre- and post- sales technical support and product demonstration as and when necessary.
• Advice and support the sales team on the selection of suitable products, technical assistance, and product strategies to win more businesses.
• ·Work effectively as a part of a team to achieve individual, team and departmental objectives, sharing knowledge and skill as appropriate.
• Maintain a sound technical/ application knowledge base on all ADLINK product solutions.

Job Requirements:

• Diploma/Degree in Electronics / Electrical / Software Engineering.
• Minimum 3-5 years of working experiences.
• Possess good knowledge of Embedded Computing, Automation, Test & Measurement applications and solutions.
• Proficient knowledge of VB, VC++, C# Programming languages.
• Able to debug PC-based Automation Control, Test & Measurement peripheral card issues.
• Meticulous, Well organize and good working attitude
• Disciplined, independent and able to perform under pressure.
• Willing to travel within short notice e.g., Training, Trade shows, etc.

Duties :

1. Prepare and give pre-sales technical assistance and after sales support to customers

2. Communicate with the team to understand customer demands and offer sales support where necessary

3. Secure orders, ensure product standards and timely fulfilment of orders

4. Establish customer rapport and acceptance

5. Help customer to solve problems with product usage

6. Recommend new and improved products to customers and explain how product will be more cost effective

7. generate Sales leads, cold call, follow up with customer enquiries

Requirements :

1. Reliable technical background

2. Ability to work with others as a team

3. Ability to build customer relationships easily

4. Analytical ability and great problem-solving skills

5. Presentation skills and ability to convey product value

6. Self-confidence to support persuasion and sales efforts

7. Possess drive and self motivated

8. Diploma/ITE in Engineering (preferably in Mechanical Engineering)

9. 1-2 years experience through fresh graduate are welcome

Job description can include a variety of tasks, such as:

• Communication: Answering and redirecting phone calls, taking messages, and liaising with suppliers, contractors, and other departments
• Scheduling: Managing diaries, scheduling meetings, and booking rooms
• Travel and accommodation: Arranging travel and accommodation
• Office supplies: Ordering office supplies and consumables for office equipment
• Information management: Preparing, organizing, and storing information in paper and digital form
• Correspondence: Typing up letters and reports, and preparing correspondence
• File management: Filing electronic and paper copies
• Data entry: Updating computer records using a database
• Meeting minutes: Taking minutes at meetings
• Project management: Tracking deadlines and facilitating communication
• Accounting: Handling expense reporting, invoicing, and basic accounting tasks

Job requirement:

• Able to work well with others
• Able to work on your own.
• Sensitivity and understanding.
• Flexible and open to change.
• Excellent verbal communication skills.
• Customer service skills.
• Able to use a computer and the main software packages competently.
• Lauguage: English and Mandarin
• Be thorough and attentive to details

As a PDE Central Process Integration Principal Engineer, you will lead the development and integration of assembly and packaging processes for cutting-edge semiconductor products, such as DRAM, NAND, controllers, graphics, 3D-stacked (3DS) technologies, and High Bandwidth Memory (HBM). The ideal candidate will drive innovation in packaging technology and ensure seamless process integration during new product introductions.

This position involves working closely with multi-functional teams to research, design, and implement new packaging solutions while optimizing production yields and ensuring the successful commercialization of next-generation semiconductor technologies.

JOB RESPONSIBILITIES

Promote worldwide synergy

• Improve benchmark performance and efficiency gains through global project management and execution
• Network BKM leveraging and enhancement, business process creation and re-engineering
• Maintain a strong and open relationship with peer group and managers in other functional areas within central team and outside in areas such as Sites, TD, Product Engineering, Global Quality
• Help drive and fix the issue where necessary

Drive FE-AT Integration initiatives

• Business process governance between Fab – Assembly (WSPEC, FE2BE forum, WPSWAT)
• Lead & drive FE-AT excursions
• Yield, DPM related issues that involves both Fab – Assembly

Cross sites benchmark & achieve BIC yield performance

• Lead PI programs, PI Loop taskforce and/or team in network to address yield and quality challenges, optimize process flow

Identify, Propose & Drive new initiatives programs

• Propose & lead strategic programs to shift left/ shorten cycle learning across TN phase (PD, NPI, HVM)
• Process flow simplifications & standardizations
• Cross technology streamline (Process, tools, etc)
• Sites expansions process & qualification requirements
• Drive roadmaps with multi-functional teams (FE, AT Procurement, APTD, APPDE)

JOB QUALIFICATIONS

• Bachelor's degree in Engineering (Electrical, Mechanical, Materials Science, or related field).
• 3+ years of experience in semiconductor packaging technology development, process integration, or new product introduction (NPI)
• Strong background in frontend fabrication processes (FAB)
• Proven experience in data analysis, statistical process control (SPC), and process optimization.
• Strong problem-solving skills, attention to detail, and a proactive approach to technology development.
• Excellent communication and teamwork skills, with the ability to work across departments and with external partners.
• Hands-on experience in the development and implementation of cutting-edge semiconductor packaging technologies.
• Experience leading multi-functional teams in process development, technology transfer, and ramp-up.
• In-depth knowledge of the latest industry standards and trends in semiconductor packaging and assembly.

As a PDE Central Process Integration (PI) Senior Engineer, you will lead the development and integration of assembly and packaging processes for cutting-edge semiconductor products, such as DRAM, NAND, controllers, graphics, 3D-stacked (3DS) technologies, and High Bandwidth Memory (HBM). The ideal candidate will drive innovation in packaging technology and ensure seamless process integration during new product introductions.

This position involves working closely with multi-functional teams to research, design, and implement new packaging solutions while optimizing production yields and ensuring the successful commercialization of next-generation semiconductor technologies.

JOB RESPONSIBILITIES

Promote worldwide alignment

• Improve benchmark performance and efficiency gains through global project management and execution
• Network BKM leveraging and enhancement, business process creation and re-engineering
• Maintain a strong and open relationship with peer group and managers in other functional areas within central team and outside in areas such as Sites, TD, Product Engineering, Global Quality
• Help drive and fix the issue where necessary

Drive FE-AT Integration initiatives

• Business process governance between Fab – Assembly (WSPEC, FE2BE forum, WPSWAT)
• Lead & drive FE-AT excursions
• Yield, DPM related issues that involves both Fab – Assembly

Cross sites benchmark & achieve BIC yield performance

• Lead PI programs, PI Loop taskforce and/or team in network to address yield and quality challenges, optimize process flow

Identify, Propose & Drive new initiatives programs

• Propose & lead strategic programs to shift left/ shorten cycle learning across TN phase (PD, NPI, HVM)
• Process flow simplifications & standardizations
• Cross technology streamline (Process, tools, etc)
• Sites expansions process & qualification requirements
• Drive roadmaps with multi-functional teams (FE, AT Procurement, APTD, APPDE)

Requirements

• Bachelor's degree in Engineering (Electrical, Mechanical, Materials Science, or related field).
• 3+ years of experience in semiconductor packaging technology development, process integration, or new product introduction (NPI)
• Strong background in frontend fabrication processes (FAB)
• Proven experience in data analysis, statistical process control (SPC), and process optimization.
• Strong problem-solving skills, attention to detail, and a proactive approach to technology development.
• Excellent communication and teamwork skills, with the ability to work across departments and with external partners.
• Hands-on experience in the development and implementation of cutting-edge semiconductor packaging technologies.
• Experience leading multi-functional teams in process development, technology transfer, and ramp-up.
• In-depth knowledge of the latest industry standards and trends in semiconductor packaging and assembly.

Keen on the role? Apply now!

Overview

A technically focused role with responsibility for planning, managing, and installing of the technical (AV, SX, LX, and power supply) infrastructure for Live Events in Singapore & the South East Asia Region. Ideally the candidate would have 20+ years proven experience in all technical departments including Audio Systems, Rigging, Lighting, Video Projection, LED Screens, Media Servers, Camera Systems, Electrical & Power Management.

The candidate should have a proven track record of delivering high quality technical solutions for live events across all major markets and have experience in delivering projects in South East Asia and China. The candidate should have a high level of understanding of the following software applications: AutoCAD, Vector Works, Unreal Engine 5.0, Depence R3, Capture, WYSIWYG, PowerPoint, Excel, Rental Point, Easy job. The candidate should have previous experience for programming on the following media server platforms: Watchout, Disguise, Pixera, Millumin. The candidate will have to solve problems in the workplace and on site, detect risks all throughout the projects and therefore must have excellent management & communication skills. He will need to work with budgets and deliver projects to an agreed level of profitability. He/she must also be flexible, particularly with the hours of work, to achieve the best results and a successful project.

Responsibilities:

• Co-ordinate and arrange site visits with clients & all necessary suppliers to ensure a high level of planning for all projects
• Training recommendations & management of internship program
• Identifying and targeting areas that can help CT by keeping management updated on technical advances in software/equipment related to/beneficial to CT
• Support the management team in procuring new technology
• Observe health & safety procedures both at work and on site.
• Regular communication with the GM for business updates
• Work with the Project Manager to ensure the technical elements of the budget are kept within limits agreed with client. Maintain accurate records of any technical budget expenditure.
• Work with the Project Managers to oversee, negotiate and manage any regulatory requirements with local authorities.
• Work with the Project Manager to develop technical schedules for installation and delegate tasks to technical crew assigned to help in this department.
• Co-ordinate, reserve and book sub-hired equipment when required, negotiating terms with suppliers to ensure maximum profitability
• Oversee all projects and advice Project Managers on technical requirements, to recommend and prepare specifications for equipment to be used for all projects
• Staff Development in providing guidance and support to junior technical staff through ongoing learning and training sessions.

Key Abilities to include:

• Excellent organisational and planning skills
• Outstanding communication and negotiation abilities.
• Ability to identify challenges and work through problem-solving solutions in a pressurised environment
• A team player with strong leadership and delegation skills
• Flexible to support the ever-changing workflow of multiple live event projects
• Ability to multitask and ensure all ongoing concurrent projects are successful

Job Title: Project Manager

Location: Singapore; APAC Region (Thailand, Indonesia, Malaysia)

About Freyr Technology:

Freyr Technology, founded in 2021, specializes in cutting-edge fields such as XR and AI, with business operations spanning the APAC region. As partners with industry leaders such as NVIDIA, we aim to revolutionize the digital landscape through innovative technologies and strategic investments across Southeast Asia.

We are seeking an experienced Project Manager to join our team. In this role, you will lead GPU cloud project deliveries, manage compute cluster construction, and evaluate technical solutions. You will collaborate closely with internal business and technical teams while engaging with external clients and product suppliers to ensure successful project execution and risk management.

Responsibilities:

• GPU Cloud Project Delivery: Oversee the implementation and delivery of GPU cloud projects and compute cluster construction.
• Technical Evaluation: Conduct technical solution reviews to ensure quality and feasibility.
• Internal Collaboration: Coordinate with internal business and technical teams to develop and refine industry-specific business scenarios and delivery models for application within the organization.
• External Communication: Act as the primary liaison between external clients and product suppliers to manage project timelines, mitigate risks, and ensure delivery quality.
• Best Practice Development: Explore and document industry-leading practices for delivery models and apply them to improve team processes.

Qualifications:

• Experience: At least 3 years of experience in cloud computing or related industries, with a track record of delivering medium to large-scale cloud and compute cluster projects.
• Certifications: PMP certification and experience with major cloud providers’ project solutions and delivery processes are preferred.
• Technical Expertise: Familiarity with mainstream enterprise cloud architectures, compute cluster solutions, and best practices for project delivery.

Skills:

• Strong project delivery and coordination capabilities.
• Excellent learning ability, communication, and logical thinking skills.
• A strong sense of responsibility, service awareness, and stress management skills.
• Team Building: Proven ability to develop internal project delivery capabilities and translate business scenarios into effective delivery practices.

As an Accelerated Technology Package Development Engineering (ATPDE) Strategic Program Manager, you'll drive ATPDE's Engineering Strategy Programs in collaboration with Technical Experts and Senior Leaders within ATPDE, PDE, Global Assembly & Test, and Global Quality. This role demands strong project management, proficiency in MS suite, data analytics, dashboard/report creation, excellent English communication skills, people engagement, tenacity, resourcefulness and strategic vision to support Micron’s key initiatives.

Key Responsibilities

Lead strategic engineering initiatives by creating plans, setting achievements, and prioritizing tasks while maintaining consistent communication with partners. Predict risks and challenges, manage program prioritization and timelines, and balance business requirements against technical and operational limitations. Additionally, you must establish both quantitative and qualitative metrics to assess the effectiveness and efficiency of key programs, implement systems and processes, and oversee and drive programs to successful completion:

• Drive Accelerated Technology for PDE (ATPDE) Global network management to develop & implement strategic, process development, technode development and quality engineering programs that are aligned with PDE and Micron’s quality strategic objectives
• Structure and implement analysis to develop recommendations and drive execution / implementation in a fast-paced, data-driven environment.
• Identify continuous improvement opportunities in business process and cross-functional/regional quality functions
• Engage various partners from technical experts to senior leadership to facilitate and drive key strategic & quality engineering programs for ATPDE, PDE & global Assembly & Test network.
• Being able to apply project management skills to initiate, plan, implement, drive, and evaluate the project effectiveness
• Must have a strong data analytic skill, coding & script (phyton), dashboard (Power BI/ Tableau etc.) design and development skills
• Publish on-time weekly business reports.

Requirements

• Bachelors in any Engineering or Science (Data Analysis/Statistics) or related
• Experiences in Technology/IT project management
• Experiences in high technology or semiconductor industry
• Experiences working across time zones in multi-functional global teams
• Proficiency in data analysis, dashboard design and development (Power BI/Tableau, etc.), project management, and English communication
• Knowledge and experience in automation, product, or process engineering is advantageous.
• Strong project management skills
• Strong analytical skills and effective problem solvers, with ability to navigate ambiguity
• Excellent communicator, with the ability to manage and influence partners at all levels
• Strong sense of ownership and ability to work across different functions and Business Units
• High learning agility to quickly understand the value drivers in numerous and diverse types of strategic/ engineering programs/ projects
• Strategic partner engagement capabilities, including clear understanding of partners’ needs, problem statement, and value proposition discovery, various types of business/ engineering analysis (good-to-have)
• Someone who is excited about how their contribution, their value to the organization, can support to transform how the world uses information to enrich life for all with Micron’s memory and storage solutions
• Keen on semiconductor industry

Keen on the role? Apply now!

Responsibilities:

• Maintain and update daily production reports.
• Perform accurate data entry for production reports.
• Verify and receive incoming shipments.
• Prepare purchase orders and ensure timely delivery.
• Handle other administrative duties as assigned.

Requirements:

• 1-2 years of relevant working experience.
• Strong communication and interpersonal skills.
• Able to start work on short notice.
• Great multitasking abilities.

Other Information:

• Work Schedule: 5-day work week (8:00 AM - 5:30 PM).
• Location: Woodlands.
• Transport: Complimentary transport provided from Woodlands MRT.

MOM Licences No: 02C5465

EA Personnel Registration No: R24125030

Responsibilities:

• Oversee and able to control group of inspection, leveraging on your manufacturing and QC experience.
• Apply knowledge of QC sampling techniques and operate measuring instruments effectively.
• Conduct QC sampling inspections to ensure compliance with quality standards.
• Prepare samples and perform quality testing as required.

Requirements:

• 1-2 years of relevant working experience in quality control or a related field.
• Strong communication and interpersonal skills.
• Ability to multitask and work in a fast-paced environment.

Other Information:

• Work Schedule: 5-day work week (8:00 AM - 5:30 PM)
• Location: Woodlands.
• Transport: Transport provided from Woodlands MRT

MOM Licences No: 02C5465

EA Personnel Registration No: R24125030

As a University of Applied Learning, SIT works closely with industry in our research pursuits. Our research staff will have the opportunity to be equipped with applied research skill sets that are relevant to industry demands while working on research projects in SIT.

The primary responsibility of this role is to deliver on a research project, funded by Singapore Ministry of Education (MOE), where you will be part of the research team to develop a scalable and comprehensive framework for formal verification of quantum programs. The framework consists of the following deliverables:
• Intermediate Language. We plan to develop an intermediate language to model quantum programs. The intermediate language would be complete to describe all the desired characteristics of quantum computing while at the same time simple enough to be understood by most programmers.
• Formal Verification Framework. We plan to develop a comprehensive framework to verify the correctness of quantum programs written in the proposed intermediate language.
• Mechanization. We plan to mechanize the formal framework using state-of-the-art theorem provers such as Coq or Isabelle/HOL.
• Proof Automation. We plan to develop formal methods for automatic reasoning that can be materialized into commercial tools.

Key Responsibilities:

• Participate in and manage the research project with Principal Investigator (PI) and the research team members to ensure all project deliverables are met.
• Undertake these responsibilities in the project:
  1. develop an intermediate language to write quantum programs.
  2. develop a comprehensive framework to verify the correctness of quantum programs written in our intermediate language.
  3. mechanize the verification framework using state-of-the-art theorem provers such as Coq or Isabelle/HOL.
  4. develop formal methods for automatic reasoning that can be materialized into commercial tools.
• Carry out Risk Assessment, and ensure compliance with Work, Safety and Health Regulations.
• Coordinate procurement and liaison with vendors/suppliers.
• Work independently, as well as within a team, to ensure proper operation and maintenance of equipment.

Job Requirements:

• Have relevant competence in the areas of formal methods (including theorem proving and model checking, especially theorem proving), quantum computing, and software analysis/verification.
• Have a degree in computer science, computer engineering, or related areas. Possessing a Master’s or PhD degree will be advantageous
• Knowledge of separation logic and quantum program analysis/verification will be advantageous.

Key Competencies:

• Able to build and maintain strong working relationships with people within and external to the university.
• Self-directed learner who believes in continuous learning and development
• Proficient in technical writing and presentation
• Possess strong analytical and critical thinking skills
• Show strong initiative and take ownership of work

Major Challenges:

As quantum computers are operated in extreme physical conditions and thus the cost per run is significantly high, it is desirable to verify the correctness of a quantum programs before the execution. However, the verification task of quantum programs is challenging due to the following reasons:

• Quantum programs (even written at high-level languages) are complicated to comprehend as it requires a good understanding of quantum mechanics and the relevant advanced mathematics.
• The quantum states are exponentially huge in size because the state of a classical bit is either 0 or 1 at any time, while the state of a quantum bit (qubit) can be in the superposition, where both states 0 and 1 can co-exist simultaneously. This induces the state explosion problem for brute-force-like methods.
• Quantum states are naturally probabilistic thus may yield different results on different runs, which is challenging for the testing and debugging methods.

Job description

What will you be doing?

• Develop Applications using Elixir Ambience (Low code Development platform) and other 3rd party tools. Elixir Ambience modules include - ETL, Form Builder, Workflow, Dashboard etc.
• Write custom codes to Integrate External API with Elixir Ambience (Scala, Java, Js)
• Produce technical documentations such as Software Design Document
• Beside the project team, work with Infrastructure team ( internal or external )to setup the different environment such as UAT and PROD
• Be part of System Integration Testing (SIT) & User Acceptance Testing (UAT)
• Support application training for users

Who are we looking for?

• Strong problem-solving, analytical and communication skills
• Experience with Agile and Scrum development methodologies / software development life cycle (Preferred)
• Demonstrate how they can balance perfectionism and pragmatism, balancing speed, maintainability, performance and cost.
• Ability to learn quickly and work independently or as part of a team
• Provide technical feedback to project lead to manage expectations of customers or IT team during requirement gathering, with the desire to simplify instead of making things more complex to meet the business requirements
• Has a healthy sense of skepticism over their own codes and able to debug and test their own codes extensively
• Resourceful and self-driven to pick up new knowledge and skills to stay ahead of technology changes
• Demonstrated good teamwork and positive attitude in meeting project deadlines

Background / Competencies and Skills

• Diploma in Computer Science/ Information Technology or equivalent.
• Well-versed in Java, .NET, JavaScript/HTML5/CSS, SQL, Scala and general software development lifecycle and best practices.
• Understanding of NoSQL Database Architecture & Web Development
• Knowledge of APIs and experience of software integration
• Methodical and good writing skills for documentation purpose

As part of any recruitment process, we collect and processes personal data relating to job applicants. We are committed to being transparent about how we collect and use that data and to meeting our data protection obligations. By sending us your resume you agree to the collection, use and/or disclosure of your personal data in the manner as set out in our Data Protection Notice for Job Applicants.

As a standard cell design engineer in the Physical Design Group, you will develop your skills working on some of the most sophisticated process nodes targeting the largest foundries. You will contribute to designing our physical IP standard cell offerings for our internal and external customers at leading edge nodes including 5nm and beyond. Work with partners inside the company, as well as our partners in the EDA and foundry space.

Responsibilities:

· Design standard cell circuits and verify them for functionality, performance, and power

· Generate and validate EDA model views of standard cells

Required Skills and Experience :

· 5+ years of relevant circuit design experience (for BSEE)

· 3+ years of relevant circuit design experience (for MSEE)

· Experience with transistor level circuit design using Cadence Virtuoso and circuit simulators such as SPICE, SPECTRE

· An understanding of transistor level device physics and standard cell layout

· Knowledge of power, performance, and area tradeoffs

· An ability to learn a wide variety of industry standard view and modeling formats such as Liberty, Verilog, LEF, NDM, APL, GDS

· Scripting skills in either Tcl, PERL or Python

· Dedication to quality, collaboration, curiosity and continual improvement

• Knowledge of submicron semiconductor technology
• Familiar with digital ASIC/SOC design flow from RTL to silicon characterization
• Familiar with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertion based verification, etc.
• Familiar with design and programming languages: Verilog, System Verilog, Python, Perl, C, C++, etc.
• Familiar with code base management method including subversion, git, GitHub, etc.
• Ability to apply analytical and problem-solving skills
• Strong written and verbal communication skills, ability to negotiate design features and options
• Knowledge of embedded system design, verification, and product development lifecycle
• Deep knowledge and domain know-hows in one or more areas below is a big plus.

Job description

• Experience in UVM verification methodology
• Experience in developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification
• Disciplined, quality-minded, and highly driven for excellence,
• Excellent team player and good communication skills
• MSEE/BSEE in Electrical Engineering or Computer Engineering, with 3 years of relevant experience, but are open to fresh graduates with outstanding results
• Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities

As a University of Applied Learning, SIT works closely with industry in our research pursuits. Our research staff will have the opportunity to be equipped with applied research skill sets that are relevant to industry demands while working on research projects in SIT.

The primary responsibility of this role is to deliver on an industry innovation research project where you will be part of the research team to develop a flexible array ultrasound imaging system for velocity estimation.

Key Responsibilities:

• Participate in and manage the research project with Principal Investigator (PI), Collaborator and the research team members to ensure all project deliverables are met.
• Undertake these responsibilities in the project:
  i. To develop simulation models for flexible array ultrasound system
  ii. To develop custom phantoms for experimental studies
  iii. To design and develop non-linear signal processing algorithms including deep learning algorithms for image reconstruction
• Carry out Risk Assessment, and ensure compliance with Work, Safety and Health Regulations.
• Coordinate procurement and liaison with vendors/suppliers.
• Work independently, as well as within a team, to ensure proper operation and maintenance of equipment.

Job Requirements:

• Have relevant competence in the areas of digital electronics, signal processing, machine learning and deep learning.
• Have a B-Engg or B. Tech degree in Electronics, Computer or Biomedical Engineering with undergraduate projects related to the relevant competence mentioned.
• Knowledge of biomedical signal processing will be advantageous.
• Should have proficiency in Matlab or Python.
• Prior experience in publishing is desirable.

Key Competencies

• Able to build and maintain strong working relationships with people within and external to the university
• Self-directed learner who believes in continuous learning and development
• Proficient in technical writing and presentation
• Possess strong analytical and critical thinking skills
• Show strong initiative and take ownership of work

Major Challenges

• Integration of flexible arrays with research ultrasound platform
• Design and development of deep learning-based flexible array adaptive image reconstruction pipeline