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Job Description
• The candidate is responsible for the design of highspeed wireline receiver >100Gbps.
• The candidate needs to work on the system architecture, schematic design, and mask layout.
• He/she also needs to perform pre and post-layout simulation to ensure the functionality and performance.
Qualifications
• Bachelor or Master degree in Electrical Engineering.
• Experience in EDA tools usage, including Cadence, Spectre, EMX, Synopsys, as well as Matlab.
• Some knowledge on communication system, such as BER, eye diagram, modulation/demodulation, pre-emphasis and etc.
• Open to Fixed Term Contract.
