JOB DESCRIPTION
-Work on SoC/Subsystem define and integration.
-Work on IP developments, Perform Verilog/System Verilog RTL design to meet product specifications and requirements；
-Work with SW Engineer and HW Engineer on all aspect of SoC to optimise Silicon and board level design;
-Work on SoC system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc;
-Work on SoC floorplan with APR and HW Team; SoC timing constraints and review support; SoC DFT support; SoC verification plan and SoC verification support
-Post silicon Debug and support.
JOB REQUIREMENTS
· Bachelor's or master's degree in electronic engineering with more than 5 years ASIC design experience.
· Experience with ASIC design flow
· Experience in RTL coding, RTL and gate-level simulation, logic synthesis, static timing analysis, timing closure and verification
· Experience in video processing and video analytics is a plus
· Experience in USB/SDMMC/DDR IP is a plus.
· Experience in Functional Safety, automotive certification is a plus.
· Passionate and strong in general programming is a plus
· Good understanding of DFT
· Familiar with UNIX/ Linux environment and scriptiing
· Good communication and interpersonal skills
· Strong analytical and problem-solving skills
