Our client is a highly reputed organization in chip design service company invested by an international consortium and founded by a senior chip design technical team.
Responsibilities:
· Works with the front-end design team to complete the chip floorplan, clock architecture, and powerplan.
· Takes charge of the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tapeout.
· Researches the physical design methodology of advanced process nodes, and builds an automatic physical design platform.
Skills/Requirement:
· Holds a bachelor's degree or above in electronic engineering, microelectronics, or computer science.
· At least five years of work experience in the digital backend design field. Hands-on project experience is required. Tapeout experience at advanced technology is preferred.
· Those with experience in TCL , Perl or Python script development and familiar with EDA tool design will be plus.
· Strong communication ability, good confidence and self-motivation.
· Bilingual in English and Chinese to coordinate with related stakeholders and with good teamwork spirit.
· Salary is negotiable for excellent candidates. e.g. more experienced Staff Engineers with
We regret to inform that only shortlisted candidates will be contacted.
PERSOLKELLY Singapore Pte Ltd • EA License No. 01C4394 • EA Registration No. R1551626 (SUJA THERESA FRANCIS)
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