- Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out.
- Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan.
- Study the physical design methodology of advanced process nodes and builds an automatic physical design platform.
Requirements:
- Degree or above in Electronic Engineering or equivalent.
- At least 5 years of hands-on project in digital backend design experience.
- Familiar with TCL, Perl, or Python script development with EDA tool design.
If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]
Please note that only shortlisted candidates will be notified.
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EA Licence: 19C9701
Registration: R1326740