Description
- Develop advanced drivers, monitors, predictors, and scoreboards using UVM for comprehensive verification and functionality validation.
- Design tests to assess power and performance for optimal efficiency and reliability.
- Collaborate with cross-functional teams for gate-level simulations and support FPGA and post-silicon bring-up.
- Enhance productivity by developing tools for verification automation, testbench automation, and regression testing.
Requirements
- Bachelor's in Electrical Engineering
- Experience in block, sub-system, and full-chip verification.
- Expertise in understanding multiple architectures, integrating third-party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges.
- Strong proficiency in System Verilog simulation and C-based verification in an SoC environment.
- Extensive understanding and exposure to design verification for low-power, battery-operated designs.
- Familiarity with ARM processor-based designs and low-power design techniques (preferred).
- Mastery of System Verilog (UVM), Verilog, C/C++, Perl, Python, and Makefile.
- Experience with ARM SoC, AMBA AXI/AHB/APB, DMA, Flow Control, Serial Devices, and QoS.
- Exposure to AI Edge inference, ISP, Video Codec, Video Processing, Audio Processing, MIPI (CSI/DSI), Crypto, OTP, DSP, and Low-Power technologies
We regret that only shortlisted candidates will be contacted
Applicants must be fully vaccinated or have a valid exemption in accordance with MOM’s regulations to allow them to enter the workplace. Applicants may be required to share verifiable COVID-19 vaccination documents or proof of a valid exemption at the point of offer. Randstad Pte. Limited and/or the Client reserves the right to withdraw an offer if the applicant fails to provide verifiable COVID-19 vaccination and/or proof of exemption documents.
EA: 94C3609 / Reg: R21103172
