Responsibility
- Lead the SERDES design team in IP development, ensuring adherence to product requirements and timelines.
- Innovate in SERDES architecture and design to enhance performance, power efficiency, and area optimization. This includes evaluating various RX, CDR, TX, Bias, and clock generation circuit topologies tailored to specific product needs.
- Collaborate with cross-functional teams to define requirements and specifications, covering aspects such as modeling, packaging, board design, DFT, and ESD.
- Design and verify assigned IP sub-blocks.
- Develop block-level specifications based on link budgets, behavioral modeling, and transistor-level feasibility assessments.
- Guide layout designers in creating compact, high-performance custom layouts.
- Conduct peer and management design reviews of sub-blocks.
- Provide technical support during manufacturing pilot runs and tests.
- Promote advanced design methodologies to enhance team design quality and efficiency.
- Develop team capabilities to establish a center of excellence for SERDES PHY IP development.
Requirements
- Preferably holds a Master's or PhD in Electrical Engineering.
- Minimum of 10 years of experience in SERDES IP architecture and design, with comprehensive knowledge of all key IP building blocks.
- Demonstrates leadership and mentoring capabilities.
- Extensive knowledge of analog CMOS designs and topologies.
- Expertise in high-speed SerDes protocols such as PCIe, USB, and SATA.
- Proficient in Tx and Rx equalization techniques and circuits.
- Experienced in analyzing link jitter budgets for high-speed serial links and defining block-level requirements.
- Strong understanding of various CDR architectures.
- Skilled in planar and FINFET layout design.
- Hands-on experience in design verification and post-layout simulation.
Apply now and be a part of a team where your skills, ideas, and expertise truly make a difference! Send your CV to [email protected] for a confidential chat.
PS: However, only shortlisted candidates will be notified.
EnviroDynamics Solutions Pte Ltd | EA License No.: 12C6285
Xie Jiani | EA Personnel Reg No.: R1548854
