THE ROLE:
To define, validate and characterize the most cutting edge SerDes design on the most advance technology node. Using the latest measuring equipment the semiconductor industry has to offer to benchmark AMD’s SerDes against the challenging industry standard.
THE PERSON:
We are looking for a meticulous and motivated engineer with strong leadership to join and head the validation teams.
KEY RESPONSIBILITIES:
- Post Silicon Validation of high speed SerDes
- Understand the industry requirements and specification for high speed IO
- Develop validation methodology to validate new industry standard and requirements.
- Characterize the latest SerDes design
- SerDes debug with designers on Silicon
- Tuned the latest design to performance at the most optimum setting
- Generate specification base on measured results
- Work with remote teams to co-ordinate distributed task.
- Support FAE on customer’s issues relating to high Speed IOs
PREFERRED EXPERIENCE:
- Experience in high speed IO SerDes post-silicon validation.
- In-depth knowledge of the latest industry standards such as PCIe, Display Port, JESD, SDI, OIF-CEI-11G/25G/56G/112G-VSR/SR/MR/LR, IEEE 802.3 KR/CR/CAUI/GAUI etc.
- Strong programming/scripting skills coding languages such as Python, C/C++, TCL for firmware development, test methodology development and test automation
- Extensive experience with common lab equipment, including BERT, analyzers, oscilloscopes, PNA/VNA etc
- Knowledge of SerDes general architectures and link level system analysis
- Experience in system level serial link analysis and simulation, system performance optimization and standard/architecture level study using tools such as Matlab, ADS etc.
ACADEMIC CREDENTIALS:
- Bachelors/Masters degree in Electrical/Electronics Engineering
