The position is an exciting opportunity to be part of a flexible and dynamic team in the growing markets of mixed signal chips with signal processing IPs, ARM processor and AMBA bus interface like Wireless Chargers, Bluetooth, PMIC etc. used in Mobile, Tablets, Microcontrollers etc. The role works within the digital design team with the aim to create an efficient Digital Design.
Responsibilities and Duties include but not limited to:
- Work at IP level design, but occasionally also at SOC design.
- Creation of RTL code
- Some opportunities to integrate the IP in the SOC
- UPF flow, Low power Flow, Power aware simulations
- CDC/RDC/LINT checks using various tools
- Verification of concept using Matlab/Simulink and toolboxes
- Synthesis, Scan insertion, ATPG.
- STA.
- Schedule preparation at IP level together with the Design leader and execution adhere to plan.
- Reporting to the management.
- Accountability.
Qualification Requirements:
- Bachelor/Masters in Electronics' Engineering (a relevant experience with minimum 1 year in a semiconductor or high technology R&D environment would be appreciated)
- Some Knowledge/Experience/Exposure as below would be appreciated:
- ARM based Architectures, AMBA bus, Peripherals, Boot
- RISC-V architectures
- Hardware Design Language (such as VHDL or Verilog)
- CDC, RDC, LINT
- Synthesis, Scan Insertion, ATPG
- Physical Design, including Power analysis, Clock tree Synthesis, Power Gating, Physical Checks
- Power Aware, Low power and UPF methodology
- Tools porting from Verilog RTL into C++
- Scripting languages (PERL, TCL, PYTHON)
- Knowledge in Static Timing Analysis
- Able to work in a multi-cultural team.
- Strong analytical and problem-solving skill.
- Able to keep up with fast moving new design methodology.
- Candidates with extensive experiences will be considered as Staff Engineers/Design Managers
- Salary package will be offered base on working experience
