We are looking for a talented SERDES ASIC Design Engineer to join our dynamic team. The ideal candidate will have a strong background in ASIC design and a deep understanding of analog mixed-signal (AMS) circuits, particularly in the context of high-speed interfaces.
Key Responsibilities
- Design and implement SERDES ASIC circuits, ensuring they meet performance specifications and industry standards.
- Collaborate with cross-functional teams throughout the ASIC development process, from concept through to production.
- Utilize EDA tools for circuit design, simulation, and verification, including:Cadence Virtuoso
Calibre
Hspice/Spectre
Static timing analysis tools (e.g., Nanotime) - Conduct design reviews and provide insights for optimization and improvements.
- Troubleshoot and resolve design issues during the development and validation phases.
Required Qualifications
- Education:Bachelor’s degree in Communications, Electronic Engineering, or Computer Engineering; Master’s degree preferred.
- Experience:More than 4 years of ASIC design experience for Staff Engineer level; 6 years for Senior Engineer level.
Familiarity with the ASIC development process, including RTL design, synthesis, and verification. - Technical Skills:Strong AMS circuit design skills.
Familiarity with high-speed interface protocols such as DDR, SerDes, and PCIe.
If you are keen to join our dynamic team, please submit your resume in either Word or PDF format to [email protected]. In your application, kindly include the following details:
- Current Salary
- Expected Salary
- Availability
- Reason for Leaving
We appreciate your interest in this opportunity. Please note that only shortlisted candidates will be contacted for further consideration.
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EA (23S1595/R23116355)
