Job Descriptions:
1. Participate in high-level product specifications, microarchitecture and implementation of high-speed memory interfaces
2. Perform RTL coding, LINT checking and sanity testing on implemented designs
3. Work with the verification team for lab debugging
4. Work with the software team and/or customers to solve problems, debug and tune system performance
Job Requirements:
1. Bachelor's degree in communications, electronic engineering or computer engineering, master’s degree preferred
2. More than 6 years (staff engineer) and 10 years (senior staff engineer) of ASIC design experience, familiar with ASIC development process
3. Good Verilog HDL coding skills and EDA tools such as synthesis and timing analysis
4. Familiarity with high-speed interfaces such as DDR, SerDes, PCIe is preferred
5. Ability to solve customer problems and deliver results in a timely manner
6. Strong organizational and communication skills where English is a must and Chinese is preferred
