Job Description
The QCT PMIC Systems group has an opening for a PMIC Reference HW Design Engineer. This group owns PMIC PCB design guidelines for Qualcomm chipset-based phone design. This includes design and optimization of PMIC PCB Floorplan, Schematic, Layout, phone thermal solution and eBOM selection for test platforms and customer reference design and evaluation kits. Qualcomm PMIC hardware design typically consists of modules such as switch-mode power supplies and linear voltage regulators for a variety of cores and peripherals, battery chargers, low noise clocks, ADCs, user interfaces such as display, camera flash and haptics, Power-on and Reset hardware.
Responsibilities
** NOT A LAYOUT POSITION**
Job responsibilities for this position include design of customer reference board and evaluation kits and working closely with PMIC IC designers and Test HW platform teams for optimizing performance and cost on test hardware platforms. The engineer will develop and publish PMIC PCB design guidelines, schematic, BOM selection and PCB layout (by working closely with CAD engineer) based on interaction with chipset architecture, chip design and test teams. Experience in Mentor PADs Logic and PADs Layout, DxDesigner and Expedition is desirable but not essential. The engineer is required to perform the required board level simulations (based on Power Integrity and Signal Integrity tools) to review and sign off on hardware designs developed by various test teams. The engineer will be responsible for characterizing and publishing performance and cost optimized reference BOM lists (power inductors, capacitors, third party components etc) based on component characterization and BOM reduction and optimization tests in lab.
Skills/Experience
** NOT A LAYOUT POSITION**
Understanding and ability to apply electrical engineering concepts and circuit solving skills. Able to work with common lab test equipment (oscilloscope, spectrum analyzer, logic analyzer, network and impedance analyzer, etc.). Experience in Power Management (SMPS, LDO, battery chargers, Clocks, ADC) PCB design and component selectionincluding CAD interface. Experience in high layer count multilayer boards (6/8/10 layers) preferred. Good understanding of common Signal and Power Integrity issues on test hardware and ability to identify and provide alternate solutions using Signal and Power Integrity simulators (eg. powerSI, SIWave, Ansys) is also a plus.
It is important the candidate has ability to communicate technical understandings and project status clearly. Also important is the ability to organize effectively and document work thoroughly and follow required procedures and methodologies. Ability to contribute seamlessly as a member of the reference HW design team across multiple chipsets.
Education
Required: B.E/ M.Tech /MS with 1 to 4 years of relevant experience.
Keywords: PMIC Reference Board Design, Power Electronics, PCB Design, Power Delivery, Power Integrity
x
