Job Purpose:
- To liaise with module engineers on yield performance analysis
- To drive for defect reduction and yield improvement activities
Job Description:
- Supervise YDD Associate Engineers and wafer tech operators to ensure smooth 24/7 inline shift operation
- Train and certify DO Associate Engineers on recipe creation and defect source knowledge
- Maintain and enhance internal SOP/CAS and involve in internal;/external audit
- Operate FIB/SEM/EDX for inline failure analysis
- Operate and create recipes in Brightfield, Darkfield and other YDD tools
- Maintain and housekeep Brightfield, Darkfield and recipes of other YDD tools
- Perform partition analysis on defect source and detailed reports on issues
- Build and develop defect source library and tool’s defect source fingerprinting
- Track inline defect performance by layer/process tool/chamber on weekly basis
- Perform killer ration analysis
- Perform defect characterization by process tools
- Continuous improvement activities on defect reductions with Modules / vendors / equipment team
- Liaise with process engineers in different modules to troubleshoot for inline defects and defect reduction activities
- Provide scan support in low yield investigation & co-work with PI/YE/PE on technology & device specific yield enhancement activities
- Automate daily activities to improve troubleshooting speed of team
- Responsible for wafer quality to conform to product requirements and have the authority to stop shipment and stop production to correct quality problems
Job Requirements:
- Masters or Bachelor Degree in Electrical / Electronics / Chemical / Microelectronics Engineering
- 3-6 years of relevant work experience in high volume manufacturing of electronics components in an MNC or semi-conductor industry preferred
- Excellent interpersonal and communication skills with good leadership capability
- Strong analytical skills and able to work under pressure in a fast pace environment
- Proficient with MS Power Point, Excel, Excel VBA, PowerBI
