The Job
- Develop timing/power/noise characterization flow for advanced node memory compiler.
- Strong focus on design automation for SRAM compiler, big data analysis and design verification.
- Develop memory analysis flow for PPA check.
The Talent
- Bachelor's Degree (with min. 6 years of relevant industry experience) /Masters Degree (with min. 4 years of relevant industry experience)/ PhD in Electrical and Electronic Engineering/Computer Engineering/Computer Science.
- Knowledge of SRAM/ROM memory functionality and high speed, low power memory design architecture.
- Experience in spice simulation and understand CMOS layout view, Verilog coding is preferable.
- Proficient in script programming with Perl or Python3.
