Job description:
- Design Engineer for embedded memory design and verification in advanced nodes for high performance ASIC targeting Cloud AI/ Data Center Network Switch and 5G infrastructure, CPU and AP-SOC
- Collaborate closely with product and architecture teams to define, design and develop high performance customized semiconductor memories to meet PPA specifications and integration.
- Innovate, design, and incorporate special circuits and methodology to achieve best-in-class PPA for custom and compiler memories.
- Develop timing/power/noise characterization flow for advanced node memory compiler. Strong focus on design automation for SRAM compiler, big data analysis and design verification
- Develop memory analysis flow for PPA check
Job requirements:
- 3+ years of hands on experience in design of embedded memories (SRAM, TCAM) for high performance processors or ASICs in advanced nodes (3nm/5nm)
- Good understanding of Digital Circuit design techniques in FinFet technologies.
- Exposure to complete design cycle of SRAM memory and compiler development
- Supervise layout engineers and review layout for optimality.
- Experience in using industry standard schematic entry tools, advanced transistor level simulators (XA, HSIM, FINESIM)
- Experience with LEC tools (ESPCV)
- Knowledge of RTL and place and route tools is a plus
- Ability to come up with design verification and test plans
- Silicon debug and bring up experience is a plus
- Working knowledge of scripting in Perl/Python
- Willingness to collaborate closely with cross functional teams across the globe
