Job Responsibilities
- Collaborate with architects on SoC (System on Chip) architecture discussions and optimizations, focusing on integration and system block development, including areas such as power management, clock/reset, system registers, test control, and PinMux.
- Work with architects and APR (Automated Place and Route) teams on SoC floorplanning, power checks, and timing constraint reviews.
- Provide support for SoC DFT (Design for Testability) and participate in SoC verification planning and verification support.
Job Requirements:
- Bachelor’s or Master’s degree in Electronic Engineering with experience in ASIC design.
- Proficiency in ASIC design flow, including RTL coding, RTL and gate-level simulation, logic synthesis, static timing analysis, timing closure, and verification.
- Solid understanding of DFT principles and practices.
- Experience in a UNIX/Linux environment with scripting skills.
Interested candidates kindly click the APPLY NOW button.
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Xie Jiani (R1548854)
EnviroDynamics Solutions Pte Ltd
EA License No.: 12C6285
