Job Responsibilities:
- Advanced low-power physical design/integration flow development.
- Full-chip floor planning and place & route.
- Power network design and analysis.
- Support signoff timing closure, power integrity, and signal integrity.
- Physical Verification using DRC, LVS.
Requirements:
- Bachelor's degree or above in Electronics, Computer Science, or related fields.
- Experience on high performance and low-power physical design.
- Experience on deep sub-micron process technology (12nm and below) taped outs.
- Excellent interpersonal and communication skills.
