In this role, you will be a technical leader in Micron’s Package Development Engineering group driving chip package interaction test vehicle concepts, generating process and reliability test plans supporting. You will collaborate with Micron’s world-wide engineering talent that includes front end BEOL CPI, Si design, package design, substrate technology, package technology development, characterization, thermomechanical simulation, product engineering, design & development quality.
Responsibilities will include, but are not limited to:
- Logic, DRAM, and Graphic flip chip package interaction (CPI) design rule owner covering relevant Fab BEOL, Substrate, and Assembly rules.
- Provide technical direction for test vehicle development DRAM and GDDR flip chip memory products.
- Collaborate with package design, package technology development, Fab BEOL technology development, product engineering, and global quality to identify potential failure mechanisms, provide CPI risk assessments and risk mitigation solutions.
- Provide EFA and PFA support as needed to debug CPI related failures, identify root cause.
- Recommend optimum design criteria to meet product electrical, mechanical, and thermal quality and reliability performance requirements.
Required Qualifications:
- Bachelor/ Masters in Materials, Mechanical, Chemical, or Electrical Engineering.
- 15+ years of relevant industry experience in semiconductor/packaging
- Experience with chip package interactions and 1st level chip interconnect reliability
- Experience with materials & BOM selection, Fab BEOL, and package assembly
- Excellent communication skills with the ability to convey sophisticated technical concepts to both technical and non-technical partners.
Preferred Qualifications:
- Strong publication record,
- An established network with peers in the industry and relationships with key stakeholders.
Keen on the role? Apply with us!
