Responsibilities:
- Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.
- Develop ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards.
- Develop directed and constrain-random verification functional tests and simulate using EDA tools to verify functional spec is working.
- Execute verification plans, including design bring-up, DV bring-up, regression enabling for all the features.
- Collaborate with digital design team to debug functional testcases and deliver functionally correct designs.
Requirements:
- Bachelors with min 5 - 8 years relevant industry exp.
- Strong VLSI functional verification experience, preferably with exposure to complex, high speed custom VLSI products.
- Strong hardware functional verification language and Object-oriental language development skill. Prefer with SystemVerilog/UVM experience.
- Familiar with ASIC verification methodology, tools, and development flow.
- Working experience or familiar with Ethernet L2/L3 switch/router, SOC, AMBA bus, high-speed IO(USB-2/3, PCIe gen2/3, SATA), Flash controller, or CPU peripherals.
