Job Duties:
· Supporting business users on application incidents/ changes requested on SW environment applications and infrastructure.
· Responsible for Yield Enhancement and Defect reduction for a specified module of the process flow across all CHD-FAB technologies.
· Involves using in-line inspection and defect review data to react to defect excursions, improve baseline defect levels, and support defect analyses for planned changes within the module.
· Determine root cause of defect issues, and drive resolution.
· Partnering with process engineering to reduce tool-level defect levels (both excursion reduction and baseline improvement).
Job Qualifications
· Bachelor’s degree or above in electrical, chemical, materials engineering.
· 8+ years of semiconductor experience in yield enhancement and/or integration preferable.
· Process and/or device engineering experience and background is a plus.
· MFG/Fab Experience: Understanding of Device Integration and Manufacturing, Statistical Data Analysis skills (SPC, DOE, etc.), Data retrieval skills (Klarity, Datalog, JMP, etc).
· Preferable Yield Enhancement Knowledge / Experience: Experience with bright field inspection tools, Experience with SEM imaging and analysis, Knowledgeable in yield enhancement data analysis (Kill Ratios, Defect contribution (adders), etc).
· Excellent communication and presentation skills across various levels of the company.
· Should be a team player and willing to work with cross functional teams in issues resolution.
