NPU ASIC IC Design Engineer Entry-Level
RESPONSIBILITIES INCLUDE, BUT ARE NOT LIMITED TO:
Develop HW microarchitecture, RTL design and verification for Expedera AI accelerators (Silicon IP)
Explore HW design space power/performance/area optimization
Collaborate with HW/SW architects in HW/SW co-design
Execute with DevOps for quality assurance
REQUIRED QUALIFICATIONS AND EXPERI...