Total 13 structural engineer job vacancies in Art / Design / Entertainment category in Singapore

What you will do

[Physical Design]

• Work for physical design and development activities of MediaTek’s Ghz ARM-based microprocessors
• Involve in activities encompass physical design and analysis of complex and timing-critical microprocessor partition blocks and
• Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing and power optimization

[STA/Power Signoff]

• Involve in activities encompass Static Timing Analysis on advanced process nodes (28nm, 20nm, 16nm & beyond)
• Technical disciplines include STA, and analysis of complex and timing-critical microprocessor
• Work closely with RTL function designers and physical designers to optimize design components such as timing and power
• Design Methodology (1):
• This position is in charge of design methodology from RTL-Synthesis-DFT-PNR-STA-PI.
• Specific skill set is: able to boost productivity using either programming or EDA solution
• AI learning Programming is a big plus

What you will bring

• Bachelor/Masters Degree in Electrical and Electronic Engineering/Computer Engineering
• Good with concept of digital design
• Good with communication, team work and scripting skills
• Understanding of RTL2GDS flow is a plus

Location: One North, Singapore

Important Note: This advertisement is not for immediate hiring but is intended to identify suitable candidates for future openings in this position.

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

What you will do

[Physical Design]

• Work for physical design and development activities of MediaTek’s Ghz ARM-based microprocessors
• Involve in activities encompass physical design and analysis of complex and timing-critical microprocessor partition blocks and
• Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing and power optimization

[STA/Power Signoff]

• Involve in activities encompass Static Timing Analysis on advanced process nodes (28nm, 20nm, 16nm & beyond)
• Technical disciplines include STA, and analysis of complex and timing-critical microprocessor
• Work closely with RTL function designers and physical designers to optimize design components such as timing and power
• Design Methodology (1):
• This position is in charge of design methodology from RTL-Synthesis-DFT-PNR-STA-PI.
• Specific skill set is: able to boost productivity using either programming or EDA solution
• AI learning Programming is a big plus

What you will bring

• Bachelor/Masters Degree in Electrical and Electronic Engineering/Computer Engineering
• Good with concept of digital design
• Good with communication, team work and scripting skills
• Understanding of RTL2GDS flow is a plus

Location: One North, Singapore

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

About the team:

MediaTek’s Physical design team is responsible to implement top quality digital backend design for our advanced process chips which have billions of transistors. Passionate talent who are eager to join this fast-growing IC design industry and grow together with our passionate team are welcome to apply!

Job Description

• Working on 6nm and below advanced process project APR and Timing/PI sign-off
• Take the TOP and PM role for the complicated hierarchical chip (more than 20M inst plus 500+ macros)
• Take the Block or Block coordinator role for complex blocks
• Do early prediction for critical APR/Timing/PI issues

Job Requirements

• APR/Timing/PI hands-on/tapeout experience on complicated hierarchical chip
• TCL/Perl/Python/C/C++ programming skill
• Have advanced process(n6 or below) experience is a plus
• Excellent communication and team work spirit

Location: One North, Singapore

Important Note: This advertisement is meant to source suitable candidates for future openings for this position.

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

What you will do

[Physical Design]

• Work for physical design and development activities of MediaTek’s Ghz ARM-based microprocessors
• Involve in activities encompass physical design and analysis of complex and timing-critical microprocessor partition blocks and
• Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing and power optimization

[STA/Power Signoff]

• Involve in activities encompass Static Timing Analysis on advanced process nodes (28nm, 20nm, 16nm & beyond)
• Technical disciplines include STA, and analysis of complex and timing-critical microprocessor
• Work closely with RTL function designers and physical designers to optimize design components such as timing and power
• Design Methodology (1):
• This position is in charge of design methodology from RTL-Synthesis-DFT-PNR-STA-PI.
• Specific skill set is: able to boost productivity using either programming or EDA solution
• AI learning Programming is a big plus

What you will bring

• Bachelor/Masters Degree in Electrical and Electronic Engineering/Computer Engineering
• Minimum with 7 years relevant experience
• Good with concept of digital design
• Good with communication, team work and scripting skills
• Understanding of RTL2GDS flow is a plus

Location: One North, Singapore

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

What you will do

• APU Physical Design Implementation for APU partitions focus on MDLA/NDLA n5/n4/n3e/ process
• Physical VerificaTion to deliver clean APU partition gds N5/n4/n3e/ process
• Perform Timing Closure ECO for APU partition including PrimeTime timing check and twk timing ECO

What you bring

• Apr hands on for n5/n4/n3e process using Innovus and Fusion compiler EDA tool
• tcl/csh/perl/bash. programming skill
• Timing Analysis Debugging and Fixing skills
• Experienced N4/N3e process

Location: One North, Singapore

Why MediaTek?

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact. – Join us now!

What you do

Be part of the team that validates the physical sign-off of our chips, powering the brands we love every year with 2 billion consumer electronic products such as digital TVs, home audio devices, DVD/Blue-ray players, smartphones, tablets, networking and connectivity products, and many more. As a member of the MediaTek Physical Verification Sign-off team, you will be responsible for ensuring the manufacturability and reliability of IC designs through rigorous physical verification processes to enable the success of our chips tape-out. Join us in shaping the future of technology and making a real impact on the world!

• Responsible for assembling of various design system into a full chip.
• Perform design rule checking (DRC) to identify and resolve System-on-chip layout violations and ensure compliance with manufacturing rules and constraints.
• Conduct layout versus schematic (LVS) verification to ensure the accuracy and consistency between full chip layout and schematic of the IC design.
• Execute electrical rule check (ERC) to identify potential electrical issues and ensure the integrity of the design.
• Perform antenna and electrostatic discharge (ESD) checks to prevent potential reliability, latch-up, leakage issues.
• Collaborate with design and layout teams to address and resolve physical design issues and optimize the layout for manufacturability and reliability.
• Contribute to the development and improvement of physical verification methodologies and flows.
• Work closely with process technology teams to understand and address process-related challenges and constraints.
• Participate in tape-out activities and ensure that the physical design meets the required quality and reliability standards for fabrication.

What you bring

• Bachelor/master’s degree in Electrical/Electronic Engineering / Computer Science or equivalent
• With minimum 4 years of relevant experience
• Solid understanding of physical design concepts, IC manufacturing processes, and semiconductor device physics.
• Proficiency in using physical verification tools such as Calibre, IC Validator, or other industry-standard DRC/LVS tools.
• Experience with scripting languages such as TCL, Perl, or Python for automation and tool customization.
• Strong problem-solving skills and the ability to analyze and debug complex physical design issues.
• Excellent communication and teamwork skills to collaborate effectively with cross-functional teams.
• Familiarity with EDA (Electronic Design Automation) tools and design methodologies is a plus.
• Proficient in UNIX (Linux) platforms
• Strong communication skills, problem solving and analytical skills
• Candidate with more years of experience will be considered for a more Senior role.

Location: One North, Singapore

Who We Are

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact. – Join us now!

What you will do

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek:

• Scan chain insertion & ATPG pattern generation
• Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.)
• Diagnosis to help manufacture process improvement

2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC:

• PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation
• Develop & integrate DFT-related RTL design modules to test chip

What you will bring

1. Master's Degree in EEE/ EE/ CE
2. Expertise in Synopsys and/or Mentor DFT tools, and HDL simulators like Synopsys VCS
3. Fluency in script language including but not limited to TCL/Perl/Python
4. Experience about MBIST with state-of-the-art SRAM structure & EDA tools is big plus
5. Skill for RTL design & integration, and physical failure analysis(PFA) will also be plus
6. Ability to think and work independently with different teams
7. Interest in understanding more details in entire design flow
8. Ability to use English for discussing technical details
9. With a minimum of 7 years relevant industrial work experience

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

What you will do

• APU Physical Design Implementation for APU partitions focus on MDLA/NDLA n5/n4/n3e/ process
• Physical VerificaTion to deliver clean APU partition gds N5/n4/n3e/ process
• Perform Timing Closure ECO for APU partition including PrimeTime timing check and twk timing ECO

What you bring

• Apr hands on for n5/n4/n3e process using Innovus and Fusion compiler EDA tool
• tcl/csh/perl/bash. programming skill
• Timing Analysis Debugging and Fixing skills
• Experienced N4/N3e process

Job Description

• Working on 6nm and below advanced process project APR and Timing/PI sign-off
• Take the TOP and PM role for the complicated hierarchical chip (more than 20M inst plus 500+ macros)
• Take the Block or Block coordinator role for complex blocks
• Do early prediction for critical APR/Timing/PI issues

Job Requirements

• APR/Timing/PI hands-on/tapeout experience on complicated hierarchical chip
• TCL/Perl/Python/C/C++ programming skill
• Have advanced process(n6 or below) experience is a plus
• Excellent communication and team work spirit

Job description:

• Design Engineer for embedded memory design and verification in advanced nodes for high performance ASIC targeting Cloud AI/ Data Center Network Switch and 5G infrastructure, CPU and AP-SOC
• Collaborate closely with product and architecture teams to define, design and develop high performance customized semiconductor memories to meet PPA specifications and integration.
• Innovate, design, and incorporate special circuits and methodology to achieve best-in-class PPA for custom and compiler memories.
• Develop timing/power/noise characterization flow for advanced node memory compiler. Strong focus on design automation for SRAM compiler, big data analysis and design verification
• Develop memory analysis flow for PPA check

Job requirements:

• 3+ years of hands on experience in design of embedded memories (SRAM, TCAM) for high performance processors or ASICs in advanced nodes (3nm/5nm)
• Good understanding of Digital Circuit design techniques in FinFet technologies.
• Exposure to complete design cycle of SRAM memory and compiler development
• Supervise layout engineers and review layout for optimality.
• Experience in using industry standard schematic entry tools, advanced transistor level simulators (XA, HSIM, FINESIM)
• Experience with LEC tools (ESPCV)
• Knowledge of RTL and place and route tools is a plus
• Ability to come up with design verification and test plans
• Silicon debug and bring up experience is a plus
• Working knowledge of scripting in Perl/Python
• Willingness to collaborate closely with cross functional teams across the globe

What you will do

[Physical Design]

• Work for physical design and development activities of MediaTek’s Ghz ARM-based microprocessors
• Involve in activities encompass physical design and analysis of complex and timing-critical microprocessor partition blocks and
• Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing and power optimization

[STA/Power Signoff]

• Involve in activities encompass Static Timing Analysis on advanced process nodes (28nm, 20nm, 16nm & beyond)
• Technical disciplines include STA, and analysis of complex and timing-critical microprocessor
• Work closely with RTL function designers and physical designers to optimize design components such as timing and power
• Design Methodology (1):
• This position is in charge of design methodology from RTL-Synthesis-DFT-PNR-STA-PI.
• Specific skill set is: able to boost productivity using either programming or EDA solution
• AI learning Programming is a big plus

What you will bring

• Bachelor/Masters Degree in Electrical and Electronic Engineering/Computer Engineering
• Good with concept of digital design
• Good with communication, team work and scripting skills
• Understanding of RTL2GDS flow is a plus

Location: One North, Singapore

What you will do

[Physical Design]

• Work for physical design and development activities of MediaTek’s Ghz ARM-based microprocessors
• Involve in activities encompass physical design and analysis of complex and timing-critical microprocessor partition blocks and
• Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing and power optimization

[STA/Power Signoff]

• Involve in activities encompass Static Timing Analysis on advanced process nodes (28nm, 20nm, 16nm & beyond)
• Technical disciplines include STA, and analysis of complex and timing-critical microprocessor
• Work closely with RTL function designers and physical designers to optimize design components such as timing and power
• Design Methodology (1):
• This position is in charge of design methodology from RTL-Synthesis-DFT-PNR-STA-PI.
• Specific skill set is: able to boost productivity using either programming or EDA solution
• AI learning Programming is a big plus

What you will bring

• Bachelor/Masters Degree in Electrical and Electronic Engineering/Computer Engineering
• Good with concept of digital design
• Good with communication, team work and scripting skills
• Understanding of RTL2GDS flow is a plus

Location: One North, Singapore

Responsibilities

• Responsible for physical design and development activities of MediaTek Ghz, AI processors and neural network DSP
• Involve in activities encompass physical design and analysis of complex and timing-critical AI processors and neural network DSP
  Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing, power optimization and physical verification
• Work closely with MediaTek colleagues in Taiwan and Singapore in implementation methodology co-development and flow deployment

Requirement

• Bachelor/Masters Degree in Electrical/Computer Engineering
• Min 2 years of high-speed CPU/GPU/DSP Subsystem RTL Integration experience or IP/Block/SoC Design experience (Candidate with less than 5 years of relevant experience will be considered for junior position)
• Experience with Synopsys ICC (preferred) or Cadence tools from netlists to GDS
• Experience in graphics processor implementation/power reduction flows and methodology from RTL to GDS (including synthesis, floor-planning, placement, CTS, routing, timing optimization, physical verification)
• Knowledge of high-speed/low power IP and custom circuit design
• Experience with power noise and reliability tools such as Redhawk and Voltus
• Good communication and scripting skills