Semi-Conductor Design Verification Manager
1 week ago
Job Summary:
We are seeking an experienced Design Verification Manager to lead our team in verifying complex System-on-Chip (SoC) designs. The ideal c..
Job Summary:
We are seeking an experienced Design Verification Manager to lead our team in verifying complex System-on-Chip (SoC) designs. The ideal candidate will have expertise in IP verification, ARM architecture, and SoC design, as well as experience with UVM, AMBA, and SystemVerilog.
Key Responsibilities:
- Develop and execute comprehensive test plans for SoC IP blocks, including module-level and SoC-level verification
- Design and implement ASIC verification structures using UVM, including stimulus, checkers, assertions, monitors, and scoreboards
- Lead a team of design verification engineers to achieve project goals and deliver high-quality results
- Collaborate with other teams, including design, implementation, and validation, to ensure seamless integration and effective communication
- Develop and maintain documentation for test plans, verification methodologies, and IP blocks
Requirements:
- Bachelor's or Master's degree in Electrical Engineering, Computer Science, or related field
- At least 10 years of experience in design verification, with a focus on SoC IP verification and ARM architecture
- Proven expertise in UVM, AMBA, and SystemVerilog
- Strong knowledge of SoC design principles, including IP block integration and system-level verification
- Experience with test plan development, execution, and analysis
- Familiarity with EDA tools and development flows for ASIC verification
- Excellent communication, analytical, and documentation skills
- Experience with Ethernet L2/L3 switch/router, high-speed IO (USB-2/3/4, PCIe gen2/3/4/5, MIPI CSI-2/DSI-2 and SATA), Flash controller, or CPU peripherals
Technical Skills:
- UVM (Universal Verification Methodology)
- AMBA (Advanced Microcontroller Bus Architecture)
- SoC (System-on-Chip) design principles
- IP verification methodologies
- ARM architecture
- SystemVerilog programming language
- C programming language
- Python scripting language (nice to have)
Leadership Skills:
- Experience leading teams of design verification engineers
- Strong project management skills, including planning, execution, and delivery
- Excellent communication and interpersonal skills
- Able to manage multiple sites
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