Responsibilities:

• Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Job Responsibilities:

• Strategize and Lead Low-Power Design Initiatives:
  Define and execute strategies for achieving low-power, high-performance physical design. Lead the development of innovative workflows and methodologies to minimize power consumption while ensuring design reliability and scalability.
• Oversee Full-Chip Floor Planning and Routing:
  Provide technical leadership in full-chip floor planning and place-and-route activities. Optimize chip area, performance, and power metrics, while mentoring junior engineers in advanced methodologies.
• Architect Power Distribution Networks:
  Design and validate robust power networks to meet demanding performance criteria. Conduct power integrity analysis to address IR drop, noise, and power grid optimization, ensuring alignment with low-power objectives.
• Drive Timing Closure and Integrity Signoff:
  Lead timing closure efforts across cross-functional teams. Address complex timing violations, optimize critical paths, and ensure successful power and signal integrity signoff for final design verification.
• Champion Physical Verification Processes:
  Oversee DRC and LVS verification, resolving escalated issues and ensuring designs comply with layout and manufacturing rules. Guide the team through pre-tape-out readiness.
• Facilitate Cross-Team Collaboration:
  Act as a key liaison among RTL, analog, and verification teams. Drive alignment between physical design and overall architecture while addressing challenges and providing technical guidance to stakeholders.
• Promote Continuous Improvement:
  Champion the adoption of emerging tools, techniques, and methodologies. Drive workflow innovations to enhance efficiency, scalability, and quality of low-power physical design.

Requirements:

• Educational Background:
  Bachelor’s degree in Electronics, Computer Science, Electrical Engineering, or a related field. Master’s or Ph.D. preferred.
• Experience:
  10+ years in physical design with expertise in high-performance, low-power semiconductor technologies (12nm and below). Proven tape-out success and leadership experience are essential.
• Advanced Technical Expertise:
  Deep expertise in full-chip floor planning, place-and-route, and physical verification (DRC and LVS). Advanced knowledge of power network architecture, IR drop, and noise analysis. Strong proficiency with timing closure processes and STA tools like PrimeTime.
• Software and Tools Proficiency:
  Extensive experience with industry-standard tools such as Synopsys IC Compiler, Cadence Innovus, and scripting languages like Perl, TCL, and Python.
• Place-and-Route Leadership:
  Expert-level experience in advanced place-and-route strategies for performance and power optimization.
• Leadership and Mentorship:
  Proven ability to lead teams, mentor junior engineers, and manage cross-disciplinary collaboration in a fast-paced environment.
• Preferred Expertise:
  Experience in deep sub-micron technologies (7nm, 5nm, etc.), multi-voltage designs, advanced low-power techniques, and design-for-manufacturing (DFM). Familiarity with emerging semiconductor trends is a strong advantage.

Job Responsibilities:

• Develop Low-Power Design Workflows:
  Own the design process to minimize power consumption while ensuring performance and reliability using advanced tools and techniques.
• Full-Chip Floor Planning and Routing:
  Lead floor planning and place-and-route efforts to optimize chip area and meet performance, area, and power goals.
• Power Network Design:
  Create and analyze robust power networks to ensure performance, minimize losses, and support low-power goals.
• Timing Closure and Signoff:
  Collaborate with teams to resolve timing issues and manage power and signal integrity for design verification.
• Physical Verification (DRC and LVS):
  Ensure compliance with layout and manufacturing rules through DRC and LVS for a tape-out-ready design.
• Cross-Team Collaboration:
  Work with engineers across functions to align designs with chip architecture and solve design challenges.
• Continuous Improvement:
  Stay updated on design advancements and improve workflows for better efficiency and low-power optimization.

Requirements:

• Educational Background:
  Bachelor’s degree or higher in Electronics, Computer Science, Electrical Engineering, or a related field. Advanced degrees (Master’s/Ph.D.) are a plus.
• Experience:
  Minimum X years in physical design with a focus on high-performance, low-power designs. Must have tape-out experience and familiarity with advanced semiconductor technologies (12nm and below).
• Technical Expertise:
  Proficient in full-chip floor planning, place-and-route, and physical verification (DRC and LVS). Strong knowledge of power network design, IR drop analysis, and timing closure with static timing analysis (STA) tools like PrimeTime.
• Software Knowledge:
  Experience with tools such as Synopsys IC Compiler, Cadence Innovus, and scripting languages like Perl, TCL, and Python.
• Place-and-Route Experience:
  Hands-on expertise in place-and-route methodologies for optimizing performance, power, and area.
• Soft Skills:
  Excellent communication and collaboration skills to work effectively in multidisciplinary teams. Strong problem-solving and critical thinking abilities to address design challenges.
• Preferred Skills:
  Experience with advanced low-power techniques, deep sub-micron technologies (7nm, 5nm, etc.), multi-voltage designs, and design-for-manufacturing (DFM) principles.

Job Responsibilities:

• Circuit Design and Simulation:
  Design and optimize analog circuits using schematic capture and simulation tools to meet performance targets under various conditions.
• Digital Standard Cell Libraries:
  Develop high-performance, low-power digital standard cell libraries optimized for speed, power, and area.
• Innovative Cell Architectures:
  Propose and develop novel digital cell architectures to enhance efficiency and performance.
• Collaboration with Layout Teams:
  Work with layout designers to ensure accurate and efficient physical implementations while maintaining manufacturability standards.

Qualifications:

• Education:
  Bachelor’s degree in Electronics Engineering, Computer Science, or related field. Master’s or Ph.D. preferred.
• Experience:
  5+ years in high-performance, low-power analog design with tape-out and deep sub-micron process experience (12nm and below).
• Technical Skills:Proficient in analog circuit design, noise analysis, and power optimization.
  Skilled in tools like Cadence Virtuoso, Spectre, and HSPICE for schematic capture and simulation.
  Experienced in developing digital standard cell libraries for performance and efficiency.
  Strong understanding of deep sub-micron challenges and solutions.
• Communication:
  Excellent collaboration and presentation skills to work effectively with cross-functional teams and articulate complex concepts clearly.

RESPONSIBILITIES

• To prepare intermediate engineering drawings, layout and equipment arrangement to support the Engineers in conducting their engineering planning, design and construction work. This includes consulting engineers on design and supporting them to and drafters in the development of engineering drawings.
• The main job challenge is to ensure design and drafting assignments are delivered to a high quality, using prevailing engineering design procedures, standards and codes.
• Maintaining Master Drawing Register.
• To ascertain that all inputs are delivered to engineering subcontractors in accordance with the MDR avoiding delay and rework.
• 3D Model Development - To maintain model accuracy.
• Perform Drafting Check - To maintain accuracy, quality, completeness & conformance for drafting and designing for the project standards.
• Project proposal document preparation - To provide technical support to project management/ proposal team.
• Design and drawing activities - To deliver the drawings by maintaining quality, complying with HSE standards and meeting the project deliverables schedule.
• Meetings Coordination - To resolve the engineering issues with help of drafting team and supervisors.
• Any other responsibilities, tasks assigned by the direct line Manager/ Management
• Any other tasks assigned by the Management.

Comply with HSE requirements:

• Environmental Aspects & Impacts Assessment.
• OHS Hazardous & Risk Assessment.
• Follow HSE Regulations.

Requirements

• Diploma in Electrical or equivalent.
• Qualification from Technical Institute.
• 10 years of working experience.
• Knowledge of standard drafting techniques and design procedures.
• Intermediate Microsoft Office.
• Advanced AutoCAD.
• Basic AVEVA E3D & Electrical.
• Advanced Autodesk Navisworks Simulate.
• Advanced Autodesk Navisworks Freedom.
• Advanced Adobe PDF.
• Strong communication and interpersonal skills.
• Ability to work independently with minimal supervision.
• Capable of delivering tasks efficiently and meeting deadlines.
• Strong team collaboration skills.

Job Responsibility:

· Prepare schematic design, site installation layout, calculations, technical reports and specifications etc for automation equipment panel.

· Liaise with external consultant teams, contractors and suppliers to resolve project electrical design issues.

· Generate BOM and RFQ document.

· Communicate with contractor for automation equipment panel fabrication.

· Prepare factory acceptance test document for automation equipment panel.

· Responsible for liaising with Project Manager on automation equipment panel acceptance before ship to site.

· Provide support on site installation.

· Updating of Circuit diagram, Control device and Equipment Installation layout.

Job Requirements:

· Degree/Diploma​/Higher Nitec​ in Electrical & Electronic Engineering

· Knowledge in automation design of the control system (Hardware & Software). Experience in motor control, hardware and software designs with controls using PLCs an advantage

· Fluency in English and Chinese, both written and oral to liaise with associates

· Good analytical reasoning, theoretical approach and communication skills

· Excellent interpersonal and Communication skills

· Self-motivated and able to work independently with minimum supervision

· Hands on experience on wiring assembly and installation will be an advantage.

· Proficient in MS office and other relevant software like AutoCAD or EPLAN 8 Electric.

· Fresh graduate can be considered.

RESPONSIBILITY

• Assume a technical expertise in assessing sites, conducting detailed drawings, and estimating Solar project capacity and costs.
• Formulate comprehensive design specifications and functional requirements for the region, ensuring alignment with project needs.
• Complete system designs for projects including site plans, mechanical racking and attachment plans, single-line electrical drawings, specification of balance of system location and interconnection details.
• Conduct in-depth analysis of factors influencing system performance.
• Partner with the O&M Team to evaluate system performance, identify optimization opportunities, and drive continuous improvement initiatives.
• Perform software simulations of solar photovoltaic (PV) system performance & energy production
• Execute design calculations, encompassing voltage drop analysis, fault current assessments, and system optimization strategies.
• Ensure compliance with EPC contract specifications and regulatory requirements, mitigating risks and optimizing project outcomes including on-site engineering support.
• Collaborate closely with contractors to review and approve engineering drawing submissions, maintaining rigorous quality control standards.

QUALIFICATIONS & EXPERIENCE

• Degree/Diploma in Electrical Engineering discipline
• 3 to 5 years’ experience in Solar PV system design / engineering.

SKILLS/COMPETENCIES & PREFERRED CHARACTERISTICS

• Proactive self-starter with an ability to thrive in dynamic environments
• Solution-oriented approach with a track record of overcoming complex challenges and driving innovation
• Collaborative team player and able to guide the drafting team.
• Adaptability and willingness to embrace new technologies and methodologies
• Proficient in Microsoft Office and Excel capabilities for data analysis and reporting
• Proficient in design software such as PV AutoCAD,

Position Overview:

As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.

Requirements:

1. Experience in UVM verification methodology

2. Disciplined, quality-minded, and highly driven for excellence,

3. Excellent team player and good communication skills

4. MSEE/BSEE in Electrical Engineering or Computer Engineering, with 3 years of relevant experience, but are open to fresh graduates with outstanding results

5. Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities

6. Experience in video processing and video analytics is a plus

7. Passionate and strong in general programming is a plus

Company Profile
Julian Grey's client is a precision engineering firm for laser, optics, and photonics.

Responsibilities

• Create comprehensive electrical circuit diagrams for automation and equipment systems.
• Assess, integrate, and validate hardware to ensure compliance with technical specifications.
• Produce CAD drawings depicting electrical circuits.
• Assist in diagnosing and resolving issues with system assembly, operation, and testing.
• Aid in equipment setup, problem-solving, and occasional installation.
• Provide assistance in testing new hardware and applications in-house.

Requirements

• Experience in automation machine design, proficiency in Electrical Design Software, electrical/electronic circuits and test instrumentation

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Our telegram channel for job opportunities - https://t.me/jobopportunitiessg

Please WA Jian Wei @ 87389860

Only Shortlisted candidates will be notified

Quek Jian Wei

Reg No. R22110928

Julian Grey Corporate Advisory Pte. Ltd.

EA License No: 19C9568

Responsibilities

1. Develop design requirements of an NPU given system level specifications.
2. Being part of modelling the performance of the NPU module and its data transaction throughput.
3. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU.
4. Understanding the mathematics of different convolution operators including different arithmetic formats (fixed point and floating point)
5. Estimate, measure and optimize PPA (Performance / Power / Area) to meet key objectives and results.
6. Optimizing micro-architecture design for low power and area is required.
7. Work closely with verification engineers to ensure comprehensive testing and debug issues.
8. Support integration into the overall system, conducting design checks, and addressing lint/timing/CDC issues.
9. Collaborate with software teams to assist in compiler and toolchain development and their debugging.
10. Produce clear and concise design documentation.

Requirements

1. 8+ years of digital design with at least 2 to 3 years of SoC design experience is preferred.
2. At least one cycle of NPU design completion experience is required.
3. Hands on in digital design experience is a must.
4. Preferably has lead a team of at least 3 to 4 people in the past at the capacity of a design lead.
5. Experience in microarchitecture design, and RTL coding with Verilog/ System-Verilog.
6. Experience in synthesis, with analysis of power, timing and area.
7. Disciplined, quality-minded, and highly driven for excellence.
8. Excellent team player and good communication skills.
9. MSEE/BSEE in Electrical Engineering or Computer Engineering.
10. Understanding of convolution operator and number system is required.
11. Candidates with relevant experiences would be offered as Senior, taking on higher responsibilities.
12. Experience in UVM verification methodology is a plus.
13. A plus to have SoC design experience.
14. Experience with optimizing micro-architectures for low-power and low-area is a plus.
15. Knowledge in deep learning algorithms such as CNN / Transformer is a plus.
16. Experience with past design experience with NPU / GPU / DSP design is a plus.
17. Experience with ARM or RISC-V processor systems is a plus.
18. Passionate and strong in general programming is a plus.

• 5 days Mondays to Fridays: 8:30am to 6pm
• $5000 – $9000
• Pandan Road Singapore (Clementi)
• Transport: We have company bus departing near Clementi MRT station at 8.10am to bring staff to our office and also a return company bus trip back to Clementi in the evening.

Responsibilities:

• Conduct mooring analyses, installation analyses, riser analyses, sea fastening design, and diffraction analysis
• Deliver engineering deliverables to support specific projects either independently or through the management of internal and external resources
• Develop operational procedures for offshore utilization
• Identify equipment requirements for projects, including rigging design, and interface with sales and/or rental departments for procurement and delivery
• Develop mobilization and demobilization plans
• Create, maintain, and report project schedules as required
• Attend meetings with clients and sub-contractors
• Actively participate in HIRAs and QHSE-related activities
• Produce scopes of work for sub-contractors
• Attend and oversee offshore operations during execution phases to ensure adherence to procedures and guidelines
• Travel offshore and internationally as required

Requirements:

• Honours degree accredited by the Engineering Council in Naval Architecture
• Min 5 years' experience working within the Energy Industry, specifically Oil and Gas or Renewables
• Competency in a mooring analysis software with a knowledge of Orcaflex, Ariane, Hydrostar, Moses, GMOOR (or similar) being advantageous
• Project experience coupled with business acumen, the ability to apply knowledge, and the confidence to act as required.
• Ability to travel offshore and internationally as required

The Supreme HR Advisory Pte. Ltd || 14C7279

Chua Jie Ying (Cai Jie Ying), Evelynn || EA Personnel License R24120580

JOB DESCRIPTION

· Discussion with system engineers on SoC architecture and feedback on optimization.

· Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc;

· Discussion with synthesis engineer and back-end engineer on design optimization.

· SoC DFT support;

· SoC verification plan and SoC verification support

JOB REQUIREMENTS

· Bachelor’s or Master’s Degree in Electronic Engineering with ASIC design experience.

· Knowledge of ASIC design flow

· Experience in RTL coding, RTL and gate-level debug

· Understanding of DFT, timing and power requirements

· Familiar with UNIX/ Linux environment and scripting

· Good communication and interpersonal skills

· Strong analytical and problem-solving skills

· Knowledge on mixed-signal design would be an advantage.

JOB DESCRIPTION

· Discussion with system engineers on IP requirement and micro architecture.

· Develop IP (control path intensive or data path intensive) meet functional requirement and protocol standard.

· Support SoC designer on integration, timing constraints and power domain setting.

· Support IP verification for verification plan review, test case debugging.

JOB REQUIREMENTS

· Bachelor’s or Master’s Degree in Electronic Engineering with ASIC design experience.

· Experience in IP development (either control path intensive or data path intensive)

· Knowledge of timing, DFT and power structure.

· Familiar with UNIX/ Linux environment and scripting

· Experience on communication IP and/or video IP development would be advantage.

· Good communication and interpersonal skills

· Strong analytical and problem-solving skills

· Experience on communication IP development would be an advantage

· Experience on video IP development would be an advantage

JOB DESCRIPTION

· Work with system engineers on timing requirements and feedback on optimization.

· Work on SoC timing constraint, synthesis and timing closure.

· Work on power structure, eg. Isolation of power domains, level-shifter crossing voltage domains

· Conduct formal verification for release comparison.

· Support back-end implementation on timing violation analysis and fix.

· Support scan insertion and optimization.

· Support on power structure and power optimization.

JOB REQUIREMENTS

· Bachelor’s or Master’s Degree in Electronic Engineering with ASIC design experience.

· Familiar with ASIC design flow

· Experience in logic synthesis, static timing analysis, timing closure

· Good understanding of DFT and Power structure.

· Familiar with UNIX/ Linux environment and scripting

· Good communication and interpersonal skills

· Strong analytical and problem-solving skills

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.

Available Job Responsibilities

• Design and build memory or circuit blocks at the gate or transistor level
• Simulate and analyze the circuit design using transistor level simulators
• Extract the layout and perform post-layout simulations and verification
• Floorplan physical implementation and layout integration of design components
• Integrate characterization flow to extract timing and power information
• Develop scripts to automate characterization flow, simulations, and verification
• Specify and verify various behavioral and physical memory models
• Document the design specifications, behavioral description, and timing diagrams
• Help specify silicon test plan and correlate silicon to simulation data

Preferred Skills

• Good understanding of transistor level circuit behavior and device physics
• Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
• Proficiency in running simulators, writing automation scripts, and are tools savvy
• Understanding of memory behavioral and physical models is a plus
• Expertise in memory circuit design is a plus
• Understanding of DFT schemes and chip level integration is a plus
• Good communication, interpersonal, and leadership skills
• Motivated, self-driven and good at multi-tasking
• Passion for solving complex problems and willingness to learn

Qualifications

• Requires a BS in Electrical or Computer Engineering
• Some years of relevant experience is preferable
• Fresh graduates are encouraged to apply

Job Responsibilities:

• Lead Analog Circuit Design and Optimization:
  Direct the design and optimization of complex analog circuits, leveraging advanced schematic capture and simulation tools to achieve superior performance and reliability across diverse operating conditions.
• Drive Digital Standard Cell Library Development:
  Oversee the creation of high-performance, low-power digital standard cell libraries, ensuring alignment with stringent performance, power, and area specifications.
• Innovate Cutting-Edge Cell Architectures:
  Develop and implement advanced digital standard cell architectures, introducing innovative solutions to enhance design efficiency and meet evolving technological demands.
• Guide Layout Implementation:
  Provide strategic oversight to layout teams, ensuring accurate, efficient, and manufacturable physical implementations that adhere to performance and reliability goals.

Qualifications:

• Education:
  Bachelor’s degree in Electronics Engineering, Computer Science, or a related field. Advanced degrees (Master’s/Ph.D.) strongly preferred.
• Experience:
  10+ years in analog design and digital standard cell development, with expertise in deep sub-micron process technologies (12nm and below) and proven tape-out leadership.
• Advanced Technical Skills:Deep expertise in analog design, power optimization, and noise analysis.
  Mastery of tools such as Cadence Virtuoso, Spectre, and HSPICE for design and simulation.
  Extensive experience in digital standard cell library creation, optimizing for power, performance, and area.
  In-depth knowledge of deep sub-micron challenges, including layout optimization and power delivery strategies.
• Leadership and Communication:
  Demonstrated ability to lead cross-functional teams, mentor junior engineers, and foster innovation. Exceptional communication skills to articulate complex concepts and align multidisciplinary teams toward common objectives.

about the company

My client is a leading manufacturer of digital electronic products. With an outstanding international reputation in its field and a great emphasis on training & development, it is certainly a great brand to explore if you are seeking for greater achievement in your career

about the job

• Design and realization of the chip floorplan, clock architecture and powerplan
• In charge of physical design tasks from netlist to GDSII (P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tapeout)
• Lead analog designs during product development
• Physical design methodology of advanced process nodes and builds an automatic physical design platform

skills & experience required

• PhD / Master / Degree in Electrical & Electronics / Integrated Circuit / Microelectronics Engineering
• Min 4 years of hands on / research experience with digital backend ICs circuit design / physical design
• Well versed with synthesis, place & route, STA and design convergence
• Willing to work in a new start up entity in Singapore
• Proficient in tapeout experience at advanced technology will be a plus
• TCL,Perl,Python script development and familiar with EDA tool design

If you are interested in the position , kindly send your CVs in to yitwei.kwan(@)randstad.com.sg

Please include your availability, expected salary and reason for leaving current job

We regret that only shortlisted candidates will be contacted

EA: 94C3609 / Reg: R1325913

• Build blazing fast page speeds
• Build reusable components/primitives
• Delightful user interactions and affordances
• Work with the team to review PR, and make the codebase robust.

Job Requirements

• 5 years experience at tech startups with millions of DAUs
• Solid knowledge of TypeScript, and experience with Next.js, etc.
• Basic backend skills with Node.js, building REST APIs, working with databases
• Knowledge in Bitcoin and mining concepts
• Strong written and verbal communication skills

Interested applicants please send in your MS Word resume. Shortlisted candidates will be contacted very soon. Thank you.

Job Description

Sea Forrest Engineering Pte Ltd (a subsidiary of BH Global Corporation Ltd) seeking a skilled and experienced Electrical Design and Commissioning Engineer to join our dynamic team specializing in marine vessel electrical propulsion and energy management systems. The ideal candidate will have a strong background in electrical engineering, a deep understanding of marine systems, and a proven track record of designing and commissioning complex electrical systems for marine vessels. This role will involve working on cutting-edge technologies to enhance the performance, efficiency, and reliability of propulsion and control systems for various types of marine vessels.

Responsibilities

1) Electrical Design

• Collaborate with cross-functional teams to define electrical system requirements, specifications, and design criteria for marine vessel propulsion and control systems.
• Develop detailed electrical schematics, wiring diagrams, and layouts using industry-standard design tools.
• Select appropriate electrical components, equipment, and materials to ensure compliance with safety, regulatory, and performance standards.
• Design and implement control logic, automation, and monitoring systems for propulsion and manoeuvring.

2) Commissioning and Integration

• Oversee the installation, integration, and testing of electrical systems on marine vessels during construction or retrofit projects.
• Conduct thorough testing, troubleshooting, and validation of electrical systems to ensure proper functionality and adherence to design specifications.
• Collaborate with shipyard personnel and subcontractors to ensure proper installation and alignment of propulsion and control components.
• Coordinate with project managers to establish commissioning schedules, manage resources, and ensure timely project completion.

3) System Optimization and Performance Enhancement

• Analyse and evaluate the performance of propulsion and control systems, identifying opportunities for optimization, efficiency improvement, and performance enhancement.
• Work closely with the research and development team to implement innovative technologies and solutions to address emerging challenges in marine propulsion and control.

4) Documentation and Reporting

• Create comprehensive technical documentation, including operation manuals, maintenance guides, and as-built drawings for electrical systems.
• Generate commissioning reports, test procedures, and status updates for internal teams, project stakeholders, and clients.

5) Regulatory Compliance and Safety

• Ensure that all designed and commissioned electrical systems comply with relevant maritime regulations, industry standards, and safety guidelines.
• Collaborate with regulatory bodies and classification societies to obtain necessary approvals and certifications for electrical systems.

Requirements

• Diploma or Bachelor's degree in Electrical Engineering or related field.
• Proven experience (5+ years) in electrical design and commissioning, preferably in marine propulsion and control systems.
• Proficiency in electrical design software (e.g., AutoCAD Electrical, EPLAN) and simulation tools.
• Strong knowledge of marine electrical systems, power distribution, propulsion methods, and control strategies.
• Familiarity with marine industry standards (e.g., ABS, DNV, IMO) and relevant regulations.
• Excellent problem-solving skills and ability to troubleshoot complex electrical issues.
• Effective communication skills for collaborating with multidisciplinary teams and presenting technical information to clients and stakeholders.
• Project management skills with the ability to manage priorities, timelines, and resources effectively.
• Willingness to travel to shipyards and vessels for commissioning activities.
• Willingness to travel overseas as required.
• Positive with a can-do attitude.

Interested candidates, do send your resume to [email protected]

**Shortlisted candidates will be notified through email for an interview.

Physical Design Engineer (Digital IC)

Job Description：
1. Works with the senior physical design team to complete the chip floorplan , clock architecture, and powerplan .
2. Involved in one or more physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tapeout.
3. Researches the physical design methodology of advanced process nodes, and builds an automatic physical design platform.

Position Requirements:
1. Holds a bachelor's degree or above in electronic engineering, microelectronics, or computer science
2. 0 - 5 years of work experience in the digital backend design field. (Fresh graduates can be considered).
3. Those with experience in TCL , Perl or Python script development and familiar with EDA tool design will be plus.
4. Willing to work in a new start up entity in Singapore

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.

Available Job Responsibilities

• Design and build memory or circuit blocks at the gate or transistor level
• Simulate and analyze the circuit design using transistor level simulators
• Extract the layout and perform post-layout simulations and verification
• Floorplan physical implementation and layout integration of design components
• Integrate characterization flow to extract timing and power information
• Develop scripts to automate characterization flow, simulations, and verification
• Specify and verify various behavioral and physical memory models
• Document the design specifications, behavioral description, and timing diagrams
• Help specify silicon test plan and correlate silicon to simulation data

Preferred Skills

• Good understanding of transistor level circuit behavior and device physics
• Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
• Proficiency in running simulators, writing automation scripts, and are tools savvy
• Understanding of memory behavioral and physical models is a plus
• Expertise in memory circuit design is a plus
• Understanding of DFT schemes and chip level integration is a plus
• Good communication, interpersonal, and leadership skills
• Motivated, self-driven and good at multi-tasking
• Passion for solving complex problems and willingness to learn

Qualifications

Requires a BS in Electrical or Computer Engineering and > 5 years of related experience

Senior Electrical Design and Commissioning Engineer (Marine Vessel Solution)

• Penjuru (Transport Pickup Provided at: Jurong East, Choa Chu Kang, Bishan & Serangoon)
• Monday - Friday: 8.30am to 6.00pm
• S$ 4,000 - 6,000

Key Responsibilities

• Electrical Design: Collaborate on system requirements, develop schematics, select components, and design control logic for marine vessel propulsion/control systems.
• Commissioning and Integration: Oversee installation, testing, and validation of electrical systems.
• System Optimization: Analyze performance, identify optimization opportunities, and implement innovative solutions.
• Documentation and Reporting: Create technical documentation and commissioning reports.
• Regulatory Compliance and Safety: Ensure compliance with maritime regulations, industry standards, and safety guidelines.

Requirements

• Diploma/Bachelor's in Electrical Engineering or related field
• Relevant experience in electrical design/commissioning (marine propulsion/control systems preferred)
• Proficiency in electrical design software (AutoCAD Electrical, EPLAN) and simulation tools
• Knowledge of marine electrical systems, industry standards (ABS, DNV, IMO), and regulations
• Requires to travel overseas for commissioning activities (shipyards/vessels)

Apply now for Interview arrangement

Daniel Wong | Senior Consultant | Reg No: R2095781

The Supreme HR Advisory Pte Ltd | EA No: 14C7279

Job Descriptions:

• Position : HVAC Engineer
• Well Established Marine and Offshore Service Provider
• Working hours: Monday – Friday
• Salary (commensurate with experience): Up to $6,000
• Working Location: Tuas
• Duration: Permanent
• Industry: Marine and Offshore

Main Responsibilities:

• Engaged in all mechanical engineering designs, calculations, preparing bill of materials, and liaise with customer and suppliers for any engineering query.
• Participated in design and construction document preparation and submissions.
• Conducted technical review and clarifications with customer and suppliers.
• Coordinated design efforts with other engineering disciplines.
• Participated in construction, installation, testing and commission activities.
• Involve in identifying the Company scope of work in the project.
• Involve in solving technical issues that arise in the project.
• Monitor the progress of the document submission.
• Performed some drafting scope and also guide drafters for drafting.

Requirements:

• Minimum Diploma/Degree in Engineering or related field.
• Relevant job experience in oil and gas/process/marine industry preferred.
• Must have basic mechanical design knowledge.
• Proficient in performing HVAC cooling capacity calculations, pressure drop calculations, and duct sizing.
• Experienced in duct installation and HVAC system installation.
• Skilled in creating piping and instrumentation diagrams (PID), Airflow diagrams, and ducting and instrumentation diagrams (DID).
• Knowledgeable in basic pipe sizing, selection, and pipe installation.
• Familiar with basic fire suppression systems.
• Proficient in using AutoCAD for drawing and design.
• Proficient in MS Office applications.

Email to: [email protected] for more information.

***We do not charge our candidates any referral fee nor bind them with any contract. ***

Eugenie Cheah

Consulting Manager

Reg no.: R24122293

EA No: 20C0257

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628