Total 248 failure analysis engineer job vacancies in Art / Design / Entertainment category in d04 harbourfronttelok blangah sentosa island

Young and research intensive, Nanyang Technological University (NTU Singapore) is ranked among the world’s top universities. It has 33,000 undergraduate and postgraduate students in engineering, computing, natural sciences, medicine, business, humanities, arts, and social sciences. Its main campus is frequently listed among the Top 15 most beautiful campuses in the world.

The School of Chemistry, Chemical Engineering and Biotechnology (CCEB) is a new interdisciplinary school formed by integrating the School of Chemical and Biomedical Engineering (SCBE) from College of Engineering and the Division of Chemistry and Biological Chemistry (CBC) from College of Science. CCEB faculty members conduct cutting-edge research in diverse areas of chemistry, chemical engineering, food science, bioengineering, biotechnology, and other fields.

We invite outstanding candidates to apply for a tenure-track faculty position at the Assistant Professor level with a research focus in the area of Single-Cell Analysis. Applicants should have a well-defined research vision and an outstanding track record of publications in top journals. Successful candidates are expected to develop innovative, internationally visible, and extramurally funded research programs. We are also seeking candidates with outstanding capacity to teach related topics at the undergraduate and graduate levels, including mentoring and supervision of undergraduate and graduate students. Some school and university services will be expected of the successful candidates.

CCEB seeks a diverse and inclusive workforce and are committed to equality of opportunity. Applicants, irrespective of age, race, gender, religion, marital status and family responsibilities, or disability, are encouraged to apply. Our recruitment process is entirely merit-based.

Requirements

We are seeking individuals with expertise and a proven track record in fields related to single-cell biology, including but not limited to single-cell genomics and transcriptomics, single-cell microscopy, spatial genomics and transcriptomics, image-omics, in situ sequencing, molecular biophysics, single molecule spectroscopy, computational biology and bioinformatics, biostatistics, and systems biology.

Emoluments

The commencing salary will depend on the candidates' qualifications, experience, and the level of appointment offered.

Application Procedure

Interested applicants are invited to submit their applications, including

(1) A cover letter and detailed CV,

(2) Statement of aspiration in research (up to 5 pages including figures but excluding references),

(3) Statement of aspiration in teaching (up to 2 pages),

(4) Three selected publications,

(5) Three names and contact information of the referees, through the NTU career portal.

Please submit the full set of documents as outlined above.

All applications and enquiries should be addressed to: Prof Ling Xing Yi, Single-Cell Analysis Search Committee Chair

Please click here to apply.

Job Description:

• Experienced in structural engineering design works mainly for road/viaduct projects.
• Supervision of drafting for the preparation of project documentation.
• Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to assist in the production of detailed drawings, the development of quantities, materials lists and cost estimates as required.
• Assist in the preparation of technical detail for quotations, contract documentation and technical specifications.
• Prepare technical submissions for materials, construction methods and C&S shop drawings.
• Liaise with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Participate in the planning of projects as required.
• Previous experience in the use and application of Appropriate Singapore local and international Standards for structural design.
• Attend site inspection with required

Job Requirement

• Bachelor of Engineering (Civil) with minimum 5 years of structural engineering experience.
• Good knowledge of the various engineering design software, for instance Autocad, BIM
• Experienced in LTA projects would be advantage.
• Excellent written and verbal communication skills with an excellent eye for detail.
• Team Player.
• Meeting delivery deadlines and budgets.

• Create detailed designs and layouts for steel structures using CAD software (e.g., AutoCAD, Tekla, SolidWorks)
• Develop accurate structural drawings, including framing plans, connection details, and assembly drawings.
• Perform design calculations to ensure structural integrity, load-bearing capacity, and compliance with codes.
• Strong knowledge of steel structure design principles and software (e.g., STAAD.Pro, Tekla, SAP2000).
• Familiarity with construction materials, fabrication processes, and assembly techniques.

Job Description:

• Experienced in structural engineering design works mainly for road/viaduct projects.
• Supervision of drafting for the preparation of project documentation.
• Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to assist in the production of detailed drawings, the development of quantities, materials lists and cost estimates as required.
• Assist in the preparation of technical detail for quotations, contract documentation and technical specifications.
• Prepare technical submissions for materials, construction methods and C&S shop drawings.
• Liaise with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Participate in the planning of projects as required.
• Previous experience in the use and application of Appropriate Singapore local and international Standards for structural design.
• Attend site inspection with required

Job Requirement

• Bachelor of Engineering (Civil) with minimum 3 years of structural engineering experience.
• Good knowledge of the various engineering design software, for instance Autocad, BIM
• Experienced in LTA projects would be advantage.
• Excellent written and verbal communication skills with an excellent eye for detail.
• Team Player.
• Meeting delivery deadlines and budgets.

Job Descriptions

• Execute design activities with customer design proposals, specifications, manuals, and other data.
• Evaluate the feasibility, cost, and maintenance requirements of designs or applications.
• Prepare and update 3D drawing and control in every issuance of drawings, in accordance with the detailing procedures and standards using AutoCAD application/ BIM Softwares.
• Study drawings and other pertinent papers for preparation for fabrication and erection drawings.
• Checking of elevation, dimension, and reinforcement of all structures as indicated in plans.
• Prepares final as-built drawings as per requirement of the client.
• Liaise with Client, Client's Consultants, Contractor, and the Design Checker to obtain approval of design and drawings.

Job Requirements

• Degree in Mechanical Engineering
• Min 5 yrs experience in Mechanical Design
• BIM,AutoCAD/Inventor/Solidwork experience, preferably in designing wiches & lifting equipment
• Good communication skill, salf motivated, and positive attitude.
• Independent and hardworking.

Task Management:

• Preliminary vessel concept work for tendering
• Prepare 2D & 3D drawings/models for construction
• Engineering system calculations to various classification society rules
• Preparation & review of production drawings for construction
• Follow approved company processes as defined in the Strategic Marine Business Management System
• Assist in the development of design office standards / procedures
• Able to take on project management tasks
• Ensure OHSE policies & guidelines are carried out

People Management:

• Provide technical and professional support to junior staff

Interpersonal Management:

• Liaise with Project Managers and Designers
• Liaise with class and flag societies
• Liaise with customers to meet contracted requirements
• Liaise with external design organisations
• Liaise with production departments to provide technical support

Information Management: (Will this person be handling paperwork e.g. reports, forms, invoices, drawings, documentation, etc? What will this involve?)

• Provide regular communications to the Design Manager
• Attend Design & Project meetings and conference calls
• Provide info on work accomplished for B.O.D. reports on monthly basis to the Design Manager
• Ensure proper filing and documentation of drawings, calculations & other project documents in the design server
• Maintain an accurate project design register
• Provide weekly timesheets to Accounts and Design Manager

Personal Management: (How will this person have to behave to be successful in this job e.g. Honest, Reliable Punctual?)

• Open, respectful & approachable
• Act with integrity and honesty
• Continue to develop skills and industry knowledge through a variety of means
• Ability to work unsupervised to meet deadlines
• Flexibility and ability to multi-task
• Ability to mentor and develop junior staff
• Passionate about boats and a desire to work on a range of vessel types

Job Requirements

• Leading a Team of Tankage Design Engineers to execute the Tankage Design Engineering of the Project which includes design of Fixed Roof Tank / Floating Roof Tank as per API 650, Low Pressure Tank as per API 620, Spherical Tank and Bullets as per ASME Section VIII & Cryogenic Double Wall Tanks as per API 620 & API 625.
• Review & Checking of Tankage Design Documents such as Design Calculation for Tank, Finite Element Analysis, Tank Data Sheets, Tankage Material specification, Tankage Fabrication Drawings & ensure Compliance to API 650, API 620, API 625, ASME Sec VIII, AP 2000 and all Applicable Codes & Standards.
• Interface Management with Lead Engineers, Client, Contractors, Vendors, Government Agencies and Certification agencies.
• Preparation, Monitoring and Control Engineering Document Control List and expedite for delay / approvals / resolution of open issues.
• Review and ensures that all works are carried out in accordance with project specification. Maintain Design integrity and quality within the Project Engineering Team
• Preparing Engineering schedule and Engineering man hours estimation to meet project requirements.
• Coordination with PMC and Construction Coordination.
• Participates in discipline and inter-discipline design check and screening meetings for compatibility, completeness and correctness in works.
• FEED & Pre-Bid works which involves Feasibility study & MTO estimation works.
• Preparation of Technical Specification for Works and Technical Bid Evaluation
• Preparation and Compliance for Engineering Audit Requirements.
• Job assignments, Mentoring and Supervision of works for Designers and Design Engineers.
• Technical assistance to construction activities and attending to Site Queries.
• Preparation of Foundation Loading Data.
• Generate 2D construction drawings and data sheet.
• Preparation of purchase requisition for tank accessories such as roof seal, roof drain system, aluminium dome roof & etc. Preparing technical bid evaluation for item purchased. Checking vendor’s calculation & construction drawings.
• Checking of construction drawings. Preparation of bill of material for purchasing.
• Preparation of technical queries to client base on design deviation.
• To be proactive in creating a safe working environment for everyone and ensuring that HSE in-house rules are observed at all times.
• To consider HSE aspects when planning and carrying out tasks to eliminate and reduce HSE hazards, aspects and risks.

Qualification

Preferably Bachelor of Engineering (Mechanical)

Experience

Preferably Minimum 15 years of experience

Software Requirements

1) Autocad

2) Good proficiency in MS Excel, MS word

Code Knowledge

1) API 650/ API 620

2) ASME Section VIII D1 & D2

3) ASME Section II Part A & D

4) ASTM

5) NFPA

Job Description:

• Review and coordinate detailed civil/ structural/geotechnical design.
• Execution of projects and liaison with the Client, Client’s Consultants, Contractor, and authorities.
• To liaise with AC and QP(D) to ensure that all permits and applications as required by BCA are endorsed in tandem with the progress of the Works.
• Assist to check on the design calculations.
• Lead in the review of Contractor’s submissions required of the Consultant and coordinate with his respective QP(S) and the Contractors design teams to ensure prompt resolution of all design related issues arising from the reviews of the Temporary and Permanent Works.

Job Requirements:

• Degree in Civil/ Structural/ Geotechnical Engineering or its equivalent.
• Minimum 2 years relevant experience in Singapore.
• Good exposure in the analysis and design of civil works or soil-structure interactions.
• Good knowledge of the various engineering design software and analytical tools.

Job Description

• Prepare single-line schematics in AUTOCAD.
• Amend layout drawings and detail drawings.
• Assist in preparing project submission DWGS.
• Assist in material take-off.
• Assist in compiling the material list.
• Assist in preparing tender documents for submission.

Requirements

• Degree or diploma in mechanical engineering/material engineering.
• 2 years of relevant experience in the construction industry. Working experience in the water or wastewater industry will be an advantage.
• Fresh graduates are welcome.
• Be familiar with AUTOCAD and Bentley software.
• Must have advanced computer literacy, especially in Excel.

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.
  

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Job Description& Responsibilities:

· Responsible for advanced optical module/ethernet product hardware system and circuit design, provide design reviews, drive system/product design trade-offs, make data driven design choices to define product architecture

· Responsible for new product design verification and characterization, conduct high- speed link simulation, failure analysis and debugging in NPI stages to optimize design and ensure performance.

· Work with cross-functional teams to develop new products that are time to market and superior in performance, quality and cost.

· Contribute to optical transceiver module/ethernet product architecture and engineering specifications based on product and customer requirements.

· Perform system performance validation and DVT test plans, debug and analyze test results.

· Provide design documentation and technical reports.

Qualification:

· Bachelor/Master degree or above in electrical or electronics engineering or related fields.

· More than 7 years of working experience in optical module/networking switch or relevant products design and development.

· Sound knowledge of optical transceiver standards, architectures and applications, well understanding of design & trade-offs with respect to size, power consumption, thermal management and manufacturing complexity.

· Solid understanding of high speed signal integrity and power integrity analysis and optimization on PCB/system channel link analysis, well versed in modeling and simulation using tools such as HFSS, ADS, SIWAVE, LTSPICE etc.

· Familiar with high speed digital and analog ICs (CDRs, DSPs, SerDes, TIAs, DC-DC Converters, LDOs).

· Knowledge in IEEE 802.3 Ethernet and PCIe spec will be a plus.

· Extensive experience with lab equipment such as Sampling Scope, RealTime Scope, Protocol Analyzer, BERT, PNA/VNA.

· A solid team player with strong leadership and inter-personal skills, able to take proactive, collaborative and creative approaches to innovate and influence for optimal results.

· Strong written and verbal communication skills.

· Willing to travel as require.

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities

• Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)
• Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation
• Verify Logic at ISP level and Digital System level
• Optimize Design for less gate count and low power consumption
• Drive ISP Design activities in close collaboration with ISP Algorithm Team

Requirements

• Minimum MSEE, or BSEE, or equivalent, plus 3+ years of Digital Design and verification related experience
• Experience / knowledge in CMOS Image Sensor and Image Signal Processing (ISP)
• Experience / knowledge in System C/C++, System Verilog, and Catapult HLS tool.
• Strong debugging and problem-solving skills
• Good communication and interpersonal skills
• Result oriented and embrace change behaviours

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

RESPONSIBILITY

• Assume a technical expertise in assessing sites, conducting detailed drawings, and estimating Solar project capacity and costs.
• Formulate comprehensive design specifications and functional requirements for the region, ensuring alignment with project needs.
• Complete system designs for projects including site plans, mechanical racking and attachment plans, single-line electrical drawings, specification of balance of system location and interconnection details.
• Conduct in-depth analysis of factors influencing system performance.
• Partner with the O&M Team to evaluate system performance, identify optimization opportunities, and drive continuous improvement initiatives.
• Perform software simulations of solar photovoltaic (PV) system performance & energy production
• Execute design calculations, encompassing voltage drop analysis, fault current assessments, and system optimization strategies.
• Ensure compliance with EPC contract specifications and regulatory requirements, mitigating risks and optimizing project outcomes including on-site engineering support.
• Collaborate closely with contractors to review and approve engineering drawing submissions, maintaining rigorous quality control standards.

QUALIFICATIONS & EXPERIENCE

• Degree/Diploma in Electrical Engineering discipline
• 3 to 5 years’ experience in Solar PV system design / engineering.

SKILLS/COMPETENCIES & PREFERRED CHARACTERISTICS

• Proactive self-starter with an ability to thrive in dynamic environments
• Solution-oriented approach with a track record of overcoming complex challenges and driving innovation
• Collaborative team player and able to guide the drafting team.
• Adaptability and willingness to embrace new technologies and methodologies
• Proficient in Microsoft Office and Excel capabilities for data analysis and reporting
• Proficient in design software such as PV AutoCAD,

Job Description

• Develop and create 2D and 3D piping layouts, plans, isometrics, ensure that piping designs are optimized for efficiency, ease of maintenance, and compliance with project and industry standards
• Create detailed piping layouts and general arrangements for the plant, ensuring that pipe routing minimizes interference with other disciplines (civil, mechanical, electrical) and optimizes space utilization
• Collaborate with stress engineers to ensure pipe routing and support arrangements can handle thermal expansion, seismic loads, and pressure differential
• Prepare detailed piping design deliverables, including pipe routing layouts, support details, isometric drawings, and bill of materials (BOM). Ensure designs comply with all relevant standards
• Collaborate with process, mechanical, civil, and electrical teams to ensure seamless integration of piping designs with other plant systems
• Work closely with the procurement team to prepare piping material specifications, liaise with suppliers for quotation and support vendor evaluations for piping components (valves, flanges, supports, etc.)
• Review piping installation drawings and provide feedback for improvement to ensure constructability
• Conduct site visits as needed to verify piping installations are in accordance with the approved designs

Requirements

• Diploma/Degree in Mechanical Engineering
• For Degree holder, minimum 5 years of experience in piping design. For Diploma holder, minimum 8 years of experience is required. For senior position, candidate must have at least 10 years of experience
• Must be a self-starter and be able to work with minimal supervision, make sound decisions, take independent action, and provide focused solutions to assigned projects
• Possess strong inter-personal and communication skills and be able to work well with people at all levels in the organization
• In-depth knowledge of piping design codes and standards (ASME, ANSI, PUB regulations)
• Must have advanced computer literacy in commonly usedsoftware applications such as Navisworks, Bentley View, AutoCAD, piping design & drafting tools and MS Office
• Experience in process plant (such as wastewater treatment plant, sludge incineration plant, etc.) is preferred

RESPONSIBILITY

• Assume a technical expertise in assessing sites, conducting detailed drawings, and estimating Solar project capacity and costs.
• Formulate comprehensive design specifications and functional requirements for the region, ensuring alignment with project needs.
• Complete system designs for projects including site plans, mechanical racking and attachment plans, single-line electrical drawings, specification of balance of system location and interconnection details.
• Conduct in-depth analysis of factors influencing system performance.
• Partner with the O&M Team to evaluate system performance, identify optimization opportunities, and drive continuous improvement initiatives.
• Perform software simulations of solar photovoltaic (PV) system performance & energy production
• Execute design calculations, encompassing voltage drop analysis, fault current assessments, and system optimization strategies.
• Ensure compliance with EPC contract specifications and regulatory requirements, mitigating risks and optimizing project outcomes including on-site engineering support.
• Collaborate closely with contractors to review and approve engineering drawing submissions, maintaining rigorous quality control standards.

QUALIFICATIONS & EXPERIENCE

• Degree/Diploma in Electrical Engineering discipline
• 3 to 5 years’ experience in Solar PV system design / engineering.

SKILLS/COMPETENCIES & PREFERRED CHARACTERISTICS

• Proactive self-starter with an ability to thrive in dynamic environments
• Solution-oriented approach with a track record of overcoming complex challenges and driving innovation
• Collaborative team player and able to guide the drafting team.
• Adaptability and willingness to embrace new technologies and methodologies
• Proficient in Microsoft Office and Excel capabilities for data analysis and reporting
• Proficient in design software such as PV AutoCAD,

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628