Total 122 network engineer job vacancies in Art / Design / Entertainment category in D19 Serangoon Garden, Hougang, Sengkang, Punggol

What you will do

• Responsible for physical design and development activities of MediaTek Ghz, AI processors and neural network DSP
• Involve in activities encompass physical design and analysis of complex and timing-critical AI processors and neural network DSP Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing, power optimization and physical verification
• Work closely with MediaTek colleagues in Taiwan and Singapore in implementation methodology co-development and flow deployment

What you will bring

• Bachelor/Masters Degree in Electrical/Computer Engineering
• High-speed NPU/GPU/CPU Subsystem RTL Integration experience or IP/Block/SoC Design experience is preferred
• Experience with Synopsys ICC2/FC (preferred) or Cadence Innovus tools from netlists to GDS
• Experience in high-speed processor implementation/power reduction flows and methodology from RTL to GDS (including synthesis, floor-planning, placement, CTS, routing, timing optimization, physical verification)
• Experience with power noise and reliability tools such as Redhawk and Voltus
• Experience with timing signoff tools such as PrimeTime and Tempus and timing closure tools such as Tweaker and PrimeClosure
• Knowledge of high-speed/low power IP and custom circuit design
• Good communication and scripting skills

Location: One North, Singapore

Important Note: This advertisement is not for immediate hiring but is intended to identify suitable candidates for future openings in this position.

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

Job Responsibilities.

• Electrical design for Industrial Automation Systems
• Discuss project specification with sale department, internal design team and customer.
• Ensures project specification is sufficient for electrical design work.
• Ensure the drawing, software and manual are done and issue to the customer
• Support sales department in design concept and costing for new enquiries

Job Requirements

• Diploma/Degree in Electrical & Electronics Engineering or equivalent
• Design experience in similar capacity, preferably in Industrial Automation Systems and Robotic Systems added advantage
• Candidates without relevant experience will be considered for junior engineer role
• Occasional travel maybe required
• Able to work under tight schedule and minimal supervision
• CAD knowledge such as solid edge, Auto CAD, Inventor

We regret that only shortlisted candidates will be notified.

Job Responsibilities:

Project Design and Development:

• Lead the design process for civil/structural engineering aspects of deep excavation projects.
• Develop detailed geotechnical design plans, ensuring compliance with relevant codes and regulations.
• Conduct engineering analyses, including stability assessments and structural integrity evaluations.

Technical Leadership:

• Provide technical guidance and mentorship to junior engineers and design teams.
• Review and approve design calculations, drawings, and specifications.
• Troubleshoot and resolve complex design and construction issues.

Stakeholder Collaboration:

• Collaborate with multidisciplinary teams, including architects, contractors, and project managers.
• Liaise with clients, regulatory authorities, and other stakeholders to ensure project requirements and standards are met.

Quality Assurance and Compliance:

• Ensure that designs meet local regulations, safety standards, and best practices.
• Participate in audits, inspections, and peer reviews of design work.

Project Management:

• Manage timelines, budgets, and resources for design deliverables.
• Support the preparation of technical reports and documentation.

Job Requirements:

• Bachelor’s or Master’s degree in Civil/Structural Engineering or a related discipline.
• Recognized professional engineering qualifications by the Professional Engineers Board of Singapore.
• A minimum of 10 years of relevant experience in civil/structural engineering, with at least 5 years focused on designing geotechnical works for deep excavation projects.
• Proven expertise in handling projects of a similar size and complexity.
• Strong knowledge of geotechnical design principles, soil mechanics, and structural analysis.
• Proficiency in relevant design software and tools (e.g., Plaxis, AutoCAD, STAAD.Pro).
• Excellent communication, leadership, and problem-solving skills.

Preferred Qualifications:

• Chartership or equivalent professional accreditation (e.g., PE, CEng).
• Familiarity with Singapore’s construction and regulatory environment.
• Experience with risk assessment and mitigation for geotechnical designs.

Job Description:
We are looking for a highly skilled Physical Chip Design Engineer to lead the development of low-power and high-performance chip design processes. This is a critical role that requires deep expertise in advanced semiconductor technologies and the ability to drive full-chip physical design workflows from start to finish.

Key Responsibilities:

• Low-Power Physical Design Workflows: Lead and optimize processes to enhance energy efficiency while maintaining chip performance.
• Full-Chip Floor Planning & Place-and-Route: Oversee floor planning to ensure optimal performance, power, and area. Manage place-and-route processes for efficient, functional designs.
• Power Network Design & Analysis: Design and optimize power distribution networks, perform grid analysis to ensure power integrity and low-power design.
• Timing Closure, Power Integrity, & Signal Integrity: Resolve timing challenges, ensure power and signal integrity signoff, and perform necessary optimizations.
• Physical Verification (DRC & LVS): Conduct thorough physical verification, including Design Rule Checks (DRC) and Layout Versus Schematic (LVS) to ensure compliance with design specifications.

Qualifications:

• Education: Bachelor’s degree or higher in Electronics, Electrical Engineering, Computer Science, or related field. Advanced degrees (Master’s/Ph.D.) are a plus.
• Experience: 4-5 years of hands-on experience in physical design, with expertise in low-power, high-performance chip design. Experience with 12nm and below semiconductor technologies and tape-out processes is essential.
• Technical Skills:
  • Expertise in full-chip floor planning, place-and-route methodologies, and physical verification (including DRC and LVS).
  • In-depth knowledge of power network design, IR drop analysis, and timing closure.
  • Proficiency in Synopsys IC Compiler, Cadence Innovus, or similar tools.
  • Proficiency with Static Timing Analysis (STA) tools.
• Programming Skills: Strong scripting skills in Perl, TCL, Python, and C++.

Job Summary:

We are looking for an Architecture Design Engineer to focus on the development and optimization of AI Chip hardware systems. This highly technical role involves designing simulators, optimizing AI chips at various levels, and developing front-end code to ensure AI chip functionality and performance.

Key Responsibilities:

• Simulator Design:
  Utilize tools like GEM5 to design and develop simulators for AI chips, ensuring accuracy and efficiency in simulating chip behavior across various workloads.
• Performance Optimization:
  Optimize AI chips at:
  • Algorithm Level: Enhance computational algorithms for efficiency.
  • Architecture Level: Design and refine the overall chip structure.
  • Circuit Level: Improve low-level electrical performance.
• Front-End Code Development:
  Write, test, and optimize front-end code for AI chip functionality, ensuring compatibility with the chip’s architecture.

Qualifications:

• Educational Background:
  Minimum Bachelor's degree in Computer Science, Electronics, or a related field. Advanced degrees are a plus.
• Technical Knowledge:
  • Strong understanding of computer architecture and AI hardware accelerators (e.g., GPUs).
  • Familiarity with memory access patterns in AI models and effective memory handling.

Job Description:

We are looking for an Analog Chip Design Engineer to lead the development of digital standard cell libraries and design advanced analog circuits. You will optimize circuit designs, innovate new digital standard cells, and collaborate with cross-functional teams to meet performance, power, and area requirements.

Key Responsibilities:

• Circuit Design & Optimization: Lead analog circuit design, optimize for speed, power, and reliability using Cadence Virtuoso, Spectre, and HSPICE.
• Digital Standard Cell Libraries: Develop high-performance, low-power digital standard cells.
• Innovative Architecture Development: Research and design innovative digital standard cell architectures and explore new logic families and power-saving techniques.
• Collaboration: Work with layout designers to ensure manufacturability, performance, and adherence to DFM/DFT standards.

Qualifications:

• Education: Bachelor’s degree or higher in Electronics Engineering, Computer Science, or related field. Master’s or Ph.D. is a plus.
• Experience: 5+ years in high-performance analog design with expertise in deep sub-micron process technologies (12nm and below).
• Skills:
  • Analog Design Expertise: Proficient in transistor-level design, noise analysis, and power optimization.
  • Tool Proficiency: Experience with Cadence Virtuoso, Spectre, and HSPICE.
  • Digital Standard Cell Design: Experience designing digital cells balancing performance, power, and area.
• Communication: Strong collaboration skills and ability to work in cross-functional teams.

Job role:

1. Works with the front-end design team to complete the chip floorplan , clock

architecture, and powerplan .

2. Takes charge of the physical design tasks from the Netlist to the GDS2, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability (DFR) and tapeout.

3. Researches the physical design methodology of advanced process nodes, and builds an

automatic physical design platform.

Position Requirements:

1. Holds a bachelor's degree or above in electronic engineering, microelectronics, or computer science.

2. At least 3 years of work experience in the digital backend design field.

3. Hands-on project experience is required.

4. Tapeout experience at advanced technology is prefered.

5. TCL , Perl or Python script development and familiar with EDA tool design will be plus.

What you will do:

• Provides sales support to the engineering /sales team. Conducts engineering design and processes and / or financial analysis during project development. Generates take-off plans and specifications. Develops and writes estimates or proposals. May call on potential customers as directed by sales managers.

How you will do it:

• Perform drafting, design and prepare engineering drawings (2D) and documentation as per customer’s/project requirements.
• Create electrical schematic, Design layout plans and detailed designs with AutoCAD software.
• Provide pre-sales support to Sales team, including proposal costing and attending technical clarifications
• meeting and/or presentation with customers
• Products sourcing from suppliers.
• Compilation and submission of all documentations as required as per the project requirements.
• Review customer’s technical comments and revise documentation and drawings.
• Visual Inspection and quality check on products/Systems.
• Prepare Functional Test Documents and Assist Project Operations Team on functional testing.
• Liaise and maintain good relationship with customers, subcontractors and suppliers

What we look for:

• Min. Diploma/Degree in Electrical/ Electronic Engineering
• More than 5 years’ experience in Marine Offshore Protection System with related experience.
• Good knowledge of NFPA/Marine Classification Rules & Regulations
• Familiar with Fire & Gas Detection, Vesda Systems.
• Proficiency in AutoCAD and Microsoft Office especially Microsoft Word and Excel.
• Resourceful, results-oriented, excellent interpersonal skills and business acumen
• Able to work independently and deliver results for multiple projects under tight deadlines
• Willingness to learn new things.
• Basic knowledge OT systems, such as SCADA and DCS
• Basic understanding of cybersecurity concepts and best practices, including risk management, threat modeling, and incident response
• Excellent analytical and problem-solving skills
• Strong communication and collaboration skills

What we offer:

• Competitive salary
• Paid vacation/holidays/sick time
• Comprehensive benefits package
• On the job/cross training opportunities
• Encouraging and collaborative team environment
• Dedication to safety through our Zero Harm policy

Lead and manage our cybersecurity product portfolio for APAC region. This role will be responsible for understanding our solutions, delivering compelling client presentations, and building strong relationships with both clients and partners. The ideal candidate will have a strong technical background in cybersecurity solutions, coupled with a passion for client engagement and market analysis. You will work closely with sales, marketing, and product teams to position our company as a thought leader in the cybersecurity industry.

Key Responsibilities

• Maintain deep technical knowledge of our cybersecurity product portfolio, including understanding of product features, benefits, and competitive advantages.
• Provide input on product development and enhancements based on customer feedback and market demands.
• Deliver engaging product demonstrations, showcasing the technical and business benefits of our cybersecurity solutions to potential clients.
• Tailor presentations to address specific client needs, challenges, and pain points in the cybersecurity landscape.
• Monitor industry trends, competitor activities, and emerging cybersecurity threats.
• Provide insights to the marketing team for product positioning, public relations, and content marketing strategies.
• Actively represent the company at industry events, forums, and thought leadership activities.
• Develop and maintain relationships with strategic technology partners, channel partners, and distributors.
• Work closely with alliance teams to develop joint go-to-market strategies and co-selling opportunities.
• Equip the sales team with product knowledge, tools, and training to effectively sell cybersecurity products.
• Collaborate with sales leadership to provide ongoing support and training for the sales team.
• To understand customer requirements, assist in the qualification processes and by utilising the company’s standard product and services portfolio to create a suitable solution in concept.
• Actively participate in the RFI/RFP process and development of the technical aspects of proposals in line with customer needs, liaising and qualifying with other colleagues as necessary. Present technical solutions to customers both formally and informally as required.
• To author the Technical Sections of Proposals for prospective customers and the solution design documents for handover to low level design.
• To participate with sales in winning customer commitment by carrying out specific tasks called for by the sales campaign plan. Generally, this will include presenting the company's technical competence and the customer specific technical solution.
• To validate appropriate order documentation initiated by sales prior to submission to the order desk or in the case of projects, to brief Project Management and Engineering to ensure they are equipped to deliver the solution.
• To provide additional information and advice to Service Delivery and to Operations and answer referrals, during implementation phase of a sold service.
• Where applicable ensuring that customer solutions remain fit for purpose throughout their life cycle by conducting regular customer reviews and initiating appropriate change. To keep the customer aware of emerging technologies, products and services.
• Where applicable work closely with the sales team in the ‘Account Planning/Development’ process and support their understanding of how products and services can be applied in the customer environment.
• Provide product knowledge transfer to other members of the sales organisation to enhance their ability to use products to create customer solutions.

Technical Skills & Experience

• A demonstrated knowledge or awareness of a variety of technologies and cybersecurity topics viz.; SASE, ZTNA, EDR,MDR, UEBA, Threat Analytics etc.;
• Strong domain knowledge in VPNs, SD-WAN, MPLS, Cloud Native Security functions such as Secure Web Gateways, Cloud Access Security Brokers, Firewalls, Cloud Sandbox, DLP and Zero-trust Network access.
• Technical solutions offered by various OEMs in the market around SDWAN, ZT and SASE. • Network design, SD-WAN, MPLS from edge to cloud, edge to Hub & Spoke & Mesh Architectures.
• Securely automated cloud connectivity as customers transition to SASE.
• Provide Consultation, Design, Architect, Delivery Phase wise Zero Trust Transformation for Customers from present state to future state.
• Deep product and solution knowledge Product positioning, differentiation across solutions, operational characteristics, integration of multiple cross domain platforms
• Lead demo and Proof of Concept (PoC).
• Train internal and external customer on latest trends in SASE, Network Security, Zero Trust trends and Framework
• Integration of various Security technologies with SIEM architecture.
• Sound knowledge in few areas of the cyber security domains viz.; Network Security, Cloud Security, Advanced Threat management, End point and content security in the order of preference.
• Sound understanding of multi-cloud security scenarios and cloud posture management solutions like CASB, CSPM,CWPP
• Knowledge and understanding of various Global standards like GDPR, NIST frameworks, HIPAA,MCTS T3, ISO 27001,ISO 27701, ISO 27018 etc.
• Knowledge of Privacy and associated frameworks and business needs.
• Understanding of technology and services irrespective of the OEMs.
• Stays abreast of current cyber security trends and threats to ensure that solutions provided to clients are applicable.
• Knowledge of various licensing schemes proposed by OEMs and hyper scalers.

Certifications

• Highly desirable to have one or two of professional certifications like SDWAN, SASE, Zero Trust, CEH etc.
• Cloud security certifications viz AZ 500, AWS certified Security specialist etc.; is most desirable.
• Various OEM certifications from leading vendors like ZScaler, Palo Alto, Fortinet, Cisco etc.

What you will be working on:

● Innovate and Build: Design and develop new, cutting-edge features for WebOrion®,

enhancing its ability to safeguard against web and API vulnerabilities.

● Pioneer AI Security: Research and create advanced modules for our next-gen AI firewall

that defends against AI-driven cyber threats.

● Full-Stack Impact: Manage and maintain databases, APIs, software, servers, and cloud

infrastructure.

● Agile Development: Contribute to an agile lifecycle—coding, debugging, testing, deploying,

and improving software releases.

● Customer-Centric Support: Provide top-notch technical support for our global enterprise

customers.

What we are looking for:

● Bachelor’s or Master’s Degree in Computer Science/ Engineering, Information Technology or

equivalent

● Hands on experience with Docker and programming languages such as Golang or Python.

● Interest in Security for AI. Defending against the next wave of AI attacks.

● Have a good understanding of RESTful APIs, databases, messaging queues, CI/CD tools

and software testing. Experience with Linux command-line and Git

● Able to write and document technical concepts

● Teamwork skills with a problem-solving attitude

● Preferably 1–2 years of relevant experience, though exceptional fresh graduates with

solid internship experience are welcome.

● Must be based in Singapore.

Why Join Us:

• Innovate for Impact: Be part of the team that's building a revolutionary AI firewall to
• defend against AI-driven threats, redefining the cybersecurity landscape.
• Global Exposure: Work with enterprise customers across ASEAN, Europe, and the
• US, gaining valuable international experience.
• Cutting-Edge Projects: Build cool cybersecurity products while working at the nexus of
• web, cloud, and AI security.
• Career Growth: Join a fast-growing company where your contributions make a real
• difference.

Interested applicants, please drop us a note at [email protected] with your CV and cover letter.

• We are a chip design service company invested by an international consortium and founded by a senior chip design technical team.
• The company is headquartered in Singapore and will take root in Singapore for long-term development.
• The company has strong R&D capabilities and its core technical team members all have more than 10 years of experience in chip design.
• We have rich industry experience and deep practical accumulation in ASIC design and business management.

Our office is located in one North and walking distance from MRT.

We Provide competitive salary and compensation package for the right candidate. We are work-life balance and friendly to employees with various benefit.

Job Description：

1. Works with the front-end design team to complete the chip floorplan , clock architecture, and powerplan .

2. Takes charge of the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tapeout.

3. Researches the physical design methodology of advanced process nodes, and builds an automatic physical design platform.

Position Requirements:

1. Holds a bachelor's degree or above in electronic engineering, microelectronics, or computer science.

2. At least 5 years of work experience in the digital backend design field. Hands-on project experience is required. Tapeout experience at advanced technology is prefered. ( for excellect junior candidates with 3+ years experience will be considerated )

3. Those with experience in TCL , Perl or Python script development and familiar with EDA tool design will be plus.

4. Strong communication ability, good confidence and self-movitation.

5. Bilingual and with good teamwork spirit.

6. Salary is negotiable for excellent candidates.

Please apply here: https://talent.sage.hr/jobs/12fc69c2-7012-4edc-b214-bb9c2ded1da2

Applicants will need to include a Cover Letter and CV with publication list.

Applications will be reviewed on a rolling basis, with final submission 20 January 2025.

We are particularly looking for IC Design Research Engineers with the following backgrounds:

- Digital IC Design

- Analog IC Design

As an IC Design Research Engineer, you will design and innovate secure circuits and systems for next-generation low-power IoMT devices and sensors, focusing on hardware security, and smart computing and connectivity platforms.

Imperial College London and Nanyang Technological University (NTU) are seeking Research Engineers and Research Fellows to join the exciting new Imperial/NTU CYber Protection for HEalthcaRe (IN-CYPHER) research programme on the cybersecurity of connected medical devices and systems.

The successful candidates will join the research programme which represents a collaboration between the United Kingdom and Singapore and will be based at the newly established Imperial Global Singapore (IGS) housed within the unique CREATE campus.

Positions will be initially for 2 years fixed term (subject to 6-month probation) with potential for extension.

Informal enquiries are greatly welcome. You are encouraged to send an e-mail to Dr Viktor Schlegel, Deputy Programme Director [email protected], together with an indication of the specific position you would like to apply for.

Questions about the recruitment process, should go to Paige Noyce, Associate Director [email protected].

Positions are based in Singapore at Imperial Global Singapore at the National Research Foundations Campus for Research Excellence and Technological Enterprise (CREATE) located on the campus of the National University of Singapore.

Position Overview:

We are seeking a skilled Physical Design Engineer to join our team. As a Physical Design Engineer, you will be responsible for the entire process from RTL to GDS, ensuring the successful implementation of complex semiconductor chips. You will focus on block-level timing closure, formal checks, low power checks, power analysis, and signoff for block-level physical implementation. Your expertise in advanced process nodes, low-power design, and automotive chip physical design will contribute to the development of cutting-edge semiconductor products.

Responsibilities:

• Assist in the physical design process, overseeing RTL to GDS implementation for semiconductor chips.
• Achieve block-level timing closure by optimizing design constraints, performing timing analysis, and applying optimization techniques.
• Conduct formal checks to ensure designs meet functional and timing requirements.
• Perform low-power checks and analyze power consumption to optimize power efficiency.
• Collaborate with the design team to develop and implement UPF (Unified Power Format) for power management and control.
• Execute block-level Place and Route (APR), Static Timing Analysis (STA), Power Integrity (PI), Physical Verification (PV), and Formal Verification (FM) signoff processes.
• Utilize Synopsys and Cadence APR (Automated Routing and Place) tools for high-quality physical design.
• Develop and employ scripts in Tcl, Perl, or Python to automate design tasks and improve the design flow.

Qualification/ Requirements:

• Bachelor's/master’s degree in electrical engineering, Computer Engineering, or a related field.
• 2-4 years of experience in physical design for semiconductor chips.
• Proficiency in RTL-to-GDS flow, timing closure, low-power design, and power analysis.
• Strong understanding of UPF for power management and control.
• Experience with block-level Place and Route (APR), Static Timing Analysis (STA), Power Integrity (PI), Physical Verification (PV), and Formal Verification (FM) signoff.
• Familiarity with Synopsys and Cadence APR/Sign-off tools.
• Proficiency in scripting languages such as Tcl, Perl, or Python for automation.
• Excellent problem-solving skills and ability to work effectively in a team environment.

Responsibilities:

• Implement simulation models of AI SoC or subsystem designs

• Perform computer architecture performance simulation

• Analyse experimental data and perform architecture explorations

• Identify bottlenecks in design and provide feedback on micro-architecture

• Propose chip architecture optimizations for chip performance, power, and area improvement

• Cross-team collaborations to deliver high quality chip products

• Validate the correctness of the AI chip designs

• Write patents

Qualification:

• Bachelor degree and above in Electrical & Electronic Engineering, Computer Science or equivalent

• Familiar with computer architecture, such as AI accelerator, CPU, network-on-chip, memory hierarchy

• Familiar with C/C++ language

• Familiar with computer architecture simulation is preferred

• Strong learning capability, good communication and collaboration skills

• Fresh graduates are also encouraged to apply

Responsibilities:

• Implement simulation models of AI SoC or subsystem designs

• Perform computer architecture performance simulation

• Analyse experimental data and perform architecture explorations

• Identify bottlenecks in design and provide feedback on micro-architecture

• Propose chip architecture optimizations for chip performance, power, and area improvement

• Cross-team collaborations to deliver high quality chip products

• Validate the correctness of the AI chip designs

• Write patents

Qualification:

• Bachelor degree and above in Electrical & Electronic Engineering, Computer Science or equivalent

• Familiar with computer architecture, such as AI accelerator, CPU, network-on-chip, memory hierarchy

• Familiar with C/C++ language

• Familiar with computer architecture simulation is preferred

• Strong learning capability, good communication and collaboration skills

• Fresh graduates are also encouraged to apply

Responsibilities:

· Participate in feature definitions of the leading-edge AI chips

· Lead and participate the microarchitecture design of AI chip SoC and the subsystems

· Lead and participate in the front-end design and the implementation using HDLs

· Perform critical analysis and propose novel chip architectures for performance, power, and area improvement

· Cross-team collaboration with Software, DV, and Physical Design to meet performance, power, and area goals

· Write patents

Qualification:

· Bachelor degree and above in Electrical & Electronic Engineering, Computer Science or equivalent

· Experience in computer architecture, such as AI Accelerator, CPU, network-on-chip, memory hierarchy

· Experience in hardware module development using HDLs

· Experience with Logic Synthesis, Linting, CDC and DFT tools is preferred

· Good understanding of RTL verification flow and environments (e.g., UVM, VIP) is preferred

· Strong learning capability, good communication and collaboration skills

· Mid-senior to senior level positions are available

Responsibilities:

• Carry out structural design and analysis to meet project requirement.
• Prepare design calculations & shop drawings for submission.
• Provide general technical support to the in-house operations team.
• Technical marketing of structural strengthening products.
• Attend meetings with clients for pre and post contract to meet project requirement.
• Accountable for effective co-ordination of projects as assigned.
• Ensure all safety and quality assurance procedures and standards are followed.

Requirements:

• Must possess at least a good Degree in Engineering (Civil) recognised by the Ministry of Manpower, Singapore and is familiar with the British American Design Standards, and Eurocodes.
• Able to perform structural analysis using design software such as STAADPro ETABS, Prokon etc.
• Familiar with AutoCAD application.
• Good command of spoken and written English.
• Possess initiative, analytical thinking abilities and able to work both independently and as a team.
• Possess positive attitude and interpersonal relationship skills.
• Foreigners: Minimum of two years' experience in local consultancy firms will be an advantage.

Meet the Team

The IoT Digital team is a state-of-art IC design team focused on producing world-class Wireless MCU SoCs. The architecture specification, design, verification, and implementation of the Wireless MCU SoCs is the responsibility of the IoT Digital team. These SoCs include an embedded CPU system with analog and digital peripherals, advanced security, state-of-the-art power management, and best-in-class radios to support a wide range of wireless IoT applications and standards.

As Verification Engineer, you will be working closely with the IC Design, System, and Architecture teams to develop and execute the verification plan for the next generation of IoT chips.

Responsibilities

• Block and IP Verification
• Block-level verification to validate block performance and adherence to requirements
• Generate and execute verification plan based on specifications
• Architect and implement test benches using UVM-based constrained-random and formal methods
• Coverage definition, implementation, and analysis
• Formal Verification of mixed-signal IP integration, including real-number modeling
• SoC Integration and Verification
• Define, test and debug use cases for the SoC
• Verify and debug low-power design
• Flows and Methodology
• Improve flows and methodologies to streamline IP development and integration.

Skills You Will Need

Minimum Qualifications:

• Min. 5 years of IC design experience for senior positions. Open to junior candidates with strong foundation.
• Industry experience developing test benches and verification components with SystemVerilog and UVM is required
• Knowledge of scripting/language (Python, PERL, shell, TCL)
• Design/Verification skills such as Software/Firmware coding (C), SystemVerilog Assertion and coverage analysis, Low-power implementation (UPF), Mixed Signal Real Number Modeling (RNM, Spice)

Benefits & Perks:

You can look forward to the following benefits:

• Employee Stock Purchase Plan (ESPP)
• Insurance plans with Outpatient cover
• Flexible work policy

Position Overview:

We are seeking a skilled Senior Physical Design Engineer to join our team. As a Senior Physical Design Engineer, you will be responsible for the entire process from RTL to GDS, ensuring the successful implementation of complex semiconductor chips. You will focus on block-level timing closure, formal checks, low power checks, power analysis, and signoff for block-level physical implementation. Your expertise in advanced process nodes, low-power design, and automotive chip physical design will contribute to the development of cutting-edge semiconductor products.

Responsibilities:

• Lead the physical design process, overseeing RTL to GDS implementation for semiconductor chips.
• Achieve block-level timing closure by optimizing design constraints, performing timing analysis, and applying optimization techniques.
• Conduct formal checks to ensure designs meet functional and timing requirements.
• Perform low-power checks and analyze power consumption to optimize power efficiency.
• Collaborate with the design team to develop and implement UPF (Unified Power Format) for power management and control.
• Execute block-level Place and Route (APR), Static Timing Analysis (STA), Power Integrity (PI), Physical Verification (PV), and Formal Verification (FM) signoff processes.
• Utilize Synopsys and Cadence APR (Automated Routing and Place) tools for high-quality physical design.
• Develop and employ scripts in Tcl, Perl, or Python to automate design tasks and improve the design flow.
• Mentor junior engineers and provide technical guidance and support as needed.

Qualification/ Requirements:

• Bachelor's/master’s degree in electrical engineering, Computer Engineering, or a related field.
• 3-5 years of experience in physical design for semiconductor chips.
• Proficiency in RTL-to-GDS flow, timing closure, low-power design, and power analysis.
• Strong understanding of UPF for power management and control.
• Experience with block-level Place and Route (APR), Static Timing Analysis (STA), Power Integrity (PI), Physical Verification (PV), and Formal Verification (FM) signoff.
• Familiarity with Synopsys and Cadence APR/Sign-off tools.
• Proficiency in scripting languages such as Tcl, Perl, or Python for automation.
• Able to guide junior colleague when needed.
• Excellent problem-solving skills and ability to work effectively in a team environment.

Key Responsibilities:

• Development of Analog/Mixed-Signal circuits from specifications to prototypes.
• System-level analysis and evaluation, full-chip architecture design, analysis, modeling, simulation, and integration.
• Schematic entry, corner simulation, layout consideration, and post-layout simulation.
• Work closely with the layout engineer to conduct the physical implementation (layout) and chip floor planning.
• Responsible for post-layout extraction and parasitic analysis.
• Able to work with other designers, Chip Architects, and layout engineers to achieve full-chip integration, place and route, top-level verification, and tape out.

Requirements:

• Ph.D./Master/Degree in Electrical Engineering or Microelectronics with excellent technical background in Analog /Mixed-Signal IC design
• Min. 3 years of experience in CMOS Analog IC design and simulation
• Good design experience in Analog IC design involving two or more of the following blocks: low noise pre-amplifier (low offset, high CMRR, high PSRR and bandwidth up to 600MHz), CMOS Gigahertz Oscillator, switched capacitor circuit, LDO, Differential Amplifier, comparator, Opamp, TIA, and Bandgap Reference and high-frequency full-wave rectifier, etc.
• Good design knowledge in ESD and Latch-Up.
• Experience in isolator devices (capacitive-coupler or optical-coupler) and photodetector-associated circuits will be an added advantage.
• Experience with sigma-delta modulators and IO drivers will be an added advantage.
• Good working knowledge of relevant analog IC design and simulation tools (Spice or its equivalent)
• Basic understanding and can develop simple design-related scripts with some common script languages, such as perl, Tcl, matlab or cadence skill etc.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.
• Candidates with no prior working experience are welcome to apply.

Key Responsibilities:

• Development of Analog/Mixed-Signal circuits from specifications to prototypes.
• System-Level analysis and evaluation, full-chip architecture design, analysis, modeling, simulation, and integration.
• Schematic entry, corner simulation, layout consideration, and post-layout simulation.
• Work closely with the layout engineer to conduct the physical implementation (layout) and chip floor planning.
• Responsible for post-layout extraction and parasitic analysis.
• Able to work with other designers, Chip Architects, and layout engineers to achieve full-chip integration, place and route, top-level verification, and tape out.

Requirements:

• Ph.D/Master/Degree in Electrical Engineering or Microelectronics with excellent technical background in Analog /Mixed-Signal IC design.
• Min. 5 years of experience in CMOS Analog IC design and simulation.
• Good design experience in Analog IC design involving two or more of the following blocks: low noise pre-amplifier (low offset, high CMRR, high PSRR and bandwidth up to 600MHz), CMOS Gigahertz Oscillator, switched capacitor circuit, LDO, Differential Amplifier, comparator, Opamp, TIA, and Bandgap Reference and high-frequency full-wave rectifier, etc.
• Good design knowledge in ESD and Latch-Up.
• Experience in isolator devices (capacitive-coupler or optical-coupler) and photodetector-associated circuits will be an added advantage.
• Experience with sigma-delta modulators and IO drivers will be an added advantage.
• Good working knowledge of relevant analog IC design and simulation tools (Spice or its equivalent).
• Basic understanding and can develop simple design-related scripts with some common script languages, such as perl, Tcl, matlab or cadence skill etc.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.

Key Responsibilities:

• Development of Analog/Mixed-Signal circuits from specifications to prototypes.
• System-level analysis and evaluation, full-chip architecture design, analysis, modeling, simulation, and integration.
• Schematic entry, corner simulation, layout consideration, and post-layout simulation.
• Work closely with the layout engineer to conduct the physical implementation (layout) and chip floor planning.
• Responsible for post-layout extraction and parasitic analysis.
• Able to work with other designers, Chip Architects, and layout engineers to achieve full-chip integration, place and route, top-level verification, and tape out.

Requirements:

• Ph.D/Master/Degree in Electrical Engineering or Microelectronics with excellent technical background in Analog /Mixed-Signal IC design
• Min. 8 years of experience in CMOS Analog IC design and simulation
• Good design experience in Analog IC design involving two or more of the following blocks: low noise pre-amplifier (low offset, high CMRR, high PSRR and bandwidth up to 600MHz), CMOS Gigahertz Oscillator, switched capacitor circuit, LDO, Differential Amplifier, comparator, Opamp, TIA, and Bandgap Reference and high-frequency full-wave rectifier, etc.
• Good design knowledge in ESD and Latch-Up.
• Experience in isolator devices (capacitive-coupler or optical-coupler) and photodetector-associated circuits will be an added advantage.
• Experience with sigma-delta modulators and IO drivers will be an added advantage.
• Good working knowledge of relevant analog IC design and simulation tools (Spice or its equivalent)
• Basic understanding and can develop simple design-related scripts with some common script languages, such as perl, Tcl, matlab or cadence skill etc.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.

Job description:

As a member of the filter design team, the successful candidate will play a key design role as a product owner of resonator/filter in development and commercialization of acoustic filters with both BAW and SAW technologies from beginning, concept meeting to end, mass production including characterization.

Experience with either SAW or BAW filter design -layout, simulation, fabrication, and characterization- is required for senior position and principal position is available for candidates with proven track record in ramping up commercialization of acoustics filters in mass production environment.

Responsibilities:

- Co-work with international team across China and Singapore on a cross-disciplinary team basis

- Use commercial circuit analysis and physical modelling tools as well as custom software packages to design and analyse acoustic filters

- Assist RF measurement analysis by generating test plans and analysing results

- Produce RF engineering reports to support team members

- Communicate with R&D team for co-design and device improvement

Qualifications/Desired skills:

- Track record in design and mass-production of SAW/BAW filters for mobile applications is highly desirable

- Strong skills and working knowledge of design simulation tools, e.g. ADS, AWR, HFSS, COMSOL, etc

- Understanding of RF test parameters and test equipment

- Understanding of filter application and mobile communication system and architecture

- Experience with drawing programs, schematic capture and PCB layout tools

- Experience in RFIC design, RF module and front-end system design is preferred

- Knowledge of MEMS fabrication

- Strong written and verbal English skills to support complex analysis

- Organized team player and a good learner who is open to discussions

What you will do:
As Digital Solution Engineer/ Architect, you will be taking lead on application of digital software to our customer requirements and supporting digital sales specialists to sell the deals with include:

Client Engagement:

• Engage with prospective and existing clients to understand their business objectives, challenges, and technical requirements.
• Conduct discovery sessions to gather detailed information on customer needs, pain points, and success criteria.
• Develop and manage customer technical relationships, identify and expand digital opportunities.

Solution Design & Architecture:

• Develop customized digital solutions that align with client requirements, leveraging Johnson Controls’ digital OpenBlue portfolio, including IoT, AI, and data analytics platforms.
• Create and present high-level architectural solutions that address client needs, ensuring scalability, flexibility, and efficiency.

Technical Support to Sales:

o Qualify opportunities in terms of customer technical requirements and contribute to the Go/No-Go recommendations.

• Collaborate closely with the sales team to provide technical expertise throughout the sales cycle.
• Assist in the preparation of proposals, RFP responses, and presentations, ensuring they are technically accurate and compelling.
• Act as a technical advisor and thought leader to clients during meetings, workshops, and demonstrations.

Internal & External Digital Advocate:

o Enable the branch eco-system on technical aspect of the OpenBlue Solutions.

o Identify & train external partners to expand JCI digital solution business market reach

Product Demonstrations

• Deliver compelling product demonstrations that highlight the value and capabilities of Johnson Controls’ digital solutions.
• Tailor demonstrations to specific client needs, showcasing how our solutions can address their unique challenges

Solution Validation & Product Roadmap:

• Work with internal product teams to validate and optimize solutions for client-specific implementations.
• Provide feedback to product development teams on client requirements and market trends to inform future product enhancements.

Post Sales Activities:

• Support delivery readiness and gathering required documents including Scoping documents, IT approval, technical support during implementation
• Support Customer Kick-off meetings.

Documentation & Training:

• Develop and maintain technical documentation, including solution architectures, integration plans, and client-specific configurations.
• Provide training to sales teams and partners on new digital solutions and architectural best practices.

Industry Knowledge & Trends:

• Stay informed about the latest trends in digital solutions, smart building technologies, and industry-specific regulations.
• Share insights and best practices with clients and internal teams to drive innovation and competitive advantage.

How you will do it:

Technical Skills:

• Strong understanding of digital solutions, including IoT platforms, AI, data analytics, cloud computing, OT Cyber security and smart building technologies.
• Good understanding of building protocols like BACnet, Modbus, OPC, MQTT and other BAS protocols
• Proficiency in architectural frameworks, integration methodologies, and solution design best practices.
• Experience with relevant software and SaaS application in built or industrial environment.

Soft Skills:

• Commercial acumen
• Excellent communication and presentation skills, with the ability to convey complex technical concepts to non-technical audiences.
• Strong problem-solving abilities and a customer-centric mindset.
• Ability to work collaboratively in a cross-functional team environment

What we look for:

• Bachelor’s degree in computer science, Engineering, Information Technology, electronics, instrumentation, communication or a related field. A master’s degree is a plus
• Relevant certifications in cloud architecture, IoT, networking, cyber security or other digital technologies are a plus
• At least 6-7 years of experience in built or industrial environment.
• Minimum of 5 years of experience in a solution architect or presales role, preferably within the digital solutions, IoT, or smart building technology sectors.
• Minimum 3 years of experience in designing or delivering energy efficiency, workplace optimization, Asset Management, Facility management, HVAC optimization or digitization SaaS application in built or industrial environment.
• Proven track record of successfully designing and presenting technical solutions that meet client needs and drive business outcomes.
• Proficiency in APAC local language, Chinese is a plus as this position will require to liase with Chinese speaking customers.

What we offer:

• Competitive salary in a MNC environment
• Comprehensive benefits package
• On the job/cross training opportunities
• Encouraging and collaborative team environment
• Dedication to safety through our Zero Harm policy

What you will do:

• Provides sales support to the engineering /sales team. Conducts engineering design and processes and / or financial analysis during project development. Generates take-off plans and specifications. Develops and writes estimates or proposals. May call on potential customers as directed by sales managers.

How you will do it:

• Perform drafting, design and prepare engineering drawings (2D) and documentation as per customer’s/project requirements.
• Create electrical schematic, Design layout plans and detailed designs with AutoCAD software.
• Provide pre-sales support to Sales team, including proposal costing and attending technical clarifications
• meeting and/or presentation with customers
• Products sourcing from suppliers.
• Compilation and submission of all documentations as required as per the project requirements.
• Review customer’s technical comments and revise documentation and drawings.
• Visual Inspection and quality check on products/Systems.
• Prepare Functional Test Documents and Assist Project Operations Team on functional testing.
• Liaise and maintain good relationship with customers, subcontractors and suppliers

What we look for:

• Min. Diploma/Degree in Electrical/ Electronic Engineering
• More than 5 years’ experience in Marine Offshore Protection System with related experience.
• Good knowledge of NFPA/Marine Classification Rules & Regulations
• Familiar with Fire & Gas Detection, Vesda Systems.
• Proficiency in AutoCAD and Microsoft Office especially Microsoft Word and Excel.
• Resourceful, results-oriented, excellent interpersonal skills and business acumen
• Able to work independently and deliver results for multiple projects under tight deadlines
• Willingness to learn new things.
• Basic knowledge OT systems, such as SCADA and DCS
• Basic understanding of cybersecurity concepts and best practices, including risk management, threat modeling, and incident response
• Excellent analytical and problem-solving skills
• Strong communication and collaboration skills

What we offer:

• Competitive salary
• Paid vacation/holidays/sick time
• Comprehensive benefits package
• On the job/cross training opportunities
• Encouraging and collaborative team environment
• Dedication to safety through our Zero Harm policy