Piping Design Engineer

• Working Days: 5 days’ work week
• Working Hours: 8:15 am–6 pm (Mon-Fri)
• Office Location: Joo Koon
• Salary Range: S$ 2,500 - 3,500

Responsibilities:

• Assist Project Team in execution of the project
• Collaborate with the project team to assist in the design and development of Fire Protection System & Modular Skids
• Generate and update technical documentation.
• Prepare & develop system P&ID and conceptual general arrangement drawings
• Work closely with cross-functional teams to ensure project milestones are met.
• Attend meetings on coordination & progress matters.
• Prepare drawings with AutoCAD/Solidwork
• Responsible in hydraulic calculation & reports.

Requirements:

• Candidate must possess at least a Diploma in Engineering or Equivalent
• Proficient in CAD software (3D SolidWorks, AutoCAD, etc.)

Apply now for Interview arrangement

Daniel Wong | Senior Consultant | Reg No: R2095781

The Supreme HR Advisory Pte Ltd | EA No: 14C7279

• Responsible for detailing and drafting precast concrete components for construction projects to ensure the successful production and installation of precast elements that meet project specifications, structural requirements and quality standards.
• Develop precast layout and fabrication shop drawings of precast elements for submission and production.
• Prepare reinforcement detailing and bar bending schedule.
• Ensure shop drawings are clear, accurate, and in accordance with project requirements, standard and project timelines.
• Incorporate openings, recesses, architectural features, cast in items, lifting system and other relevant information in shop drawings (2D & 3D).
• Raise RFI to finalize precast shop drawings.
• Coordinate with site team concerning on drawing details and technical issues to ease production as well as installation on site.
• Work closely with production and suppliers on the submission/issuance of shop drawings, highlight technical issues and keep them updated of any revisions.
• Attend technical meetings with consultants/clients as and when required.
• Perform any ad-hoc duties assigned.

Job Description:

1. Contribute to defining product specifications, microarchitecture, and implementation for high-speed memory interfaces.

2. Perform RTL coding, LINT checks, and initial testing of designs.

3. Collaborate with the verification team for debugging in the lab.

4. Work closely with the software team and/or customers to troubleshoot, debug, and optimize system performance.

Job Requirements:

1. Bachelor’s degree in Communications, Electronic, or Computer Engineering;

2. 6 of experience in ASIC design, with a strong understanding of the ASIC development process.

3. Proficiency in Verilog HDL coding and EDA tools for synthesis and timing analysis.

4. Experience with high-speed interfaces (e.g., DDR, SerDes, PCIe) is a plus.

5. Strong problem-solving skills and the ability to deliver results within deadlines.

6. Excellent organizational and communication skills.

Interested candidate please send your resume to [email protected]

This is 12 - months Contract (extendable + convertible)

Location: The Alpha, Science Park

Normal working hours

Essential Responsibilities:

• Carry out detail engineering task for water and wastewater treatment plant to full fill business obligation e.g. On-time delivery, Satisfy contract specification or industrial standard and bring value to customer. Work shall include but not limited to the following:
• Prepare sketches on P&IDs Drawing
• Prepare sketches on Fabrication Drawing
• Prepare sketches on Equipment Layout Drawing
• Prepare sketches on Pipe Routing Drawing
• Prepare equipment and material datasheet
• Perform equipment sizing calculation
• Perform pipe sizing calculation
• Perform hydraulic calculation
• Perform pipe stress analysis
• Perform material take off
• Raise purchase requisition
• Check and sign off engineering design
• Work together with in-house design team aboard to meet engineering deliverable.
• Contribute to value engineering to drive cost down.
• Evaluate vendor quote and provide input on vendor selection.
• Support business initiative to bid and win job as required.
• Support Project Management/ Construction Team on construction activities as required.
• Support Commissioning Team on commissioning activities as required.

Qualifications/Requirements:

• Bachelor Degree in Chemical/Mechanical/ Electrical Engineering
• Minimum 3- 5 years working experiences in design of water and wastewater
• Highly motivated and able to work under pressure
• Experience in construction, test and commission, and operation of water and wastewater plant is a plus point
• Well versed in MS Excel, MS Word, and MS PowerPoint
• Familiar in MS SharePoint, MS Team, and Naviswork
• Ability to operate AutoCAD and SAP is a plus point

Interested candidates, please click "APPLY" to begin your job search journey and submit your CV directly through the official PERSOLKELLY job application platform - GO Mobile.

We regret to inform you that only shortlisted candidates will be notified.

By sending us your personal data and curriculum vitae (CV), you are deemed to consent to PERSOLKELLY Singapore Pte Ltd and its affiliates to collect, use, and disclose your personal data for the purposes set out in the Privacy Policy available at https://www.persolkelly.com.sg/policies. You acknowledge that you have read, understood, and agree with the Privacy Policy.

PERSOLKELLY Singapore Pte Ltd

• RCB No. 200007268E

• EA License No. 01C4394

• Registration No. R23112260 (MayThinKyu)

Position Overview:

You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing, neural processing, advanced video analytics accelerators, and the entire Camera Processor SoC. You would be joining the team to explore, evaluate and define innovative design SoC architectures, to meet or exceed the technical requirements of the SoC. You would be responsible for the successful implementation of the designs in Verilog/SystemVerilog coding, metrics measurement to meet key objectives & results, and follow-through in comprehensive verifications to successful silicon.

Requirements:

1. Experience in SoC architecture and design, and RTL coding with Verilog/SystemVerilog

2. Experience in ARM, RISC processor system

3. Experience in embedded C and assembly code programming

4. Experience in analysis of power, timing and area

5. Experience in at least one of scripting languages (e.g. Perl, Python, TCL, or Bash)

6. Disciplined, quality-minded, and highly driven for excellence

7. Excellent team player and good communication skills

8. MSEE/BSEE in Electrical Engineering or Computer Engineering

9. Candidates with relevant experiences would be offered as Staff, taking on higher responsibilities

10. Experience in always-on system, automotive system, secured system, bus interconnect, neural processing, video processing and video analytics is a plus

11. Experience in system modelling and simulation using emulator and SystemC is a plus

12. Passionate and strong in general programming is a plus

Possess extensive knowledge of power plant systems and operations, along with strong leadership skills to lead a small team of engineers and technicians. This role is crucial for ensuring that all plant engineering tasks are executed correctly. The successful candidate will oversee plant engineering designs to guarantee that the plant operates efficiently and safely.

Key Responsibilities:

• Responsible for plant engineering design activities for power plant project including cable sizing calculation, cable routing, connection drawing, loop drawings, termination diagrams
• Work with 3D design team for 2D deliverables
• Lead, mentor, and manage a small team of engineers and technical staff
• Collaborate with different parties for plant engineering coordination and support site inspection
• Provide technical support for project manager for project engineering milestone deliveries
• Support purchasing team for technical evaluation and price optimization

Desired Characteristics:

• Knowledge of onshore power plant design engineering, prefer to have work exp in Singapore.
• Experience in coordination, leading and managing plant engineering teams.
• Familiar with complicated cable tray route, cable tray support engineering design, equipment layout, installation materials, cable glands selection, cable drum schedule, cable route schedule, cable termination material, and so on.
• Proficiency in relevant engineering software and tools, such as Revit, Navisworks, Autocad
• Min 6 years experience in Electrical composite plant project

Duration: 6 months (may be extendable)
Work Location: Ayer Rajah
Working hours: 8hours a day, 5 days a week

Job Summary:

Based in our Singapore office, you will join our IC Lab team as a Verification Engineer. In this role, you will develop and implement advanced verification methodologies, including UVM, SystemVerilog, and SVA, for cutting-edge projects. You will also work with platforms like Palladium Z1, HAPS, and Zebu to deliver high-quality verification solutions.

What you will be responsible for:

• Apply UVM (Universal Verification Methodology), SystemVerilog, Verilog, and SVA (SystemVerilog Assertions) languages in verification tasks
• Develop and implement state-of-the-art verification methodologies, including UVM, C/C++, co-simulation, system emulation, and mixed-mode simulation/emulation
• Contribute to projects requiring advanced verification tools such as Palladium Z1, HAPS, and Zebu platforms
• Collaborate effectively within a team, ensuring high-quality deliverables

How you will stand out:

• Possesses a Masters or Bachelors degree in Electrical Engineering or Computer Engineering
• At least 3 years of relevant experience
• Proficient in UVM, SystemVerilog, Verilog, and SVA languages
• Strong knowledge in protocols such as SPI, UART, and I2C
• Possesses knowledge of firmware development and in depth understanding of firmware development processes
• Excellent team player with strong communication skills.
• Highly driven and detail-oriented.
• Has experience working with advanced verification platforms like Palladium Z1, HAPS, or Zebu.

What you will experience working with us:

• A culture that values authenticity and diversity of thoughts and backgrounds;
• An inclusive and respectable environment with open workspaces and exciting start-up spirit;
• Fast-growing company with the chance to network with industrial pioneers and enthusiasts;
• Ability to contribute directly and make an impact on the future of the digital asset industry;
• Involvement in new projects, developing processes/systems;
• Personal accountability, autonomy, fast growth, and learning opportunities;
• Attractive welfare benefits and developmental opportunities such as training and mentoring.

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Bitdeer is committed to providing equal employment opportunities in accordance with country, state, and local laws. Bitdeer does not discriminate against employees or applicants based on conditions such as race, colour, gender identity and/or expression, sexual orientation, marital and/or parental status, religion, political opinion, nationality, ethnic background or social origin, social status, disability, age, indigenous status, and union.

Brand Executive

• Salary: $4,000 - $4,500
• Working days: Mon ~ Friday, 8am – 5.30pm
• Location: Jurong east

Job Summary

You will work closely with the Head of Program Management and International Marketing to develop collectible programs and generate leads to achieve team sales growth performance.

Job Responsibilities

• Develop and manage international commemorative coins and collectibles programs.
• Formulate, align and implement product marketing plans in meeting stakeholders and company’s business goals to achieve outreach and sales objectives.
• Ensure seamless and timely execution of product development, production, launch, marketing and sales plan.
• Conduct market trend analysis.
• Provide marketing expertise and support to sales channels to achieve marketing and sales objectives.
• P&L responsibilities for assigned programs.

Job Requirements

• Degree holder specializing in Business Studies/ Marketing / Arts & Social Science
• Min 5-year(s) relevant working experience in Marketing, Project Management or Product Development and Management
• Proficient in MS Office, strong in PowerPoint
• Knowledge of consumer product market and distribution channels would be an advantage

WhatsApp: https://wa.me/6591044149 (Shermaine)

Siah Sze Ming Reg No: R24125414

The Supreme HR Advisory Pte Ltd EA No: 14C7279

Job Description

• Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing.
• Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc.
• Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies.
• Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and specification of the products.

Job Requirements

• Bachelor/Masters Degree in Electronics/Electrical/Computer Engineering with min 1 year experience
• Good experience and knowledge in design flow from Netlist to GDS, Floor Planning, Synthesis, route , STA, CTS, RC Extraction and correlation
• Static timing analysis, power and noise analysis and back-end verification across multiple projects.
• Proficient with backend design EDA tools, Synopsys ICC2 preferred
• Successfully track records of taping out complex SOC
• Working knowledge of deep sub-micron routing issues as they relate to power and timing.
• Proficiency using Perl and TCL
• Self-motivated team worker, good verbal and written communication skills

Job Description

• Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing.
• Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc.
• Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies.
• Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and specification of the products.

Job Requirements

• Bachelor/Masters Degree in Electronics/Electrical/Computer Engineering with min 1 year experience
• Good experience and knowledge in design flow from Netlist to GDS, Floor Planning, Synthesis, route , STA, CTS, RC Extraction and correlation
• Static timing analysis, power and noise analysis and back-end verification across multiple projects.
• Proficient with backend design EDA tools, Synopsys ICC2 preferred
• Successfully track records of taping out complex SOC
• Working knowledge of deep sub-micron routing issues as they relate to power and timing.
• Proficiency using Perl and TCL
• Self-motivated team worker, good verbal and written communication skills

Ethos Search Associates Pte. Ltd.

EA Licence No: 13C6655

EA Reg No: R1109557 Rose

We have an exciting position in the explosive growth area of Data Center Enterprise Storage. In this role you will be responsible for
developing the most advanced semiconductor devices to support stringent high capacity storage needs across all the top tier service
providers. Our IC R&D team is looking for an experienced physical design engineer to develop high speed custom analog/mixed signal
products for the storage industry. A qualified applicant would work closely with circuit design engineers to lay out high-speed custom analog
designs and develop mask layouts for customer products, as well as printed circuit board designs. You will join a cross-functional team
responsible for developing leading edge high-speed custom IC products that ultimately achieve high volume production.

Job Responsibilities
- Lay out high speed, high performance analog/mixed-signal custom integrated circuits
- Work directly with a team of engineers to determine floor plan, routing and I/O requirements
- Perform IC design rule and connectivity verification and drive products through mask release flows.
- Contribute to methodology improvements to increase layout and verification efficiency.
- Create reticle layouts, documentation, and PO’s to release products for mask build.
- Complete PCB layouts for test hardware.

Requirements/Qualifications should be:
- Bachelor's degree in Electrical Engineering (or related field)
- 5 years experience in custom analog IC physical design
- Experience with schematic-driven layout, floor planning, chip level routing, design for manufacturing and design rule and connectivity
verification is preferred
- Experience using Cadence Virtuoso XL preferred
- Experience with Cadence Allegro for PCB layout preferred
- Familiarity with both analog and digital layout tools and flows, circuit design concepts and IC manufacturing processes desired
- Strong communication skills
- Understanding of silicon process technologies (CMOS and Bipolar) and device physics would be a plus.
- Proven analytical skills (application of math and physics to solve problems)
- Must be meticulous and demonstrate attention to detail.

Job Description:

• Responsible for analog/hybrid circuit program planning and design implementation, performance optimization, simulation verification and testing related work;
• Responsible for the design of high-performance, ultra-low voltage customized circuits under advanced technology. Targeting specific PPA requirements, able to select transistors, layout
• Effect analysis, unit logic merging and simplification, and starting from the underlying optimization thinking, deliver digital units or modules that can be integrated;
• Responsible for the physical design, analog/digital chip layout design of advanced technology digital ASIC/AI/CPU chips, and the exploration of new technologies such as PPAC optimization, fully customized design, and advanced packaging under advanced technology;
• Write various design documents and standardized materials, and implement the company's development processes, specifications and systems.
• Work tasks include but are not limited to:
• Commonly used analog chip or IP design, transistor-level circuit design and simulation, layout planning and design, timing library characterization extraction, SRAM custom design, etc.
• From gate-level netlist to back-end physical implementation of GDSII, digital/analog chip layout design, including PR, PV, IR Signoff, PPAC optimization, Sta/Spice Signoff, etc.;
• Chip design process development, In-House EDA tool development, chip yield tracking and optimization;

Requirements:

• Majors include but are not limited to mathematics/physics/electronic science and technology/microelectronics/information and communication engineering/computer science and technology/materials science and engineering fresh college students or overseas students within one year of graduation , master's degree or above;
• Excellent academic performance, strong curiosity, learning ability and knowledge transfer ability for new things and knowledge in professional and related fields;
• Understand the IC development process, and have a certain theoretical foundation and necessary capabilities of digital circuits as well as innovation capabilities.

The Senior Design Engineer is responsible for structural analysis and design compliance are met for the project.

A summary of the responsibilities of this position are, and not limited to, as follows:

• Conduct structure analysis
• Provide technical engineering information to ensure compliance with all engineering standards, codes, specifications and design instructions.
• Develop architectural/engineering drawings and ensure specifications/regulations are followed.
• Liaise with architects, engineers and other departments to ensure that the design intentions are met.
• Prepare bills of quantities and cost estimation whenever required
• Ability to identify potential and discrepancies that affect the design and recommend solutions to relevant team/department.
• Adherence to safety practices in the work place.

Value Add of Position

• Design and calculation report for reinforced concrete, steel and geotechnical works using British Standards and Eurocode.

Technical Competencies

• Technical expertise and knowledge in Foundation, Structural and Civil works.

Qualifications and Education Requirements

• Minimum Degree in Civil Engineering from accredited Universities
• Prior 6 years of experience in design and construction (structural). Preferably have done data centre, marine offshore, and mixed-development projects.
• Have completed at least 1 project (data centre, commercial bldg., industrial)
• Well versed in structure analysis and design software such as ORION, SAP2000, SAFE, PROKON, PLAXIS or other similar software
• Well versed in Autocad and BIM software is preferred

Physical Design Engineer

Experience : 5+ Years

Salary Range :SGD 7000-10000

Skills & Technical Expertise Required:

Netlist to GDSII at block level, Subsystem Level and at Full chip.

Worked on multiple tapeouts on Netlist to GDSII

Hierarchical partitioning and budgeting of block-level subsystems.

Implementation of high performance (HP) cores, low power designs

Node experience upto 3nm,7nm, 10nm, 14nm, 28nm.

Timing Signoff in loop through STA and ECO cycle at block and at interface.

Block level floor planning, power planning and IR drop analysis.

Scan chain reordering / Scan Chain repartitioning

CTS expertise and clock tree constraints creation for meeting specifications

MMMC optimization at Block and Sub-System Level

Timing closure with Crosstalk and AOCV / POCV

TCL scripting to fundamentally understand tool usage.

Mandatory EDA Skills

PnR tools such as Synopsys ICC/ICC2 and/or Cadence Innovus

Nano/mirco Influencer needed to do video reviews on our company product and services.

Kindly whatsapp to 88341414 with your social media account and price for a 1 minute video review of our services.

Payment will be done immediately via paynow.

We need about 5 to 10 videos.

www.338aircon.sg

Key Responsibilities:

Simulator Design- develop AI chip Architecture Design- Using GEM5

Performance Optimization- working with AI software engineers to ensure computation algorithms, ensure circuit level

Front end code development

Job requirement

A Master or PhD in Electrical Engineering,Computer engineering related, with focus in chip design, hardware architecture, or AI systems is required

Proficiency in using simulation tools like GEM5, Synopsys, or similar platforms for simulating chip behavior and performance. o Strong understanding of AI algorithms and their hardware implementation, with hands-on experience in optimizing algorithms for AI tasks such as deep learning, machine learning, and neural networks.

//interested candidate may email your resume to [email protected] or apply here

Benefits:

• Central-West
• Comprehensive employee benefits
• Excellent Career Growth and Prospect
• Salary (commensurate with experience): UP to $11,000

Job Scope:

• Collaborate with the front-end design team to complete the chip floorplan, clock architecture, and power plan.
• Lead physical design tasks from the Netlist to GDSII, including Place & Route (P&R), formal verification, static timing analysis, physical verification, power analysis, and design for reliability.
• Oversee tapeout processes for the physical design.
• Research and develop physical design methodologies for advanced process nodes.
• Build and maintain an automated physical design platform.

Job Requirement:

• Bachelor's degree or higher in Electronic Engineering, Microelectronics, Computer Science, or a related field.
• Experience in digital backend design, with hands-on project involvement.

To Apply, kindly click on the "APPLY NOW" button and job details.
We regret that only shortlisted candidates will be notified.
StaffKing Pte Ltd (20C0358) | Trance Teu (R1988522)

As a fast-paced, growing business; this role will be responsible for significantly contributing to projects to deliver excellent service levels to clients and assist in the ongoing development and growth of the business, whilst providing sound technical, design and contract management support.

They should comply with B&W Engineering’s standards, procedures, process and implementations to ensure project requirements and clients’ specifications are fully met. Have the ability to demonstrate extensive experience in a wide range of technical areas and have a sound level of knowledge at Senior Engineer level.

Desirable experience would include the management of Data Centre projects..

Role Responsibilities and Requirements

Degree or higher in appropriate engineering discipline or have sufficient equivalent experience.

IES Electrical and Electronics Engineering Professional Membership desirable.

Singapore Professional Engineer registration or progress towards beneficial.

Proven experience in working within and running projects within a multi-disciplinary team with the successful delivery of the design for critical projects.

Experience in project management and MEP engineering track record with some experience of data centres or other critical engineering facilities.

Knowledge of MS Office applications Outlook, word, excel, PowerPoint etc

Knowledge of Dialux, Trimble (Amtech) Etap /AutoCAD/Revit/ BIM/CAD calculation software.

Ability to use IT based calculation and spreadsheet software.

Significant experience in production of drawings, calculations, schedules & specifications for a range of building types

At least 5 years overall experience with 3 years Data Centre design

Broad design experience across Commercial, High Rise, Hotels & Leisure would be beneficial

Demonstrate a thorough understanding of the design process.

Peripheral experience in architecture, structures, civils, security and permitting.

Excellent understanding of the various code requirements and standards across the APAC region.

Sound knowledge of key Health and Safety issues and legislation including Singapore Design for Safety (Dfs)

Ability to keep clear and accurate records and reports.

Understand and maintain the long-term goals of the business.

Understand the company QA process, maintain and contribute to the same standards across the APAC region

Ability to work autonomously, as part of a wider team.

Ability to embrace an intensively collaborative design environment working for and reporting daily to an expert client.

Ability to proactively step outside the role of conventional design regiment and stages to achieve the client’s deliverables.

Flexible and willing to travel to service international projects and customers.

Possess exceptional clear communication skills and command of spoken/written English.

Have an appreciation of different cultures/races and embrace the same.

Be a motivated, highly dependable

Maintain an appropriate knowledge of industry initiatives.

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

The Opportunity:

• MUST HAVE EPC DESIGN EXPERIENCE in Cleanroom/Industrial Projects
• Permanent Role x2
• Consultancy experience is welcome to apply
• Work hours: Mon to Fri
• $5,000 - $8,000 + AWS + VB

Adecco is partnering with a Global EPC Leader to look for Senior Electrical Engineer (Design in cleanroom/industrial projects)

The Job:

• Prepare electrical tender packages, including specifications and drawings, ensuring alignment with the Design Checklist.
• Progress all design elements in accordance with the established Design Checklist.
• Undertake tendering and estimating of electrical works for projects before they are awarded.
• Compile and review the Operation and Maintenance Dossier for projects.
• Stay updated on industry practices and engineering trends to maintain technical competence.

The Talents:

• Diploma/Degree in Electrical Engineering
• 4 - 8 years of EPC Design Experience, in cleanroom/industrial
• Consultancy experience is welcome to apply

Next Step:

• Interested applicants, please send your resume to [email protected] with your current and expected salary.
• All shortlisted candidates will be contacted.

• Perform design for manufacturability in all new projects.
• Provide PCB manufacturing technical advice to customers on their new projects.
• Perform feasibility studies and reviews for all new data received from customers.
• Adhoc duties as assigned.

Requirements:

• Degree/Diploma in Electrical & Electronics Engineering in Printed Wiring Board manufacturing environment
• Good communication, report writing and presentation skills
• Good analytical skill with ability to work independently
• Ability to communicate with all levels of staffs
• Entry level are welcome to apply as training will be provided.

Electronics MFG Industry

Loyang Area (Tpt pick up at designated area)

Interested applicants, please forward a detailed resume to [email protected]

Tempserv Pte Ltd
License No: 06C3745
Attention: Audris Teo / EA Personnel No: R1102063

Responsibilities

• Report to the department head of Marine Systems, Engineering Design Centre

• Provide specialist technical advice and information to internal and external parties.

• Review and approve detailed design drawings and documents e.g., piping isometrics, piping layout, ducting arrangement, equipment foundation, equipment installation, machinery room layout, bill of materials and various mechanical outfitting drawings, and ensure that the deliverables meet contractual technical specification and Classification Society’s requirements.

• Ensure the detailed design drawings and documents have met the standards set by the department and provide further input for improvement.

• Update 3D software database on a regular basis to ensure correctness and consistency of component’s engineering attribute.

• Manage external consultants in engineering integration and deliverables.

• Coordinate and lead a team of engineers to ensure timely and accurate engineering deliverables.

• Participate in tests and trials, where required.

• Liaise with ship owners and Classification Societies to obtain approval on engineering deliverables.

• Resolve technical issues raised by ship owners and Classification Societies.

Requirements

• A reputable bachelor’s degree with Honours in Mechanical/Marine/Offshore/Naval Architecture Engineering.

• At least 8 years’ experience in engineering project management.

• At least 15 years’ experience in shipyard engineering department or ship design consultant or a combination of both.

• At least 10 years’ experience in 3D modelling software for detailed and production design, Aveva Marine and AutoCAD knowledge is a must

• Strong leadership and interpersonal skills.

• Strong knowledge of marine international design codes, Classification/Statutory Rules and Regulations.

Licence no: 12C6060

Position Overview:

As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.

Requirements:

1. Experience in UVM verification methodology

2. Disciplined, quality-minded, and highly driven for excellence,

3. Excellent team player and good communication skills

4. MSEE/BSEE in Electrical Engineering or Computer Engineering, with 3 years of relevant experience, but are open to fresh graduates with outstanding results

5. Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities

6. Experience in video processing and video analytics is a plus

7. Passionate and strong in general programming is a plus

Responsibilities

1. Develop design requirements of an NPU given system level specifications.
2. Being part of modelling the performance of the NPU module and its data transaction throughput.
3. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU.
4. Understanding the mathematics of different convolution operators including different arithmetic formats (fixed point and floating point)
5. Estimate, measure and optimize PPA (Performance / Power / Area) to meet key objectives and results.
6. Optimizing micro-architecture design for low power and area is required.
7. Work closely with verification engineers to ensure comprehensive testing and debug issues.
8. Support integration into the overall system, conducting design checks, and addressing lint/timing/CDC issues.
9. Collaborate with software teams to assist in compiler and toolchain development and their debugging.
10. Produce clear and concise design documentation.

Requirements

1. 8+ years of digital design with at least 2 to 3 years of SoC design experience is preferred.
2. At least one cycle of NPU design completion experience is required.
3. Hands on in digital design experience is a must.
4. Preferably has lead a team of at least 3 to 4 people in the past at the capacity of a design lead.
5. Experience in microarchitecture design, and RTL coding with Verilog/ System-Verilog.
6. Experience in synthesis, with analysis of power, timing and area.
7. Disciplined, quality-minded, and highly driven for excellence.
8. Excellent team player and good communication skills.
9. MSEE/BSEE in Electrical Engineering or Computer Engineering.
10. Understanding of convolution operator and number system is required.
11. Candidates with relevant experiences would be offered as Senior, taking on higher responsibilities.
12. Experience in UVM verification methodology is a plus.
13. A plus to have SoC design experience.
14. Experience with optimizing micro-architectures for low-power and low-area is a plus.
15. Knowledge in deep learning algorithms such as CNN / Transformer is a plus.
16. Experience with past design experience with NPU / GPU / DSP design is a plus.
17. Experience with ARM or RISC-V processor systems is a plus.
18. Passionate and strong in general programming is a plus.

Our client is a prominent construction firm in Singapore, offering comprehensive and integrated services within the construction sector.

• Coordinate design drawings with consultants to adhere with requirements of the authorities.
• Review and give solutions to technical problems and plan, monitor and report shop drawing production progress.
• Handle technical submissions for materials, construction methods and C&S shop drawings.

Requirements:

• Professional Engineer Registered with the PE Board.
• Degree in Civil Engineering or equivalent.
• At least 3 years of design working experience with main contractors.
• Familiar in British and Singapore Design Standards.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740