Total 2 media management manager job vacancies in Science / R&D / Research category in PAS-Wisma Geylang Serai

Our client is a leading American brand name in the field of consumer electronics, with more than 100 years in existence and more than 2,000 employees globally. We are representing the Singapore Research & Development (R&D) team to hire for their new headcount for the Battery Pack development team.

Senior Engineer, Battery Pack Design

(Electronics – Battery Management System)

Responsibilities

• You will be in a dedicated team of battery pack designers working on development of new technology of battery pack subsystems.
• Your Electronics responsibilities include:
• o Conducting both Electronics Design of Battery Management Systems (BMS) for Lithium-ion battery based products
• o Knowledge in various topologies of BMS solutions in the industry
• o Design of Battery CV/CC Charger Systems
• o Schematic and PCB Layout Design and Tools
• o EMC/EMI Compliance Standards
• o Lithium-ion Battery Standards for electronics.
• o Good with PCB layout practices for EMI/EMC

Requirements

• PhD / Masters / Bachelor’s Degree in Electronics Engineering / Mechatronics Engineering with at least 3-5 years experience in working on Battery Management System (BMS).

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700

Our client is a leading crytographic technology development firm in Singapore, providing design and development services to its partners and customers. We have the following vacancy for:

R&D Senior / ASIC Project Manager (Product Development)

Responsibilities:

• Manage ASIC/FPGA project lifecycle, from requirements, design, technical architecture, implementation, testing, acceptance, training and documentation.
• Maintain close monitoring of project progress and report potential risks and challenges in a timely manner with proposed course of actions.
• Determine and manage resources from start to finish with attention to budgetary limitations.
• Build and maintain relationships with external stakeholders.
• Oversee and/or prepare incoming and outgoing project documentation.
• Technical leadership of project team.
• Perform HDL coding, synthesis, verification, timing closure, tapeout for project.

Requirements

• A Bachelors or Masters Degree in Electrical/Electronics Engineering, Computer Engineering, or relevant fields.
• Minimum 5 years engineering experience in HDL coding, FPGA implementation and ASIC tapeout.
• Minimum 3 years of experience in project management or team lead in product development.
• Able to multi-task and manage various project elements simultaneously.
• Strong team leader and individual contributor.
• Good spoken and written communication skills in English.
• Singaporean only.

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700