Total 2,262 Science / R&D / Research job vacancies in d05 clementi new town hong leong garden pasir panjang

Preventive Maintenance Technician- Troubleshoot, repair and maintain food production equipment- Execute emergency breakdown protocols- Assist in resolving downtime issues- Clean equipment and maintain equipment hygiene requirements for production use, after installation and/or repairs- Collate and coordinate maintenance work, at times need to work with contractor- Comply with cleanliness and safety regulations while setting up and maintaining food manufacturing equipment- Able to perform ad-hoc duty when require- Basic electrical and refrigerator knowledge- Prepare maintenance reports/records in relation to the work assignedRequirements- Minimum 1 Year of experience in maintenance work and engineering field, preferable in food manufacturing- “O” leave / NTC3 or NITEC in Mechanical Enginnering- Able to performance Shift- Willing to learn new skills- Positive work attitude

Interested applicants are invited to apply directly at the NUS Career Portal.

Your application will be processed only if you apply via NUS Career Portal.

We regret that only shortlisted candidates will be notified.

Job Description

The successful candidate will work with Professor Barbaros Oezyilmaz on energy storage and conversion. The main responsibilities include:

• Building upon our ground breaking work in 2D amorphous carbon (Synthesis and properties of free-standing monolayer amorphous carbon (MAC), Nature 577, 199 (2020)), we embark on a bold exploration into the uncharted territory of precisely engineered 3D version of MAC structures. This novel technology, a testament to our team's innovative spirit, holds immense promise for revolutionizing materials science and unlocking a plethora of real-world applications.
• Conducting high impact research in (1) nanoscale engineering of 3D graphene foam and its supercapacitor application under extreme working conditions which battery cannot cover. New applications in extreme environments such as short run memory and pressure gauges in downhole environment, implantable medical devices, cold temperature aerospace applications and IoT devices, etc, and (2) Hybrid nano-composite 3D foam synthesis for high energy battery. New battery development with high energy and power densities for automotive, satellite, train & microgrid applications. Targeting new energy conversion/storage application.

Job Requirements

• Candidates must hold an internationally-recognized PhD degree (or equivalent) preferably in electrochemistry, material science, nanoscience, or equivalent. The candidate should have a proven track record of excellence in experimental research.
• Candidates with experience in energy storage applications (supercapacitors/batteries), characterization and material synthesis are highly encouraged to apply.
• Candidates should have more than 2 years of research fellow level and more than 3 years experience in energy storage projects.

Responsibilities

• The candidate will be required to perform electrical testing, test data analysis & automation across SiC power and RF/mmWave GaN devices.
• The candidate hands-on characterization work will encompass from low voltage I-V/C-V to high voltage breakdown, switching performances for SiC, and DC & high-frequency characterizations for RF/mmWave regime.
• The candidate must have hands-on experienced in handling Keysight 4156C and B1500A/Keithley K4200 Device Analyzer, B1505A High Power Device Analyzer with N1265A UHC Fixture and Keysight 4284A/4285A and E4908A LCR Meter independently on their own.
• It will be a plus if the candidate has knowledge of instrumentation control using LabView and some other software like Python, C++ etc .
• The candidate is required to have at least some basic semi-conductor knowledges of semi-conductor devices like P-N Junction, Diodes, CMOS etc.
• The candidate can be exposed to process and device design/simulation with commercial TCAD tools (e.g. Silvaco Victory Process and Victory Device, Sentaurus Process and Device, etc) as part of the learning development and eventually be working on wide bandgap devices team.

Qualifications:

• Bachelors / Masters' degree in Electrical Engineering, Materials Science, Mechanical Engineering, Chemical Engineering, Chemistry, Physics or equivalent
• At least 5 years of relevant experience preferred. Candidates with relevant study/project experience (Electronics, Microelectronics, Computer Engineering, etc) can be considered.
• Strong communication, industry awareness, and problem-solving skills.
• Highly motivated to succeed, a self-starter who is driven and able to work with others effectively to "get things done".
• Industry experience is a plus

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

ROLE:

IME A*Star is currently working on establishing a hybrid fabrication platform for 150mm & 200mm Silicon Carbide (SiC) power MOSFETs as part of the new SiC R&D program. The main objective of this program is to advance 200mm SiC technologies in various areas, such as epitaxy, device design, process integration for various types of power MOSFETs and power module packaging. The ultimate aim is to drive disruptive innovations in power device research, with a specific focus on >1.7KV power MOSFETs. These innovations will have significant applications in enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. Key aspects for this deputy lead for wide-bandgap device integration role include the development and integration of several modules, such as gate oxidation, implantation, implant activation, layout design verification, lithography, ohmic contact formation etc are essential. We are actively looking for individual with extensive industry experience in device physics and process integration to join our team. The candidate will contribute to process integration, device layout design, design verification, E-test and module process related data analysis, yield enhancement, and device physics.

RESPONSIBILITIES:

• To lead development of SiC power technologies, serving as both front and back-end process integration in collaboration with advanced module development team. And aim
to grow this team to ~10 headcounts in the next 3 years.

• Optimize and customize process flows for individual SiC products

• Identify and resolve process integration issues and related problems

• Develop specific or derivative processes to meet customer needs

• Support new designs by conducting module characterization and developing effective design rules

• Define and implement measures to enhance stability, yield, reliability, and reduce development costs & time

• Plan and implement sustainable corrective actions to address process deviations

• Continuously monitor and utilize expertise in process and equipment capabilities to achieve optimal device performance

• Determine the correct and effective way to deliver processes, functional devices, and other items to multiple customers

• Perform project management tasks and conduct data analysis

REQUIREMENTS:

• MS/PhD Degree in Electrical Engineering or related field

• >3 years industrial experience for MOSFET process integration and device Physics

• Highly proactive, self-motivated, and results-oriented professional with the ability to make efficient contributions to and lead technical discussions

• Extensive expertise in material and process integration

• Comprehensive understanding of semiconductor materials and MOSFET device physics

• Proficient in teaching and knowledge transfer to junior staff members

• Strong communication skills to effectively convey information about process module integration for device fabrication and with customers

• Excellent analytical skills for interpreting process and device data; combined with strong presentation abilities.

ROLE:
A*STAR-IME is spearheading the establishment of the Silicon Carbide (SiC) R&D program. This initiative aims to advance 200mm Silicon Carbide technologies across various areas including epitaxy, device design, process integration & fabrication, and power module packaging. The primary goal is to catalyze disruptive innovations in power device research, focusing particularly on >1.2KV power MOSFETs. These innovations are targeted towards enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. One of the critical challenges in SiC MOSFETs fabrication lies in gate stack formation and interface characterization. For this purpose, a skillful lead with hands-on experience, proactive motivation, quick learning abilities, and strong interpersonal skills is being sought to contribute to gate stack design and interface characterization. This candidate will be also groomed to lead a front-end team of ~5 headcounts for wide-bandgap integration in the next 3 years.

RESPONSIBILITIES:

• Candidate will perform detailed design of experiments for gate stacks optimizations; aimed to develop highly reliable SiC MOS gate module technology.

• To conduct hands-on work for MOSCAP process & interface characterizations, including MOS CV & variable frequency CV analysis, DLTS characterization, and more.

• Responsible for analyzing electrical test data, benchmarking with publicly available results, and apply established physics-based theories of interface trap behavior in 4H-SiC

• Collaborate with the project members to ensure gate oxide goals meet performances, quality, and reliability standards aligned to customer expectations

• Ensure that design of experiments stays on schedule and mitigate overall risks

• Engage with diverse teams, including process integration, characterization, and advanced process modules, to analyze & debug device/process-related challenges

• Working closely with internal and external customers to understand their demands and mitigate their issues

REQUIREMENTS:

• PhD Degree in Electrical Engineering or related field

• Up to 3 years of relevant industry experience

• MOSCAP layout design with good understanding of the gate interface, gate dielectric materials at the atomic level and ALD of high-k dielectric materials will be required

• Solid understanding of MOSFET and HEMT device physics, preferably with SiC and GaN materials

ROLE:

A*Star-IME is currently working on establishing a hybrid fabrication platform for 150mm and 200mm Silicon Carbide (SiC) power MOSFETs as a new pillar on Singapore"s Future of Microlectronics in wide-bandgap. The main objective of this SiC RnD program is to advance 200mm SiC technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The ultimate aim is to drive disruptive innovations in power device research, specifically focusing on >1.7KV power MOSFETs. These innovations will have significant applications in enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. Key aspects for this role to be successful include the development and integration of several process modules, such as gate oxidation, implantation, implant activation, layout design verification, lithography, and ohmic contact formation. We are actively looking for individuals with extensive industry experience in device physics and process integration to join our team. The candidate will contribute to process integration, E-test and module process related data analysis, yield enhancement, and device physics.

RESPONSIBILITIES:

• Lead develop process technology for SiC power MOSFETs and ensure it meets the requirements for prototyping manufacturing

• Collaborate with advanced process module development team to establish a process flow for fabricating specific MOS devices

• Responsible to develop and improve test structures that enable fast and rigorous characterization of process

• Accountable to improve device performance and yield through the design, execution, and analysis of experiments for each specific device and product

• Work with cross-functional teams to minimize defects and address technical and yield concerns

• Drive CIP (Continuous improvement plans) to deliver integrated process modules and specific device per project goals

• Make decisions regarding the delivery of process, active and passive devices to multiple customers

REQUIREMENTS:

• MS/PhD Degree in Electrical Engineering or related field

• >3 years industrial experience for MOSFET process integration and device physics

• Proactive, self-motivated, and results-oriented professional with the ability to make efficient contributions to and lead technical discussions

• Extensive expertise in material and process integration

• Comprehensive understanding of semiconductor materials and the physics of MOSFET devices

• Strong communication skills to effectively communicate information about module integration for device fabrication and with customers

• Excellent analytical skills for interpreting process and device data, coupled with strong presentation abilities

Introduction

ETH Zurich is one of the leading universities of the world with a strong focus on science and engineering. In 2010 it established the Singapore-ETH Centre (SEC) in collaboration with the National Research Foundation (NRF) to do interdisciplinary research on pressing problems.

The centre currently runs several research programmes with the Future Cities Laboratory (FCL) as one of the programmes. It is home to a community of over 100 PhD, postdoctoral and Professorial researchers working on diverse themes related to sustainable cities and resilient infrastructure systems. In the course of their work, researchers actively collaborate with universities, research institutes, industry, and government agencies with the aim of offering practical solutions.

Project background

The project “Comparative Ecology of Cities” is centred on the proposition that urban pattern-process-function relationships provide valuable knowledge to advance the science of urban planning. The project builds upon emerging theoretical and empirical evidence that patterns of human settlement systems (urban patterns) shape social and ecological processes (urban processes), and such processes in turn, dictate the key demands of urban living such as social relations, mobility, economic exchanges, biophysical environment, ecological conditions, etc. (urban functions). The project will investigate such pattern-process-function relationships across a number of cities to develop generalizations that can be used as urban planning and design principles to guide sustainable urban development, which will be tested in design studios. The main methods employed are remote sensing, spatial pattern analyses, data mining from global datasets, applications of mechanistic and empirical models, and statistical modelling for 5 key domains: urban climate, hydrology, biodiversity, public health and social-economic exchanges.

Job Description

• To coordinate the synthesis phase of the project by integrating information from the different domains of the study, which are in progress to identify trade-offs and synergies, and develop the guidelines and decision making tools for application of the results in land use planning and management.
• To work with team members to publish scientific papers related to the synthesis work.
• To assist in the completion of project report and presentation.
• To assist in project administration.

Requirements

• PhD in relevant disciplines, such as, urban climatology, urban system science, urban hydrology, and urban planning.
• Minimum 2 years of relevant working experience.
• Experience in interdisciplinary project work post PhD and a track record of interdisciplinary research will be evaluated positively.
• A track record in publications commensurate with distance from PhD.

We look forward to receiving your online application with the following documents:

A dossier containing the following pdf documents:

• Your CV, including the publication list
• A motivation letter
• Minimum of 2 referee letters
• 2 samples of publications

Applications via email or postal services will not be considered.

Further information about Future City Lab Global can be found on our website: https://fclg-ep.ethz.ch/

For further information, please contact

Prof Dr Tan Puay Yok ([email protected])

“The Singapore-ETH-Centre is an equal opportunity and family-friendly employer. All candidates will be evaluated on their merits and qualifications, without regards to gender, race, age or religion.”

At NUS Singapore, our people are the driving force behind our success. We pride ourselves on fostering a vibrant and inclusive community of talented individuals from diverse backgrounds.When you join NUS, you become part of a community of passionate individuals who are dedicated to driving innovation and change in education, research, and service. Our culture of inclusivity and entrepreneurship means that you’ll have the freedom to explore your ideas and make a meaningful impact. Your career at NUS is more than just a job - it’s a transformative experience that will shape your personal and professional growth.Explore the link provided to learn additional details about the available job opportunity:

https://career44.sapsf.com/sfcareer/jobreqcareer?jobId=24432&company=nationalunP2

ROLE:

A*Star-IME is currently working on establishing a hybrid fabrication platform for 150mm and 200mm Silicon Carbide (SiC) power MOSFETs as a new pillar on Singapore"s Future of Microlectronics in wide-bandgap. The main objective of this SiC RnD program is to advance 200mm SiC technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The ultimate aim is to drive disruptive innovations in power device research, specifically focusing on >1.7KV power MOSFETs. These innovations will have significant applications in enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. Key aspects for this role to be successful include the development and integration of several process modules, such as gate oxidation, implantation, implant activation, layout design verification, lithography, and ohmic contact formation. We are actively looking for individuals with extensive industry experience in device physics and process integration to join our team. The candidate will contribute to process integration, E-test and module process related data analysis, yield enhancement, and device physics.

RESPONSIBILITIES:

• Lead develop process technology for SiC power MOSFETs and ensure it meets the requirements for prototyping manufacturing

• Collaborate with advanced process module development team to establish a process flow for fabricating specific MOS devices

• Responsible to develop and improve test structures that enable fast and rigorous characterization of process

• Accountable to improve device performance and yield through the design, execution, and analysis of experiments for each specific device and product

• Work with cross-functional teams to minimize defects and address technical and yield concerns

• Drive CIP (Continuous improvement plans) to deliver integrated process modules and specific device per project goals

• Make decisions regarding the delivery of process, active and passive devices to multiple customers

REQUIREMENTS:

• MS/PhD Degree in Electrical Engineering or related field

• >3 years industrial experience for MOSFET process integration and device physics

• Proactive, self-motivated, and results-oriented professional with the ability to make efficient contributions to and lead technical discussions

• Extensive expertise in material and process integration

• Comprehensive understanding of semiconductor materials and the physics of MOSFET devices

• Strong communication skills to effectively communicate information about module integration for device fabrication and with customers

• Excellent analytical skills for interpreting process and device data, coupled with strong presentation abilities

ROLE:
A*STAR-IME is leading the way in establishing industry first 200mm open Silicon Carbide (SiC) R&D program. The program specific focus is on advancing 200mm SiC technologies in key areas such as epitaxy, gate stack, ion implantation, and dry etching, and integrating these modules to fabricate high-performance power devices. Our objective is to drive innovation in power device research, particularly in power MOSFETs rated above 1.2KV. Developing key innovative process is crucial for creating high-performance devices that will contribute to advancements in automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. This role involve growing leadership into ion implantation processes for p-body, channel, guard ring, source contact, and other components. We are currently seeking such individual with ~5 years of experience in ion implantation. The chosen candidate will be responsible for independently supervising ion implantation processes, conducting ion implant simulations, possessing knowledge of crystallography and ion interaction with atoms, having strong understanding of implanters and related thermal processing physics, beam optics, dosimetry systems, and vacuum technology. The ideal candidate should also be willing to collaborate with various departments, the technology development group, and customers. Furthermore, the candidate will contribute to the wide-bandgap team by sharing the ion implantation expertise on compound semiconductor materials and collaborate with other departments working with Si-based technology. The candidate will also be groomed to lead this diffusion process module group of ~6 headcounts into the future.

RESPONSIBILITIES:

• Diagnose malfunctions and using test equipment & software to test faulty tool; applying knowledge of the functional operation of the ion implant equipment

• Support on-site ion implanters in creating, running & characterizing recipes for recipe validation and develop process to achieve the desired dopant profile with excellent
damage recovery.

• Collaborate with vendors to optimize equipment performance and reduce tool downtime

• Analyze data related to implant-related defects formation with quantification and defects minimizations strategy

• Examine work-orders and communicates with equipment operators to resolve equipment problems & determine mechanical and human errors contributed to the issues

• Perform scheduled preventive maintenance tasks with tool operators, especially in checking, cleaning, repairing, detecting and preventing problems

• Responsible for designing experiments for ion implantation at various dose, energy, tilt, and twist levels

REQUIREMENTS:

• Ms/PhD Degree in Electrical Engineering or related field

• >3-5 years industrial experience for high power device design and modeling

• Extensive proficiency in medium to high energy/current ion implantation processes, including a comprehensive knowledge of implant equipment, equipment parts, and
troubleshooting techniques to minimize equipment downtime

• Good understanding of wide bandgap semiconductor materials and their corresponding dopant species

• Expertise in ion channeling, ion bombardment, and their impact on the implant species profile

• In-depth comprehension of defect formation and annihilation processes in the implanted region of semiconductors

• Familiarity with essential device properties resulting from ion implantation

• Adept at mentoring and transferring knowledge to junior staff members

ROLE:
A*STAR-IME is leading the way in establishing industry first 200mm open Silicon Carbide (SiC) R&D program. The program specific focus is on advancing 200mm SiC technologies in key areas such as epitaxy, gate stack, ion implantation, and dry etching, and integrating these modules to fabricate high-performance power devices. Our objective is to drive innovation in power device research, particularly in power MOSFETs rated above 1.2KV. Developing key innovative process is crucial for creating high-performance devices that will contribute to advancements in automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. This role involve growing leadership into ion implantation processes for p-body, channel, guard ring, source contact, and other components. We are currently seeking such individual with ~5 years of experience in ion implantation. The chosen candidate will be responsible for independently supervising ion implantation processes, conducting ion implant simulations, possessing knowledge of crystallography and ion interaction with atoms, having strong understanding of implanters and related thermal processing physics, beam optics, dosimetry systems, and vacuum technology. The ideal candidate should also be willing to collaborate with various departments, the technology development group, and customers. Furthermore, the candidate will contribute to the wide-bandgap team by sharing the ion implantation expertise on compound semiconductor materials and collaborate with other departments working with Si-based technology. The candidate will also be groomed to lead this diffusion process module group of ~6 headcounts into the future.

RESPONSIBILITIES:

• Diagnose malfunctions and using test equipment & software to test faulty tool; applying knowledge of the functional operation of the ion implant equipment

• Support on-site ion implanters in creating, running & characterizing recipes for recipe validation and develop process to achieve the desired dopant profile with excellent
damage recovery.

• Collaborate with vendors to optimize equipment performance and reduce tool downtime

• Analyze data related to implant-related defects formation with quantification and defects minimizations strategy

• Examine work-orders and communicates with equipment operators to resolve equipment problems & determine mechanical and human errors contributed to the issues

• Perform scheduled preventive maintenance tasks with tool operators, especially in checking, cleaning, repairing, detecting and preventing problems

• Responsible for designing experiments for ion implantation at various dose, energy, tilt, and twist levels

REQUIREMENTS:

• Ms/PhD Degree in Electrical Engineering or related field

• >3-5 years industrial experience for high power device design and modeling

• Extensive proficiency in medium to high energy/current ion implantation processes, including a comprehensive knowledge of implant equipment, equipment parts, and
troubleshooting techniques to minimize equipment downtime

• Good understanding of wide bandgap semiconductor materials and their corresponding dopant species

• Expertise in ion channeling, ion bombardment, and their impact on the implant species profile

• In-depth comprehension of defect formation and annihilation processes in the implanted region of semiconductors

• Familiarity with essential device properties resulting from ion implantation

• Adept at mentoring and transferring knowledge to junior staff members

ROLE:

IME A*Star is currently working on establishing a hybrid fabrication platform for 150mm & 200mm Silicon Carbide (SiC) power MOSFETs as part of the new SiC R&D program. The main objective of this program is to advance 200mm SiC technologies in various areas, such as epitaxy, device design, process integration for various types of power MOSFETs and power module packaging. The ultimate aim is to drive disruptive innovations in power device research, with a specific focus on >1.7KV power MOSFETs. These innovations will have significant applications in enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. Key aspects for this deputy lead for wide-bandgap device integration role include the development and integration of several modules, such as gate oxidation, implantation, implant activation, layout design verification, lithography, ohmic contact formation etc are essential. We are actively looking for individual with extensive industry experience in device physics and process integration to join our team. The candidate will contribute to process integration, device layout design, design verification, E-test and module process related data analysis, yield enhancement, and device physics.

RESPONSIBILITIES:

• To lead development of SiC power technologies, serving as both front and back-end process integration in collaboration with advanced module development team. And aim
to grow this team to ~10 headcounts in the next 3 years.

• Optimize and customize process flows for individual SiC products

• Identify and resolve process integration issues and related problems

• Develop specific or derivative processes to meet customer needs

• Support new designs by conducting module characterization and developing effective design rules

• Define and implement measures to enhance stability, yield, reliability, and reduce development costs & time

• Plan and implement sustainable corrective actions to address process deviations

• Continuously monitor and utilize expertise in process and equipment capabilities to achieve optimal device performance

• Determine the correct and effective way to deliver processes, functional devices, and other items to multiple customers

• Perform project management tasks and conduct data analysis

REQUIREMENTS:

• MS/PhD Degree in Electrical Engineering or related field

• >3 years industrial experience for MOSFET process integration and device Physics

• Highly proactive, self-motivated, and results-oriented professional with the ability to make efficient contributions to and lead technical discussions

• Extensive expertise in material and process integration

• Comprehensive understanding of semiconductor materials and MOSFET device physics

• Proficient in teaching and knowledge transfer to junior staff members

• Strong communication skills to effectively convey information about process module integration for device fabrication and with customers

• Excellent analytical skills for interpreting process and device data; combined with strong presentation abilities.

ROLE:
A*STAR-IME is spearheading the establishment of the Silicon Carbide (SiC) R&D program. This initiative aims to advance 200mm Silicon Carbide technologies across various areas including epitaxy, device design, process integration & fabrication, and power module packaging. The primary goal is to catalyze disruptive innovations in power device research, focusing particularly on >1.2KV power MOSFETs. These innovations are targeted towards enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. One of the critical challenges in SiC MOSFETs fabrication lies in gate stack formation and interface characterization. For this purpose, a skillful lead with hands-on experience, proactive motivation, quick learning abilities, and strong interpersonal skills is being sought to contribute to gate stack design and interface characterization. This candidate will be also groomed to lead a front-end team of ~5 headcounts for wide-bandgap integration in the next 3 years.

RESPONSIBILITIES:

• Candidate will perform detailed design of experiments for gate stacks optimizations; aimed to develop highly reliable SiC MOS gate module technology.

• To conduct hands-on work for MOSCAP process & interface characterizations, including MOS CV & variable frequency CV analysis, DLTS characterization, and more.

• Responsible for analyzing electrical test data, benchmarking with publicly available results, and apply established physics-based theories of interface trap behavior in 4H-SiC

• Collaborate with the project members to ensure gate oxide goals meet performances, quality, and reliability standards aligned to customer expectations

• Ensure that design of experiments stays on schedule and mitigate overall risks

• Engage with diverse teams, including process integration, characterization, and advanced process modules, to analyze & debug device/process-related challenges

• Working closely with internal and external customers to understand their demands and mitigate their issues

REQUIREMENTS:

• PhD Degree in Electrical Engineering or related field

• Up to 3 years of relevant industry experience

• MOSCAP layout design with good understanding of the gate interface, gate dielectric materials at the atomic level and ALD of high-k dielectric materials will be required

• Solid understanding of MOSFET and HEMT device physics, preferably with SiC and GaN materials

Responsibilities

• The candidate will be required to perform electrical testing, test data analysis & automation across SiC power and RF/mmWave GaN devices.
• The candidate hands-on characterization work will encompass from low voltage I-V/C-V to high voltage breakdown, switching performances for SiC, and DC & high-frequency characterizations for RF/mmWave regime.
• The candidate must have hands-on experienced in handling Keysight 4156C and B1500A/Keithley K4200 Device Analyzer, B1505A High Power Device Analyzer with N1265A UHC Fixture and Keysight 4284A/4285A and E4908A LCR Meter independently on their own.
• It will be a plus if the candidate has knowledge of instrumentation control using LabView and some other software like Python, C++ etc .
• The candidate is required to have at least some basic semi-conductor knowledges of semi-conductor devices like P-N Junction, Diodes, CMOS etc.
• The candidate can be exposed to process and device design/simulation with commercial TCAD tools (e.g. Silvaco Victory Process and Victory Device, Sentaurus Process and Device, etc) as part of the learning development and eventually be working on wide bandgap devices team.

Qualifications:

• Bachelors / Masters' degree in Electrical Engineering, Materials Science, Mechanical Engineering, Chemical Engineering, Chemistry, Physics or equivalent
• At least 5 years of relevant experience preferred. Candidates with relevant study/project experience (Electronics, Microelectronics, Computer Engineering, etc) can be considered.
• Strong communication, industry awareness, and problem-solving skills.
• Highly motivated to succeed, a self-starter who is driven and able to work with others effectively to "get things done".
• Industry experience is a plus

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

As part of IME’s Photonics & Sensors (P&S) Department, the candidate will join Institute’s effort to address current limitations in silicon photonics, and to explore new pathways to nanophotonic and quantum system integration. Candidate will have access to cutting-edge research facilities, as well as leading semiconductor foundry nanofabrication platforms. Candidate will work with an excellent multidisciplinary group involving experts in optics, photonics, microelectronics, MEMS, semiconductor process and fab operations, with either deep academic or industrial backgrounds. Candidate with real interest and passion in scientific research is very welcomed.

Responsibilities:

• Closely work in a team to study and develop next-generation integrated photonic & quantum devices. Novel light source will be one of the key directions.
• The research activity will cover all necessary parts across theoretical and experimental studies of this field, with focus towards device design and experimental investigations.

Qualifications:

• PhD in Electrical Engineering, (Applied) Physics, Material Science or equivalent. Fresh or recent PhD graduates are welcome to apply.
• Coursework foundation in at least one of the following areas: solid-state physics, nonlinear/quantum optics, semiconductor devices, optoelectronic devices, integrated photonics, or other related areas.
• Strong experimental skillsets: extensive hands-on experiences in optical setup construction and semiconductor & optoelectronic device characterization; familiar with free-space optics, opto-mechanics, fiber-based components, and common measurement instruments.
• Have experience in device simulation (electromagnetic, electrical, or thermal).
• Have experience in photonics or CMOS design and tapeout is a bonus.
• Experience in areas listed below is preferred: semiconductor light source study, optical nonlinear material/device study, carrier lifetime (TCSPC) or high-speed optoelectronic device measurement, Raman spectroscopy, fluorescence imaging, ultrafast optics, etc.

As part of IME’s Photonics & Sensors Department, the candidate will take the lead for the development of advanced photonics integration. This could include but not limited as photonic heterogeneous integration by bring various best-in-class materials into silicon wafer, electro-photonics integration, etc. You will work closely with an excellent multidisciplinary team involving photonics, semiconductor process, and fab operation.

Responsibilities:

• Development of various photonics integration capabilities with 8-inch and 12-inch facilities, with emphasis on photonics heterogenous integration.
• Design and fabricate various advanced photonics components and integrated circuits aiming for next-generation photonic applications.
• Design of Experiments (DOE) for both design and process margin checking and control.
• Process metrology data taking, device / circuit performance data taking.
• Data analysis and documentation
• Preparation of technical presentations and papers for internal meetings, as well as conferences and journals.
• Collaborate with project team to ensure quality and on-time delivery for various projects.
• Performs other duties as assigned.

Qualifications:

• PhD in Integrated Photonics, Opto-electronics, Materials Science, Physics or equivalent
• Strong hands-on experience in photonics integration.
• Experience in one or more topics listed below is strongly preferred: confocal microscopy, Raman spectroscopy, semiconductor carrier lifetime measurement, optical nonlinear device characterization, ultrafast optics, or other relevant fields.
• Hands-on experience in photonic simulation using various electrical / photonics design software.
• Strong communication, industry awareness, and problem-solving skills.
• Strong self-motivation and interest in the next-generation photonics technology development.
• Industry experience is a plus.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The (Senior) Research Engineer must be willing to work on multi-disciplinary research projects at the intersection of computational neuroscience and AI. This includes designing human behavioral experiments and collecting human responses, alongside developing computational models of cognitive functions (visual attention, eye movements, visual perception, memory, context reasoning, and multi-agent decision making).

Job Requirements:

• Bachelor's degree (or above) in Computer Science, background in AI.
• At least 5 years of experience
• Strong analytical and critical thinking skills, good team player with good communication and interpersonal skills
• Proficient in coding any of the following models, algorithms, hardwares, tools (at least 5 from the list below):

Multi-agent Reinforcement learning, deep reinforcement learning, Convolution Neural Nets, Hebbian learning, vision transformer, continual learning, scene graphs, reward, inverse reinforcement learning, backpropogation, shape bias, knowledge distillation, self-supervised learning, augmented memory, variational auto-encoder, associative memory, foveation, Blender, cause-effect, neuro-symbolic, recurrent neural networks, LSTM, Mturk, Prolific, Python, Matlab, Pytorch, Tensorflow, NVIDIA, cross-entropy, maximum likelihood, metric learning, representation learning, open-set, long-tailed, object detection, object classification, mixup, style transfer, data augmentation, curriculum learning, generalization, out-of-distribution, domain shifts, random forest, decision tree, Monte Carlo tree search, hard and soft attention, meta-learning, depth estimation, video tracking, predictive coding

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The Institute of Microelectronics (IME) is a research institute of the Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME"s mission is to create innovative technologies and add value to Singapore"s semiconductor industry by enabling enterprises to be technologically competitive through R&D and cultivating a technology talent pool to inject new knowledge to the industry.

The Research, Talent, and Planning (RTP) office in IME is looking for a resourceful self-starter to plan and manage the events portfolio in IME. Reporting to the Planning Office within IME, the candidate is entrusted with the coordination and execution of internal and external events, especially outreach activities, technical workshops, and seminars. This role offers the opportunity to collaborate across various R&D departments within IME and the opportunity to engage with external stakeholders throughout the event planning and implementation phases.

Job Responsibilities:

- Take the lead for planning, organizing, and overseeing IME"s internal and external events, ensuring seamless execution and adherence to event objectives.

- Liaise with internal and external stakeholders to manage all event operations (eDMs, vendors, budget, venue, invitations etc.)

- Evaluate event’s success and prepare post event report.

- Other duties as assigned.

Job Requirements:

- Diploma or bachelor’s degree in relevant fields such as mass communications, hospitality/events management.

- Knowledge and experience in digital content design and creation using Canva, photoshop and creation/others. Experience as an emcee is an advantage.

- More than 2 years of experience in relevant fields.

- Familiarity with project management, microelectronics or semiconductor industry is an advantage.

- Proactive, creative, responsive, detail-oriented, with the ability to work quickly across shifting priorities and tight timelines with the goal of delivering best-in-class service, quality, and accuracy.

- High degree of confidence, adaptability, and professionalism in interacting and communicating with partners, government agencies, high-profile leaders in the industry and education institutes.

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master's in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

Prof Augustine Jr George James Group: Assistant Research Officer

We are seeking a highly motivated and dedicated individual to join our research team. The successful candidate will serve as a technician in brain research laboratory, with special emphasis on maintaining our mouse colony.

Responsibilities:

• Responsible for animal husbandry and maintenance of various transgenic mouse models
• Prepare animal protocols such as drafting of IACUC amendment and SOPs for institutional approval
• To perform molecular biology techniques, such as genotyping (DNA work), PCR and gel electrophoresis
• Assist in daily lab activities such as preparation of buffers and administrative duties
• Maintain accurate records of mice genotype results, experimental data, or related paperwork

Requirements:

• BS degree in Biology, Biotechnology, or related field
• Previous experience as lab technician desirable

Salary and benefits are commensurable to the educational qualifications and working experience of the candidate. Benefits include annual leave, medical and flexi-benefits, etc.

Interested individuals should send their applications (including a cover letter, curriculum vitae and two recommendation letters) to:

Prof AUGUSTINE Jr George James

Temasek Senior Investigator

Temasek Life Sciences Laboratory Limited

Email: [email protected]

(Please note that only shortlisted candidates will be notified)

The role of R&D Associate is to support the development of new products and technologies bases on relevant consumer insights for the global personal care liquids vertical.

The R&D Associate will work on Innovation projects for the personal care R&D team which is focused on designing and executing the innovation pipeline for Dettol and putting the consumer at heart in building and creating our ideas and formulas.

Responsibilities:

· Work with matrix team to identify relevant consumer insights and ensure they are at the forefront to develop formulas, new products, and technologies in support of brand initiatives.

· Lead key projects through the feasibility process as R&D representative.

· Work cross-functionally and be R&D lead on project teams to achieve key milestones and objectives.

· Collaborate with Marketing, Packaging, and Consumer Insights team to develop, define and design studies to help progress projects to build out our portfolio.

· Lead and advance multiple projects through front-end product development.

· Foster strategic growth in innovation processes and systems across team and organization.

· Develop consumer focused technical product strategies to support product development and short-term and long-term innovation.

· Foster personal development growth with continuous coaching and feedback on career development as per the Corporate Core Values.

· Deliver projects to launch on time, within the budget and to the appropriate performance standards,

· Responsible to ensure all required technical work is performed on time and according to the required standards, performing the required lab work and providing guidance to assistants /technicians if applicable.

· Ensure the quality & safety standards are met within the lab. Work on ways to enhance the lab capabilities.

· Builds detailed consumer & technical knowledge of respective areas of the product portfolio/ technologies and leverage this within day-to-day activities.

· Work with outside suppliers/teams to help deliver pipeline needs.

Requirements:

· Educated to Masters/Degree level (Chemistry, pharmacy, chemical engineering or other relevant science)

· Minimum 3 years of R&D experience with a proven track record of delivery.

· Experience of working in cosmetic formulation environment is desirable.

· Strong technical background in personal care formulation and processing.

· Strong interpersonal skills and willingness to work in a cross functional including marketing, supply, procurement, regulatory, clinical and legal team.

A qualified candidate will be self-motivated with strong technical and analytical skills as well as possess practical and hands-on approach to engineering control in the areas of metrology management

Responsibilities:

· Recipe creation and optimisation for new R&D applications requirement.
- Preventive and corrective maintenance planning cum execution and vendor management.

· To take charge of new tools technical assessment and tender creation (equipment cum process application startup) and service contract tender set-up

· Drive continuous improvement projects (CIP) to achieve better measurement repeatability (MSA, GR&R, SPC etc).

· To set-up appropriate process and product control plan and out of control action plans (OCAP)

· Provide technical training to related staff on best-known practices in terms of application metrology recipe creation.

Requirement:

· Diploma/Bachelor degree in Electrical and Electronics, Material, Physics or Chemical engineering

· Minimum 3~5 years of hands-on semiconductor experience (preferably in metrology application and equipment maintenance)

· Possess computer soft ware skills (i.e. JMP, Minitab, SQL, Visual basic, etc)

· Knowledge in problem solving and quality control skills (i.e. LEAN 6sigma, RCA, DOE, etc)

A qualified candidate will be self-motivated with strong technical and analytical skills as well as possess practical and hands-on approach to engineering control in the areas of metrology management

Responsibilities:

· Recipe creation and optimisation for new R&D applications requirement.
- Preventive and corrective maintenance planning cum execution and vendor management.

· To take charge of new tools technical assessment and tender creation (equipment cum process application startup) and service contract tender set-up

· Drive continuous improvement projects (CIP) to achieve better measurement repeatability (MSA, GR&R, SPC etc).

· To set-up appropriate process and product control plan and out of control action plans (OCAP)

· Provide technical training to related staff on best-known practices in terms of application metrology recipe creation.

Requirement:

· Diploma/Bachelor degree in Electrical and Electronics, Material, Physics or Chemical engineering

· Minimum 3~5 years of hands-on semiconductor experience (preferably in metrology application and equipment maintenance)

· Possess computer soft ware skills (i.e. JMP, Minitab, SQL, Visual basic, etc)

· Knowledge in problem solving and quality control skills (i.e. LEAN 6sigma, RCA, DOE, etc)

The Institute of Microelectronics (IME) is a research institute of the Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME"s mission is to create innovative technologies and add value to Singapore"s semiconductor industry by enabling enterprises to be technologically competitive through R&D and cultivating a technology talent pool to inject new knowledge to the industry.

The Research, Talent, and Planning (RTP) office in IME is looking for a resourceful self-starter to plan and manage the events portfolio in IME. Reporting to the Planning Office within IME, the candidate is entrusted with the coordination and execution of internal and external events, especially outreach activities, technical workshops, and seminars. This role offers the opportunity to collaborate across various R&D departments within IME and the opportunity to engage with external stakeholders throughout the event planning and implementation phases.

Job Responsibilities:

- Take the lead for planning, organizing, and overseeing IME"s internal and external events, ensuring seamless execution and adherence to event objectives.

- Liaise with internal and external stakeholders to manage all event operations (eDMs, vendors, budget, venue, invitations etc.)

- Evaluate event’s success and prepare post event report.

- Other duties as assigned.

Job Requirements:

- Diploma or bachelor’s degree in relevant fields such as mass communications, hospitality/events management.

- Knowledge and experience in digital content design and creation using Canva, photoshop and creation/others. Experience as an emcee is an advantage.

- More than 2 years of experience in relevant fields.

- Familiarity with project management, microelectronics or semiconductor industry is an advantage.

- Proactive, creative, responsive, detail-oriented, with the ability to work quickly across shifting priorities and tight timelines with the goal of delivering best-in-class service, quality, and accuracy.

- High degree of confidence, adaptability, and professionalism in interacting and communicating with partners, government agencies, high-profile leaders in the industry and education institutes.

The (Senior) Research Engineer must be willing to work on multi-disciplinary research projects at the intersection of computational neuroscience and AI. This includes designing human behavioral experiments and collecting human responses, alongside developing computational models of cognitive functions (visual attention, eye movements, visual perception, memory, context reasoning, and multi-agent decision making).

Job Requirements:

• Bachelor's degree (or above) in Computer Science, background in AI.
• At least 2 years of experience
• Strong analytical and critical thinking skills, good team player with good communication and interpersonal skills
• Proficient in coding any of the following models, algorithms, hardwares, tools (at least 5 from the list below):

Multi-agent Reinforcement learning, deep reinforcement learning, Convolution Neural Nets, Hebbian learning, vision transformer, continual learning, scene graphs, reward, inverse reinforcement learning, backpropogation, shape bias, knowledge distillation, self-supervised learning, augmented memory, variational auto-encoder, associative memory, foveation, Blender, cause-effect, neuro-symbolic, recurrent neural networks, LSTM, Mturk, Prolific, Python, Matlab, Pytorch, Tensorflow, NVIDIA, cross-entropy, maximum likelihood, metric learning, representation learning, open-set, long-tailed, object detection, object classification, mixup, style transfer, data augmentation, curriculum learning, generalization, out-of-distribution, domain shifts, random forest, decision tree, Monte Carlo tree search, hard and soft attention, meta-learning, depth estimation, video tracking, predictive coding

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.