Total 169 front office assistant job vacancies in Singapore

NQO (National Quantum Office) is a national platform set up to drive National RIE quantum strategy. I&E in NQO is a key function driving the Quantum Innovation and Enterprise development agenda for Singapore.

NQO is hosted in A*STAR and the Office works in partnership with various stakeholders, such as NRF, MCI agencies, MTI / Economic agencies, A*STAR research institutions (RIs), Institutes of Higher Learning (IHLs), CQT etc. as well as companies to achieve value capture for Singapore in the form of new products and services, increased quantum company presence and activities, creation of valuable IP/TD and good jobs.

Responsibilities

The responsibilities include but are not limited to the following:

• Assist the Chief Innovation and Enterprise (I&E) Officer in developing and implementing a go-to-industry strategy for Quantum.
• Support various Quantum initiatives in achieving their I&E outcomes.
• Engage with relevant companies to understand their businesses, products, service offerings, and technology needs.
• Engage with local research performers in Singapore to understand their capabilities and relevance to companies.
• Facilitate industry partnerships with local research performers at an ecosystem-level through mechanisms such as research collaboration agreements.

Requirements

• >10 years of working experience in product development and/or commercialization in a deep-tech field related to Quantum (such as semiconductors, computing, AI).
• Keen interest in cutting edge science & technology
• Effective and thoughtful communicator
• Strong problem solving and analytical skills
• Strong organizational and administrative skills
• Resourceful and able to work with minimal supervision, independently and in a team
• Willing, adaptable, and flexible to take on required/necessary tasks beyond the job description
• A self-starter and problem solver who can proactively address any situation
• Able to identify and contextualize stakeholder issues, and manage them appropriately
• Manage key account relationships

The JAGC program is a collaboration between MiRXES and GIS (together with other public research institutions) to build a new high-throughput NGS platform to empower population-scale genome sequencing, high-resolution single cell genomics, large-scale epigenomics, as well as clinical genomics. The collaboration involves multiple public research institutions, including the Genome Institute of Singapore, Bioinformatics Institute, and Diagnostics Development Hub of A*STAR, as well as National Cancer Centre of Singapore and the Lee Kong Chian School of Medicine at NTU.

We are searching for a talented and well-organised Programme Manager (PM) to join us at the Genome Institute of Singapore to play a leadership role in executing and managing this public-private partnership program. The PM will work with the Principal Investigators to initiate and coordinate key processes of the program, manage key stakeholders (internal and external, across hospitals, research institutions and industry), as well as lead administrative tasks (including facilitating meetings, managing agreements, generating reports and budgeting).

He/she will advise on strategic interactions with industry partners and academic collaborators. The ideal PM will be able to provide intellectual input for the projects as well as strategic opinions for the programme as a whole. As the primary manager for the day-to-day operation of the programme, as well as the overall program coordination and milestone management, the PM will have to communicate effectively and work well with diverse groups of people, including research investigators across diverse disciplines, clinicians and clinical staff, industrial and commercial partners, business development personnel, senior management and funders.

Requirements:

• PhD in a life sciences or related discipline with at least 3 years working experience
• Background in genomics, molecular and cell biology will be required
• Demonstrated ability for project management with Laboratory, project and finance
• management skills and team-leading ability.
• Well-organised, detail-oriented and strong communication skills

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The JAGC program is a collaboration between MiRXES and GIS (together with other public research institutions) to build a new high-throughput NGS platform to empower population-scale genome sequencing, high-resolution single cell genomics, large-scale epigenomics, as well as clinical genomics. The collaboration involves multiple public research institutions, including the Genome Institute of Singapore, Bioinformatics Institute, and Diagnostics Development Hub of A*STAR, as well as National Cancer Centre of Singapore and the Lee Kong Chian School of Medicine at NTU.

We are searching for a talented and well-organised Programme Manager (PM) to join us at the Genome Institute of Singapore to play a leadership role in executing and managing this public-private partnership program. The PM will work with the Principal Investigators to initiate and coordinate key processes of the program, manage key stakeholders (internal and external, across hospitals, research institutions and industry), as well as lead administrative tasks (including facilitating meetings, managing agreements, generating reports and budgeting).

He/she will advise on strategic interactions with industry partners and academic collaborators. The ideal PM will be able to provide intellectual input for the projects as well as strategic opinions for the programme as a whole. As the primary manager for the day-to-day operation of the programme, as well as the overall program coordination and milestone management, the PM will have to communicate effectively and work well with diverse groups of people, including research investigators across diverse disciplines, clinicians and clinical staff, industrial and commercial partners, business development personnel, senior management and funders.

Requirements:

• PhD in a life sciences or related discipline with at least 5 years working experience
• Background in genomics, molecular and cell biology will be required
• Demonstrated ability for project management with Laboratory, project and finance
• management skills and team-leading ability.
• Well-organised, detail-oriented and strong communication skills

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The Technician will work with IME researchers and STMicroelectronics engineers within the collaboration project. This is a great opportunity to learn and start your semiconductor career.

Duties and Responsibilities

Tool Operation

• Learn more than two tools at LiF such as CMP, Furnace, Ovens, CVDs, Vapor etchers, Wet etchers, and metrologies to be an independent user.
• Perform the SPC of the tools and report the results to the LiF Program Manager.

Process Integration

• Provide wafer processing support to project Process Integrators using the tools.
• Track the lots and report the progress to the Process Integrators.
• Log joint/sole projects in Teams (share point) and track during the review/approval stage
• Support material ship-in/out between LiF and IME or LiF and collaborators’ sites.

Job Requirements

• Diploma in MicroElectronics/Electrical/Mechanical/Chemical Engineering.
• Must be a team worker, dependable and highly motivated.
• Basic understanding on semiconductor process is preferred.
• 1-3 years of experience in semiconductor processes (Diffusion, Wet Clean, CMP, ECP, Litho, Etch, CVD, PVD, etc.) will be added advantages.

The Technician will work with IME researchers and STMicroelectronics engineers within the collaboration project. This is a great opportunity to learn and start your semiconductor career.

Duties and Responsibilities

Tool Operation

• Learn more than two tools at LiF such as CMP, Furnace, Ovens, CVDs, Vapor etchers, Wet etchers, and metrologies to be an independent user.
• Perform the SPC of the tools and report the results to the LiF Program Manager.

Process Integration

• Provide wafer processing support to project Process Integrators using the tools.
• Track the lots and report the progress to the Process Integrators.
• Log joint/sole projects in Teams (share point) and track during the review/approval stage
• Support material ship-in/out between LiF and IME or LiF and collaborators’ sites.

Job Requirements

• Diploma in MicroElectronics/Electrical/Mechanical/Chemical Engineering.
• Must be a team worker, dependable and highly motivated.
• Basic understanding on semiconductor process is preferred.
• 1-3 years of experience in semiconductor processes (Diffusion, Wet Clean, CMP, ECP, Litho, Etch, CVD, PVD, etc.) will be added advantages.

The Institute of Microelectronics (IME) is a research institute of the Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME"s mission is to create innovative technologies and add value to Singapore"s semiconductor industry by enabling enterprises to be technologically competitive through R&D and cultivating a technology talent pool to inject new knowledge to the industry.

The Research, Talent, and Planning (RTP) office in IME is looking for a resourceful self-starter to plan and manage the events portfolio in IME. Reporting to the Planning Office within IME, the candidate is entrusted with the coordination and execution of internal and external events, especially outreach activities, technical workshops, and seminars. This role offers the opportunity to collaborate across various R&D departments within IME and the opportunity to engage with external stakeholders throughout the event planning and implementation phases.

Job Responsibilities:

- Take the lead for planning, organizing, and overseeing IME"s internal and external events, ensuring seamless execution and adherence to event objectives.

- Liaise with internal and external stakeholders to manage all event operations (eDMs, vendors, budget, venue, invitations etc.)

- Evaluate event’s success and prepare post event report.

- Other duties as assigned.

Job Requirements:

- Diploma or bachelor’s degree in relevant fields such as mass communications, hospitality/events management.

- Knowledge and experience in digital content design and creation using Canva, photoshop and creation/others. Experience as an emcee is an advantage.

- More than 2 years of experience in relevant fields.

- Familiarity with project management, microelectronics or semiconductor industry is an advantage.

- Proactive, creative, responsive, detail-oriented, with the ability to work quickly across shifting priorities and tight timelines with the goal of delivering best-in-class service, quality, and accuracy.

- High degree of confidence, adaptability, and professionalism in interacting and communicating with partners, government agencies, high-profile leaders in the industry and education institutes.

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master's in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

The Institute of Microelectronics (IME) is a research institute of the Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME"s mission is to create innovative technologies and add value to Singapore"s semiconductor industry by enabling enterprises to be technologically competitive through R&D and cultivating a technology talent pool to inject new knowledge to the industry.

The Research, Talent, and Planning (RTP) office in IME is looking for a resourceful self-starter to plan and manage the events portfolio in IME. Reporting to the Planning Office within IME, the candidate is entrusted with the coordination and execution of internal and external events, especially outreach activities, technical workshops, and seminars. This role offers the opportunity to collaborate across various R&D departments within IME and the opportunity to engage with external stakeholders throughout the event planning and implementation phases.

Job Responsibilities:

- Take the lead for planning, organizing, and overseeing IME"s internal and external events, ensuring seamless execution and adherence to event objectives.

- Liaise with internal and external stakeholders to manage all event operations (eDMs, vendors, budget, venue, invitations etc.)

- Evaluate event’s success and prepare post event report.

- Other duties as assigned.

Job Requirements:

- Diploma or bachelor’s degree in relevant fields such as mass communications, hospitality/events management.

- Knowledge and experience in digital content design and creation using Canva, photoshop and creation/others. Experience as an emcee is an advantage.

- More than 2 years of experience in relevant fields.

- Familiarity with project management, microelectronics or semiconductor industry is an advantage.

- Proactive, creative, responsive, detail-oriented, with the ability to work quickly across shifting priorities and tight timelines with the goal of delivering best-in-class service, quality, and accuracy.

- High degree of confidence, adaptability, and professionalism in interacting and communicating with partners, government agencies, high-profile leaders in the industry and education institutes.

The Project Management Officer will join a compact, dynamic team of project managers and will have the chance to participate in managing innovative research projects focused on sustainability within the energy and chemicals sectors.

Responsibilities include but not limited to:

-Monitor and review projects according to organisational policies and procedures

-Analyse and report projects in terms of Schedule, financial, and performance progress

-Collaborate and work with project managers to ensure internal procedures are properly followed

-Develop guidelines, templates, training materials, and other supporting tools to govern internal business operations

-Manage R&D project delivery by organising, executing, and evaluating project progress and milestones and budget and resource utilisation

-Manage engagement with internal and external stakeholders on communication plans, project schedule, deliverables, and milestones

-Track, monitor, and report progress of project/programme to all stakeholders

-Coordinate and manage project changes to achieve project deliverables and mitigate risks & issues

Requirements

Qualification & Field of Study:

-Bachelor's degree or higher in Chemistry and/or Chemical Engineering-related disciplines. Experience:

-2 years of experience in a research and development and/or project management roles

-Excellent interpersonal skills and teamwork. Ability to collaborate effectively with researchers and achieve outcomes.

-Strong organizational skills with the ability to work independently and as part of a team.

-Strong communication skills, both written and verbal.

-Excellent time management skills and ability to multitask and prioritize work.

-Strong attention to detail and problem-solving skills.

-Knowledge of project management software tools, methodologies, and best practices.

-Strong data analysis skills and proficiency with business analytics software such as Power BI is highly desirable.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The Institute of Microelectronics (IME) is a research institute of the Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME"s mission is to create innovative microelectronics technologies. We want to add value to Singapore"s semiconductor industry by enabling enterprises to be technologically competitive through R&D. We are looking for you to help us grow our partnerships with the industry. If you are excited about microelectronics and believe you can make a difference, we want you!

Job Responsibilities:

- Candidate will be required to develop, secure and manage industry partnerships.

- Candidate will also be responsible for developing and executing marketing strategies to promote IME’s research capabilities to interested parties.

- Candidate will be required to work alongside the ‘Technology Development’ teams to develop their strong value propositions and assist with market intelligence to shape the Technology Development teams’ R&D strategies.

- Candidate will be required to carry out account management to strengthen customer relationships.

- Candidate will be required to coordinate and engage with internal stakeholders such as A*STAR’s Industry and Enterprise Group or various other public sector agencies.

Job Requirements:

- Degree in Science or Engineering.

- At least 8 years of relevant work experience.

- Able to structure and negotiate collaboration agreements.

- Strong communication (written and verbal), marketing and interpersonal skills.

- Strong analytical skills.

- Results oriented, pro-active, and a team player.

- Adaptable and comfortable working in a fast-paced and fast-changing environment.

- Passion to develop Singapore’s semiconductor industry.

Be part of an exciting team working on cutting-edge advanced packaging process technologies. Participate in process development and integration solution to enable advanced packaging process technologies in the world of mobile, IoT, consumer and high-performance computing area. Partner and work with various teams from inside and outside of IME to help develop leading-edge packaging solutions for our customers, taking the solutions from concept to mass production. Responsibilities will include assisting in operations support in clean room to make sure projects are completed successfully and delivered on time.

Responsibilities:

· Operate semiconductor equipment to perform processes, measurement, and inspection of wafers. (Include equipment setup, loading and unloading of wafers)

· Monitor basic equipment/process errors and perform recovery.

· Work with internal and external parties to align for tool time, execute process sequence and collect data to feedback to integration owner.

· Logistically transport wafer lots between equipment within cleanroom and between worksites.

· Identify and address potential areas for improvements such as cycle time, utilization, and cost.

· Perform chemical change/ top-up for equipment under supervision.

· Understand and follow all Environmental, Health and Safety (EHS) procedures and requirements.

· The candidate may be required to perform shift work (Mon-Fri).

Job Requirement:

· Diploma in Electrical/Mechanical/Chemical Engineering

· Basic understanding on semiconductor process is preferred

· 3 years of experience in semiconductor processes (Litho, Etch, CVD, PVD, Plating, Metrology etc.) will be added advantages

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

Be part of an exciting team working on cutting-edge advanced packaging process technologies. Participate in process development and integration solution to enable advanced packaging process technologies in the world of mobile, IoT, consumer and high-performance computing area. Partner and work with various teams from inside and outside of IME to help develop leading-edge packaging solutions for our customers, taking the solutions from concept to mass production. Responsibilities will include assisting in operations support in clean room to make sure projects are completed successfully and delivered on time.

Responsibilities:

· Operate semiconductor equipment to perform processes, measurement, and inspection of wafers. (Include equipment setup, loading and unloading of wafers)

· Monitor basic equipment/process errors and perform recovery.

· Work with internal and external parties to align for tool time, execute process sequence and collect data to feedback to integration owner.

· Logistically transport wafer lots between equipment within cleanroom and between worksites.

· Identify and address potential areas for improvements such as cycle time, utilization, and cost.

· Perform chemical change/ top-up for equipment under supervision.

· Understand and follow all Environmental, Health and Safety (EHS) procedures and requirements.

· The candidate may be required to perform shift work (Mon-Fri).

Job Requirement:

· Nitec or Diploma in Electrical/Mechanical/Chemical Engineering

· Basic understanding on semiconductor process is preferred

· 1-3 years of experience in semiconductor processes (Litho, Etch, CVD, PVD, Plating, Metrology etc.) will be added advantages

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The Institute of Microelectronics (IME) is a research institute of the Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME"s mission is to create innovative microelectronics technologies. We want to add value to Singapore"s semiconductor industry by enabling enterprises to be technologically competitive through R&D. We are looking for you to help us grow our partnerships with the industry. If you are excited about microelectronics and believe you can make a difference, we want you!

Job Responsibilities:

- Candidate will be required to develop, secure and manage industry partnerships.

- Candidate will also be responsible for developing and executing marketing strategies to promote IME’s research capabilities to interested parties.

- Candidate will be required to work alongside the ‘Technology Development’ teams to develop their strong value propositions and assist with market intelligence to shape the Technology Development teams’ R&D strategies.

- Candidate will be required to carry out account management to strengthen customer relationships.

- Candidate will be required to coordinate and engage with internal stakeholders such as A*STAR’s Industry and Enterprise Group or various other public sector agencies.

Job Requirements:

- Degree in Science or Engineering.

- At least 8 years of relevant work experience.

- Able to structure and negotiate collaboration agreements.

- Strong communication (written and verbal), marketing and interpersonal skills.

- Strong analytical skills.

- Results oriented, pro-active, and a team player.

- Adaptable and comfortable working in a fast-paced and fast-changing environment.

- Passion to develop Singapore’s semiconductor industry.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

The Institute of Microelectronics (IME) is a research institute of the Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME"s mission is to create innovative microelectronics technologies. We want to add value to Singapore"s semiconductor industry by enabling enterprises to be technologically competitive through R&D. We are looking for you to help us grow our partnerships with the industry. If you are excited about microelectronics and believe you can make a difference, we want you!

Job Responsibilities:

- Candidate will be required to develop, secure and manage industry partnerships.

- Candidate will also be responsible for developing and executing marketing strategies to promote IME’s research capabilities to interested parties.

- Candidate will be required to work alongside the ‘Technology Development’ teams to develop their strong value propositions and assist with market intelligence to shape the Technology Development teams’ R&D strategies.

- Candidate will be required to carry out account management to strengthen customer relationships.

- Candidate will be required to coordinate and engage with internal stakeholders such as A*STAR’s Industry and Enterprise Group or various other public sector agencies.

Job Requirements:

- Degree in Science or Engineering.

- At least 8 years of relevant work experience.

- Able to structure and negotiate collaboration agreements.

- Strong communication (written and verbal), marketing and interpersonal skills.

- Strong analytical skills.

- Results oriented, pro-active, and a team player.

- Adaptable and comfortable working in a fast-paced and fast-changing environment.

- Passion to develop Singapore’s semiconductor industry.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

The Institute of Microelectronics (IME) is a research institute of the Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME"s mission is to create innovative microelectronics technologies. We want to add value to Singapore"s semiconductor industry by enabling enterprises to be technologically competitive through R&D. We are looking for you to help us grow our partnerships with the industry. If you are excited about microelectronics and believe you can make a difference, we want you!

Job Responsibilities:

- Candidate will be required to develop, secure and manage industry partnerships.

- Candidate will also be responsible for developing and executing marketing strategies to promote IME’s research capabilities to interested parties.

- Candidate will be required to work alongside the ‘Technology Development’ teams to develop their strong value propositions and assist with market intelligence to shape the Technology Development teams’ R&D strategies.

- Candidate will be required to carry out account management to strengthen customer relationships.

- Candidate will be required to coordinate and engage with internal stakeholders such as A*STAR’s Industry and Enterprise Group or various other public sector agencies.

Job Requirements:

- Degree in Science or Engineering.

- At least 8 years of relevant work experience.

- Able to structure and negotiate collaboration agreements.

- Strong communication (written and verbal), marketing and interpersonal skills.

- Strong analytical skills.

- Results oriented, pro-active, and a team player.

- Adaptable and comfortable working in a fast-paced and fast-changing environment.

- Passion to develop Singapore’s semiconductor industry.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

The MedTech Catapult is a national initiative for accelerating the development of high-value MedTech projects through an in-house product engineering unit. The objectives of the Programme Office are to i) support the operations of the MedTech Catapult, ii) develop strategies and seed partnerships to support MedTech Catapult activities; and iii) oversee and administer the grants. The Senior Assistant Director will report to the Deputy Director, Programme Office.

Job Responsibilities

• Work with stakeholders to develop and execute the overall programme strategy for MedTech Catapult, including plans for ecosystem development
• Specifically, to execute and manage programme operations concerning budget, finance, procurement, HR, facilities and legal etc.
• Contribute to refining the strategic direction of MedTech Catapult and support the development of refined strategies.
• Set up, convene and engage steering committee to provide six-monthly updates and to seek inputs to refine the direction of the programme
• Key interface with A*STAR HQ for reporting and alignment to SOPs and support programme needs under A*STAR requirements i.e. Business continuity manager, Data protection officer
• Coordinate and prepare accurate and timely reports to internal and external stakeholders
• To support grant management, tracking and review, as well as enrol and engage with KoLs and advisory members to ensure that funded programmes remain on track to achieve outcomes, milestones, performance indicators and budget utilization.
  • Organise and participate in the grants administration process
  • Set up, convene and engage project evaluation committee to provide critical evaluation of potential projects seeking to enter MedTech Catapult.
  • Monitor and track the progress, timeline, and budget of projects
• To set up and manage digital tools for programme and grants tracking
• Manage Associate, Programme Office as direct report
• To work with internal and external functions to support other operational activities for the Programme Office

Requirements

• B.S in Electrical Engineering, Computer Engineering, Mechanical Design, Bioengineering or other relevant experience in a related field.
• >10y of working experience in either medical device/life sciences industry, research & development, business development, strategic/corporate planning or any other relevant roles
• Familiarity with programme and grants management is a plus
• Possess excellent networking, communication and writing skills.
• Meticulous with attention to detail
• Demonstrate ability to juggle priorities and meet deadlines.
• Excellent written and verbal communication skills
• Enjoy working in a small team, start-up environment

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The MedTech Catapult is a national initiative for accelerating the development of high-value MedTech projects through an in-house product engineering unit. The objectives of the Programme Office are to i) support the operations of the MedTech Catapult, ii) develop strategies and seed partnerships to support Catapult activities; and iii) oversee and administer the grants. The Senior Assistant Director will report to the Deputy Director, Programme Office.

Job Responsibilities

• Work with stakeholders to develop and execute the overall programme strategy for MedTech Catapult, specifically in business development
• Develop and implement a business development and marketing plan to achieve business goals and objectives of MC.
• Build a robust and sustainable MedTech Manufacturing ecosystem comprised of product owners, solution & technology providers, manufacturers, system integrators, institute of higher learning, research institutes, and public agencies
• Establish a deep understanding of MC?s key features and activities by interfacing closely with the programme leadership and productization unit
• Work with Steerco, Key Opinion Leaders, partners and internal stakeholders to develop and refine the value proposition of MC to its partners.
• Develop and implement marketing plan, whilst managing the budget for marketing needs
• Initiate and establish relationships with potential partners across the ecosystem, including other public sector agencies, universities, hospitals, suppliers, design houses, contract manufacturers and industry players.
• Develop deep relationships with key customers/partners, identify business opportunities for growth, negotiate and close business deals.
• Lead conversations with customers to capture business requirements, identify problem statements to scope proposals for collaboration.
• To support other operational activities for the Programme Office

Requirements

• B.S in Bioengineering, Business, Marketing or other relevant experience in a related field.
• >10 of working experience in business development and marketing for medical device/life sciences industry, research & development, incubators/accelerators or any other relevant roles
• Experience with setting up and maintaining a customer relationship management system
• Familiarity with life science instruments and medical device value chain and network is a plus
• Familiarity with local life science instruments and medical device ecosystem is a plus
• Experience with creating marketing materials is a plus
• Possess excellent networking, communication and writing skills.
• Demonstrate ability to juggle priorities and meet deadlines.
• Excellent written and verbal communication skills
• Enjoy working in a small team, start-up environment

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The MedTech Catapult has a dedicated objective of curating and accelerating the development of high potential MedTech projects through an in-house product engineering unit. The objectives of the Programme Office are to develop strategies and seed partnerships to support Catapult activities. The Associate will report to the Senior Assistant Director.

Job Responsibilities:

• To provide general secretarial, administrative and logistical support to the department (e.g. scheduling of meetings, collation of materials, venue setup, claims, payments etc.)
• To assist in calendaring/scheduling for programme director, deputy programme director, deputy product director and medtech catapult programme office
• Vendor management - Liaising with vendors for purchase and payment, finding relevant vendors and getting quotations when necessary
• Upkeep of office inventory and facilities
• To support Community of Practice events, training related seminars and workshops and interfacing with registered training providers and research performers to facilitate upskilling activities
• To support marketing and administrative efforts in email blasting for events, marketing collaterals, social medial updates and ecosystem engagement materials
• To assist in event/study trip planning and management
• To liaise with various departments to handle requests and queries
• To assist in knowledge management process via housekeeping and archiving of documentation pertaining to the department/meetings
• To support other operational activities of the Programme Office

Requirements:

• Diploma, preferably in marketing and communications
• 2-3 years of relevant working experience would be preferred
• Competent in computer skills (especially Word, MS Excel, Outlook)
• Proficient in online meeting platforms such as MS Teams, Zoom, Webex
• Possesses good communication and interpersonal skills

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

About Us:

EDDC is a dynamic and rapidly growing organisation committed to excellence and innovation. We are seeking an experienced Executive Manager to provide high-level support to our Senior Management/Leadership Team (C-Suite executives) at EDDC, ensuring their schedules are efficiently managed, administrative briefs are meticulously prepared, and contracts (NDA and CDA) for scientific procurement and project needs are expertly managed.

Job Description:

The successful candidate will be supporting the C-Suite executives at EDDC, you will work closely with executives, deliver efficient secretarial and administrative support in a well-organised manner to ensure daily administrative tasks run smoothly. You will also be responsible for contract management, particularly Non-Disclosure Agreements (NDAs) and Confidentiality Disclosure Agreements (CDAs) related to scientific procurement and projects.

Key Responsibilities:

1. Schedule Management : Effectively manage and optimise the calendars of C-Suite executives, coordinating internal and external meetings, appointments, and travel arrangements.

2. Administrative Briefs : Prepare comprehensive and confidential administrative briefs, reports, and documentation for the C-Suite, ensuring accuracy and timely delivery.

3. Contract Management : Oversee the creation, execution, and management of NDAs and CDAs for scientific procurement and project requirements, ensuring compliance with legal and organizational standards.

4. Communication Liaison : Act as a central point of contact between C-Suite executives and various internal and external stakeholders, ensuring seamless communication and responsiveness.

5. Develop meeting agendas : Organise, facilitate, and follow up on executive meetings, including preparing agendas, minutes, and action items.

6. Strategic Support : Assist in strategic projects, including research, data analysis, and providing insights to support decision-making.

7. Confidentiality : Maintain the highest level of confidentiality and discretion in handling sensitive information.

8. Team Collaboration : Collaborate with administrative teams to streamline processes and support cross-functional initiatives.

Requirements :

• Diploma/Bachelor Degree in Business Administration, Management, or a related field.
• Proven experience in executive support, scheduling for senior executives, and contract management
• Exceptional organisational and time management skills
• Excellent written and verbal communication skills
• Proficiency in office software and scheduling tools (e.g. Microsoft Office)
• Strong problem-solving and decision making abilities
• Ability to work under pressure and adapt to changing priorities
• Prior experience in a similar role supporting C-Suite executives
• Project Management experience
• Familiarity with contract management software and legal documentation

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.