Senior / DFT Engineer
Responsibilities:
DFT implementation of Scan Logic, IJTAG, MBIST Logic, Logic BIST
Analysis to improve the testability of Digital design at Block and chip level.
Implementation of DFT logics for Digital and Mixed Signal IP.
Perform ATPG pattern generation including SSA /Transition/ Path Delay and IDDQ pattern.
Perform ATPG verification a...