Salary: $3,000 - $4,000
Working Timing: Monday to Friday – 9 am to 6 pm
Working Location: Near Aljunied / MacPherson / Paya Lebar MRT

Requirements:

• Minimum Diploma or equivalent.
• Min 2 years relevant experience
• Experience in project management (Able to handle Projects ), A&A works, M&E services, As-Built drawing, site supervision and coordination, compliances, and regulations.
• Knowledge / Related Experience in ACMV, Electrical, Fire Protection System, Plumbing and Sanitary Services, and installation of M&E Services on site

Responsibilities:

• Maintains project team accomplishments by communicating essential information; coordinating actions; obtaining expert input; reviewing open issues and action items; contributing information to team meetings and reports; escalating project completion impediments.
• Day-to-day management on site, including supervising and monitoring the site and co-ordinate sub-contract works.
• Liaise with clients and consultants on project.
• Produce proper reports and documentation before and after project completion.
• Complies with codes and regulations by complying with requirements; preparing permit applications, plans, and compliance reports.
• Assist to update of As-Built drawing on site.
• And all other General Administration works as instructed.

Chin See Min Reg No. : R22107450

The Supreme HR Advisory Pte Ltd EA No. : 14C7279

• Implement IC design development of products, Logic Synthesis and Static Timing Analysis
• Manage DFT related activities - Scan Insertion, ATPG, Pattern Validation
• Assist in debug & correct any functional issues found in taped-out devices

Requirements:

• Degree in Electrical/Electronics Engineering or equivalent
• At least 5 years of digital IC design experience using EDA tools (Cadence, Synopsys)
• Proficiency in Verilog HDL and VHDL RTL design, Logic Synthesis, DFT, ATPG, Timing Closure

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R22111604

Location: Ubi

Working Day: 5 days

Working Time: 9am - 6pm

Salary: $ 2500 - $ 3000

Job Responsibilities

• Planning an event’s theme, setting and overall design, including decorations and entertainment
• Overseeing the event’s budget and making sure it stays within the predetermined limits
• Meeting with clients to discuss their needs and preferences
• Creating floor plans and models of the event space that show where each element will be located
• Coordinating with event managers, coordinators, planners, and other team members to ensure that all aspects of an event are executed smoothly

Requirements

• At least a Diploma in Art / Design / Creative Multimedia or equivalent
• At least one year of relevant working experience
• Highly proficient in graphic / creative design programs: Adobe CS (Photoshop, Illustrator, InDesign, Acrobat) and Microsoft office programs (Outlook, PowerPoint, etc.)
• Strong in creative storytelling and design mastery
• Strong 3D skills preferred
• Ability to manage timelines and various projects

https://wa.me/6596420989

WhatsApp: +65 9642 0989 (Han)

Email: [email protected]

Chaw Chiaw Han, Reg No：R22106723

The Supreme HR Advisory Pte Ltd, EA No：14c7279

Company Description

Our client’s mission is to develop the lowest-power semiconductor solutions to enable intelligent devices everywhere by developing the lowest-power semiconductor solutions to drive a more energy-efficient, sustainable, and data-driven world. They have helped leading manufacturers worldwide develop products that last weeks on a single charge (rather than days), while delivering a maximum feature set in compact industrial designs. Their goal is to take Artificial Intelligence (AI) where it has never gone before in mobile and portable devices, using their advanced ultra-low power system on chip (SoC) solutions.

Their innovative and fast-moving teams of research, development, production, marketing, sales, and operations are spread across several continents, including the US (Austin and San Jose), Taiwan (Hsinchu), China (Shenzhen and Shanghai), Japan (Tokyo), and Singapore. They value continued technology innovation, fanatical attention to customer needs, collaborative decision-making, and enthusiasm for energy efficiency. They embrace candidates who also share these same values. The successful candidate must be self-motivated, creative, and comfortable learning and driving exciting new technologies. They encourage and nurture an environment for growth and opportunities to work on complex, interesting, and challenging projects that will create a lasting impact. Come join us on our quest for 100 billion devices.

Job Description

They are looking for an experienced Staff Design Verification Engineer to join our dynamic team in Singapore. The ideal candidate will have 8-12 years of experience in the field of semiconductor design verification and a proven track record of success in developing and executing verification plans for complex SoC designs. The Design Verification Engineer will be responsible for the verification of digital and mixed-signal designs, including systems-on-chip with multiple CPUs, and digital signal processors, security hardware, and other logic for IoT applications.

• The ideal candidate should have demonstrated successful design verification tasks at block, sub-system, and full-chip level.
• Must have participated in all phases of chip development, from creating test plans, creating testbench environment (SV/UVM), integrate VIP’s, automate test env for randomized testing and score boarding.
• Utilize UVM to create drivers, monitors, predictors, and scoreboards.
• In-Depth knowledge of SoC architecture with AMBA AXI/AHB/APB, DMA’s,Security, clock, and power-gating techniques is required.
• Responsible for verification of block(s) that includes writing tests, assertionand coverage for a block.
• Create tests to achieve coverage goals while verifying functionality.
• Develop support utilities for verification automation, test bench automation, regression, to improve productivity.
• Develop tests to evaluate power and performance aspects of the design.
• Perform gate-level-simulations and participate in supporting FPGA and Post-silicon bring-up

Requirements

• BSEE/MSEE Degree 8-12 years of experience at block, sub-system and full- chip verification.
• Strong in understanding multiple architectures, integrating 3rd party IP’s/VIP’s, have worked with mixed-signal designs with low-power design and verification challenges.
• Experience with System Verilog simulation required.
• Strong understanding/exposure to Design Verification for low-power batteryoperated designs highly desired.
• C based verification in an SoC environment is required.
• Experience with ARM processor-based designs and low-power designtechniques is a plus.
• Languages: SystemVerilog (UVM), Verilog, C/C++, Python, Makefile
• Technologies: ARM SoC (Preferred), AMBA AXI/AHB/APB, DMA, FlowControl, Serial Devices, QoS
• Preferred technologies: MIPI(CSI/DSI), Crypto, OTP, DSP, Low-Power

• Handle the design team to achieve targets for the Civil engineering, Geotechnical engineering, Infrastructural design works.
• Lead consultant and review their design to ensure to meet the relevant requirements and the project’s preference.
• Discuss the design results to the client and other stakeholders and obtain their agreement.
• Enhance the design to reduce cost and construction schedule effectively.
• Finish all design works including necessary approvals without adversary affecting the tender/construction schedule.

Requirements:

• Degree in Civil Engineering recognized by the PE Board
• At least 7 years of marine civil design experience in a large-scale project.
• Good knowledge in international and domestic standards for design work.
• Experience in marine structure D&B plant project and overseas ODA project is an added advantage.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R1326740

• Identify requirements and features for semiconductor equipment and create concepts and architecture of new equipment.
• Design mechanical systems which involve the selection and use of motors, actuators, gear drives, pumps, and valves.
• Responsible for design verification and validation testing to ensure compliance with specifications, safety regulations and product requirements.
• Create a detailed Mechanical drawing and apply analysis tools like Fish Bone Diagram and FMEA.

Requirements:

• Degree in Mechanical Engineering or equivalent
• At least 5 years of experience in Die Sorter.
• Familiar with 3D CAD software.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R21100996

• Responsible for USB2.0/USB3.0 device driver development, test, optimisation, and maintenance.
• Perform WHQL testing and certification of drivers and device frameworks.
• Take part in all phases of SDLC and prepare corresponding documentation.

Requirements:

• Degree in Computer Science/Engineering
• At least 5 years of USB device drivers’ development experience in Windows/Linux/mac/WinCE
• Good knowledge of USB2.0/USB3.0/ USBCV protocols and USB Device Classes (HID, MSC, CDC, UVC, UAC, DFU, Custom).

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

• Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out.
• Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan.
• Study the physical design methodology of advanced process nodes and builds an automatic physical design platform.

Requirements:

• Degree or above in Electronic Engineering or equivalent.
• At least 5 years of hands-on project in digital backend design experience.
• Familiar with TCL, Perl, or Python script development with EDA tool design.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R1326740

• Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
• Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
• Build reusable testbench, constrained-random/directed test cases, and verification associated behavioural modules for both block levels and system levels.
• Use regression strategy, methodology and tool scripts and measure the function coverage.

Requirements:

• Degree in Electrical/Computer Engineering or Computer Science or equivalent.
• At least 5 years of experience in building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification.
• Strong knowledge of UVM/OVM, Semiformal Verification, assertion-based verification, hardware and software co-verification methodology.
• Proficient with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

Geotechnical Engineer

Working Days: 5 Days (Monday – Friday)
Working Hours: 8.30am – 6pm
Location: Near Ubi Mrt
Salary: $3500 - $4200 (Based on experiences)

Job Scope:

• Plan, design, review and prepare drawings & specification & tender document
• Manage technical & engineering matter
• Resolve any technical difficulties & other problems that may rise
• Attending project technical
• Conversant with local codes and regulations Experience in engineering software Geotechnical Engineer
• Geotechnical design, analysis and assessment for ground improvement works, foundation, excavation, earth retaining structures, slope, instrumentation, and site investigation.
• Plan, design, supervise and coordinate for geotechnical/ civil engineering and infrastructural design and site works.
• Ensure all engineering works comply with all relevant statutory standards, regulations, and Codes of Practice.
• Liaison with project stakeholders, clients, other consultants, contractors, relevant authorities.
• Assist Team Leader in maintaining high quality standards of design and supervision

Requirements:

• Bachelor’s Degree in Civil Engineering
• At least 2 – 3 years’ experience with geotechnical

Lee Wan Ling | Reg No: R23116154

THE SUPREME HR ADVISORY PTE LTD | EA No: 14C7279

We are looking for a candidate for high-speed analog integrated circuit design. This candidate will contribute to the development of high linearity silicon photonics modulators for 6G and beyond communication systems. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications
• Design and tapeout ICs which include state-of-the-art circuit blocks, e.g. wideband linear low-noise amplifier and transimpedance amplifier with a focus on circuits interfacing with silicon photonics elements
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electronic Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

Requirements:

- Support the marketing team in strategic, tactical creative plans to drive sales for our business and ensure brand growth through various marketing activities.

- End to end execution and management of marketing campaigns - from content generation to copywriting to compaigns tracking and reporting .

- Strategize, plan, create and deliver quality, engaging social media and digital content for company blog site

- Handle artwork and design

- Contribute ideas, design new artwork and have the expertise to work with a wide range of digital graphi tools to produce high-quality visual communications.

https://t.me/fastrecruitmentsg

Add this telegram group for more details of Work.

• Responsible for RTL design, simulation, and verification for ASIC/SoC products.
• Identify internal and external requirements, PPA study, RTL coding, implementation and work closely with backend team.
• Create reusable internal IPs for AI and/or in-memory computing products.
• Handle IP integration and validation and support post-Si testing and validation.

Requirements:

• Degree in Electrical Engineering or equivalent
• At least 5 years of RTL/SoC/digital design with pre-layout simulation and post-layout simulation experience.
• Strong knowledge with Verilog and system Verilog, VCS, Verdi or other industry standard tools.
• Familiarity with AMBA APB AXI Protocol, RISC/Arm or other core architectures.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

• Identify requirements and features for semiconductor equipment and create concepts and architecture of new equipment.
• Design mechanical systems which involve the selection and use of motors, actuators, gear drives, pumps, and valves.
• Responsible for design verification and validation testing to ensure compliance with specifications, safety regulations and product requirements.
• Create a detailed Mechanical drawing and apply analysis tools like Fish Bone Diagram and FMEA.

Requirements:

• Degree in Mechanical Engineering or equivalent
• At least 5 years of experience in Die Sorter.
• Familiar with 3D CAD software.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R21100996

We are seeking a highly creative and skilled Marketing and Graphic Design Intern to join our Marketing and Communication team for a 3-month internship program. The intern will work closely with the Marketing and Communication Senior Manager to conceptualize, design, and create various marketing collaterals. This role provides an excellent opportunity to gain hands-on experience in a fast-paced professional environment in the financial digital assets industry.

The candidate will also be exposed to the planning and execution of SBI Digital Markets’ brand campaign at the upcoming Singapore Fintech Festival in November 2024.

Principal Duties and Responsibilities:

• Collaborate with the Marketing and Communication Senior Manager to understand project requirements and concepts.
• Design and create visually appealing marketing materials, including but not limited to LinkedIn videos, brochures, posters, banners, social media graphics, and presentations.
• Use Adobe Suite tools, including Illustrator, Photoshop, and InDesign, to bring creative ideas to life.
• Ensure all design elements, layouts, and graphics are visually appealing, cohesive, and on-brand.
• Work independently, manage multiple projects simultaneously, and meet deadlines effectively.
• Amend designs based on feedback and ensure final graphics and layouts are visually appealing and meet the company’s standards.
• Stay updated on emerging design trends and technologies.
• Events planning and management experience will be a plus.

Qualifications & Skills:

• Currently pursuing a Diploma or higher majoring in graphic design / branding.
• Experience and passion for Photography, typography, and layouts (big bonus on illustration).
• Proficient in creative software like Adobe Photoshop, Illustrator, AfterEffects & Premiere, Figma
• A strong design portfolio that best demonstrates your design skills
• Possesses creative flair, coupled with versatility and adaptability
• To be able to participate actively in brainstorming sessions and contribute creative ideas
• A self-starter and a collaborative team player with a positive attitude
• Respects tight timeline and schedules

• Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out.
• Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan.
• Study the physical design methodology of advanced process nodes and builds an automatic physical design platform.

Requirements:

• Degree or above in Electronic Engineering or equivalent.
• At least 5 years of hands-on project in digital backend design experience.
• Familiar with TCL, Perl, or Python script development with EDA tool design.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R1326740

• Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
• Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
• Build reusable testbench, constrained-random/directed test cases, and verification associated behavioural modules for both block levels and system levels.
• Use regression strategy, methodology and tool scripts and measure the function coverage.

Requirements:

• Degree in Electrical/Computer Engineering or Computer Science or equivalent.
• At least 5 years of experience in building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification.
• Strong knowledge of UVM/OVM, Semiformal Verification, assertion-based verification, hardware and software co-verification methodology.
• Proficient with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

• Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
• Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
• Build reusable testbench, constrained-random/directed test cases, and verification associated behavioural modules for both block levels and system levels.
• Use regression strategy, methodology and tool scripts and measure the function coverage.

Requirements:

• Degree in Electrical/Computer Engineering or Computer Science or equivalent.
• At least 5 years of experience in building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification.
• Strong knowledge of UVM/OVM, Semiformal Verification, assertion-based verification, hardware and software co-verification methodology.
• Proficient with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

• Identify requirements and features for semiconductor equipment and create concepts and architecture of new equipment.
• Design mechanical systems which involve the selection and use of motors, actuators, gear drives, pumps, and valves.
• Responsible for design verification and validation testing to ensure compliance with specifications, safety regulations and product requirements.
• Create a detailed Mechanical drawing and apply analysis tools like Fish Bone Diagram and FMEA.

Requirements:

• Degree in Mechanical Engineering or equivalent
• At least 5 years of experience in Die Sorter.
• Familiar with 3D CAD software.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R21100996

• Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out.
• Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan.
• Study the physical design methodology of advanced process nodes and builds an automatic physical design platform.

Requirements:

• Degree or above in Electronic Engineering or equivalent.
• At least 5 years of hands-on project in digital backend design experience.
• Familiar with TCL, Perl, or Python script development with EDA tool design.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R1326740

• Responsible for RTL design, simulation, and verification for ASIC/SoC products.
• Identify internal and external requirements, PPA study, RTL coding, implementation and work closely with backend team.
• Create reusable internal IPs for AI and/or in-memory computing products.
• Handle IP integration and validation and support post-Si testing and validation.

​

Requirements:

• Degree in Electrical Engineering or equivalent
• At least 5 years of RTL/SoC/digital design with pre-layout simulation and post-layout simulation experience.
• Strong knowledge with Verilog and system Verilog, VCS, Verdi or other industry standard tools.
• Familiarity with AMBA APB AXI Protocol, RISC/Arm or other core architectures.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

• Responsible for the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tape out.
• Liaise with the front-end design team to complete the chip floorplan, clock architecture, and power plan.
• Study the physical design methodology of advanced process nodes and builds an automatic physical design platform.

Requirements:

• Degree or above in Electronic Engineering or equivalent.
• At least 5 years of hands-on project in digital backend design experience.
• Familiar with TCL, Perl, or Python script development with EDA tool design.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R1326740

• Responsible for RTL design, simulation, and verification for ASIC/SoC products.
• Identify internal and external requirements, PPA study, RTL coding, implementation and work closely with backend team.
• Create reusable internal IPs for AI and/or in-memory computing products.
• Handle IP integration and validation and support post-Si testing and validation.

​

Requirements:

• Degree in Electrical Engineering or equivalent
• At least 5 years of RTL/SoC/digital design with pre-layout simulation and post-layout simulation experience.
• Strong knowledge with Verilog and system Verilog, VCS, Verdi or other industry standard tools.
• Familiarity with AMBA APB AXI Protocol, RISC/Arm or other core architectures.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740