THE ROLE:

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
• Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
• Estimate the time required to write the new feature tests and any required changes to the test environment
• Build the directed and random verification tests
• Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
• Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements

PREFERRED EXPERIENCE:

• Proficient in IP level ASIC verification
• Proficient in debugging firmware and RTL code using simulation tools
• Proficient in using UVM testbenches and working in Linux and Windows environments
• Experienced with Verilog, System Verilog, C, and C++
• Graphics pipeline knowledge
• Developing UVM based verification frameworks and testbenches, processes and flows
• Automating workflows in a distributed compute environment.
• Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
• Strong background in the C++ language, preferably on Linux with exposure to Windows platform
• Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
• Good working knowledge of SystemC and TLM with some related experience.
• Scripting language experience: Perl, Ruby, Makefile, shell preferred.
• Exposure to leadership or mentorship is an asset
• Desirable assets with prior exposure to video codec system or other multimedia solutions.

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION:
Singapore

#LI-LL1

Engineer - Analog / RF Design [Radio System Solutions]

Job Description:

• Design of RF/Analog/Mixed-signal IC circuit blocks / IPs based on specifications (performance, area, power consumption).
• Realize IC layout with floor planning and performance considerations (with layout engineers).
• Testing & Debugging of IC prototypes (with system verification engineers).
• Support of IC to mass production ready.
• Continual support / debug of field related issues or customer IC rejects.
• IC design and performance documentation.

Requirement

• Bachelor's Degree / Master’s Degree in EEE (major in IC Design).
• Knowledge of RF/analog designs through final year project and internship are an added advantage.
• Training will be provided.

Important Note: This advertisement is not for immediate hiring but is intended to identify suitable candidates for future openings in this position.

About the team

Radio System Solutions Division develops standalone RF-IC or IPs for wireless communication products within MediaTek. This involves designing and verification of building blocks such as low-noise amplifiers, power amplifiers, filters, data-converters, phase-locked loops, low-dropout regulators and digital calibration circuits in advanced semiconductor processes. We are looking for a passionate talent who always up for challenges to join us for this exciting career journey!

In MediaTek, we believe technology changes lives and a changed life can change the world.

Joint us - Tomorrow built by you.

Mission statement:

Lead the engineering execution of medium-size projects and ensure that all related activities are performed in accordance with Hitachi Energy policy, contractual agreements, quality standards, health, safety & environment requirements. Responsible for day-to-day designing and engineering activities aligned with schedule commitments. He / She is to possess technical knowledge and skills relating to the design of various transmission substation/Industry components, systems and equipment. To provide technical guidance to his/her project team and lead project engineering discussion.

Your responsibilities:

• You will design system while adhering to design and engineering principles of transmission substation/Industry, incorporate equipment, system, and safety features in design plans, comply with local and national safety standard and ethics that come with the design engineer role.
• You will maintain records and documents of all the work and design in accordance with unit and customer requirement.
• You will work in within the proposed schedule and budget for the project and liaise with project stakeholders with status update to them regarding the status of the work.
• You will coordinate mechanical and electrical tests on design, if required, conduct tests on equipment against fundamental design.
• You will manage department's compliance with organization’s risk management framework, review design drawings for practicability, completion timeframe and research capabilities.
• You will assist in development engineering resource planning strategy, coordinate with factory and supplier to ensure the design meet with the requirement, prepare design related calculation and issue bill of material·
• Living Hitachi Energy's core values of safety and integrity, which means taking responsibility for your own actions while caring for your colleagues and the business.

Your background:

• You hold Electrical Engineering degree or equivalent.
• Preferably with 3 years’ experiences in Electrical/Transmission Industry.
• Experience and proficient knowledge and skills in BIM - Autodesk REVIT (3D model)
• Experience in switchgear planning, design and bidding related tasks.
• Good knowledge of substations equipment, protection relays and network automation.
• Knowledge of Electrical/Transmission Utilities Industry is preferred.
• Proficiency in English language.

What you do

Be part of the team that validates the physical sign-off of our chips, powering the brands we love every year with 2 billion consumer electronic products such as digital TVs, home audio devices, DVD/Blue-ray players, smartphones, tablets, networking and connectivity products, and many more. As a member of the MediaTek Physical Verification Sign-off team, you will be responsible for ensuring the manufacturability and reliability of IC designs through rigorous physical verification processes to enable the success of our chips tape-out. Join us in shaping the future of technology and making a real impact on the world!

• Responsible for assembling of various design system into a full chip.
• Perform design rule checking (DRC) to identify and resolve System-on-chip layout violations and ensure compliance with manufacturing rules and constraints.
• Conduct layout versus schematic (LVS) verification to ensure the accuracy and consistency between full chip layout and schematic of the IC design.
• Execute electrical rule check (ERC) to identify potential electrical issues and ensure the integrity of the design.
• Perform antenna and electrostatic discharge (ESD) checks to prevent potential reliability, latch-up, leakage issues.
• Collaborate with design and layout teams to address and resolve physical design issues and optimize the layout for manufacturability and reliability.
• Contribute to the development and improvement of physical verification methodologies and flows.
• Work closely with process technology teams to understand and address process-related challenges and constraints.
• Participate in tape-out activities and ensure that the physical design meets the required quality and reliability standards for fabrication.

What you bring

• Bachelor/master’s degree in Electrical/Electronic Engineering / Computer Science or equivalent
• With minimum 4 years of relevant experience
• Solid understanding of physical design concepts, IC manufacturing processes, and semiconductor device physics.
• Proficiency in using physical verification tools such as Calibre, IC Validator, or other industry-standard DRC/LVS tools.
• Experience with scripting languages such as TCL, Perl, or Python for automation and tool customization.
• Strong problem-solving skills and the ability to analyze and debug complex physical design issues.
• Excellent communication and teamwork skills to collaborate effectively with cross-functional teams.
• Familiarity with EDA (Electronic Design Automation) tools and design methodologies is a plus.
• Proficient in UNIX (Linux) platforms
• Strong communication skills, problem solving and analytical skills
• Candidate with more years of experience will be considered for a more Senior role.

Location: One North, Singapore

Who We Are

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact. – Join us now!

About NSING:

As part of Nations Technologies Group, NSING was founded in 2018 in Singapore bringing high-performance semiconductor products and solutions to global semiconductor industry. Our products includes General and Secure MCU, Secure IC for TPM (Trusted Platform Module), Bluetooth Low Energy BLE and BMS (Battery Management System). When you join NSING, you will be part of a talented team in the Singapore R&D Center where we develop high performance MCU targeting for Industrial and Edge AI applications.

Your Role:

As a SoC Design Verification Engineer, you will be you would be part of a passionate team developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C co-simulation, to mixed-signal simulation and formal verification. You will be part of the Singapore team in developing high performance MCU chips.

• Develop detailed verification plans based on design specifications and architectural requirements.
• Create and maintain test benches for complex digital designs using System Verilog and UVM (Universal Verification Methodology).
• Write, debug, and execute test cases to verify functionality, performance, and power consumption of our SoC products.
• Collaborate with design engineers to identify, analyze, and resolve design issues.
• Conduct coverage analysis and drive verification closure to ensure all functional requirements are met.
• Mentor junior verification engineers, providing technical guidance and support.
• Continuously improve verification processes and methodologies to enhance efficiency and effectiveness.
• Participate in design and verification reviews, providing constructive feedback and recommendations.
• Stay updated with the latest industry trends and advancements in verification techniques and tools.

Your Skills and Experiences:

• Education：Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• Experience: 5 years+ prior industry experience of design verification including significant System Verilog and UVM usage.
• Technical skills:

-Deep knowledge of digital logic design, SOC architecture and microarchitecture

- Proficient in simulation-based verification methodologies and languages such as UVM and System Verilog

- Skilled in developing and maintaining test benches, test cases, and verification environments

- Experience across the full verification cycle from initial planning to final tape out

• Preferred skills:

- Knowledge of low-power design techniques and verification methodologies.

- Knowledge of hardware-software co-simulation mixed-signal verification techniques.

- Knowledge of gate level simulation methodologies.

Other Skills:

• Strong analytical and problem-solving skills, with a keen attention to detail.
• Excellent communication and teamwork skills, with the ability to collaborate effectively in a cross-functional environment.
• Flexibility and adaptability and demonstrates ability to manage multiple tasks and projects, prioritizing effectively to meet deadlines.

At Cheil, we are passionate about ideas that move.

We believe that the right idea will move seamlessly across channels: from online to offline, above the line to below the line, in-store to out-of-home. It will move brands, move products and most importantly, move people. The right idea will move everything forward.

Established in 1973 with headquarters in Seoul, South Korea, Cheil Worldwide is one of the world’s leading integrated marketing communications networks, with more than 7,200 employees globally in more than 54 offices in 46 countries.

For more information, visit us at: www.cheil.com.

We are inviting candidates for the position of:

Content Publishing / Graphic Design Intern (Full-time internship)

Job description

Working with the Samsung Electronics SEA & Oceania business, you will have the privilege of working within a big data environment where strategic decisions are made, guiding best in class upholding brand compliance.

• Content Audit & Analysis: Work closely with the Content Team to conduct content audits on Samsung.com to ensure content is brand compliant and aligns with our strategic objectives.

• Progress Tracking & Reporting: Analyse, track, and report progress on weekly and monthly reports for multi-market operations, providing insights and recommendations for optimization.

• Training Document Management: Prepare and maintain training documents, Standard Operating Procedures (SOPs), and any other necessary documents to support team operations and knowledge transfer.

• Assist in Design Projects: Execute simple design tasks such as key visual adaptations for regional campaigns, ensuring alignment with brand guidelines and creative direction.

• Asset Management: Organize and maintain digital assets, including images, graphics, and other design elements, to facilitate efficient workflow and collaboration within the team.

Desired Skills and Experience

• Good skill in Excel and PPT

• Good skill in Adobe Illustrator and Photoshop

• Pursuing or recently completed a degree in Graphic Design, Visual Communication, or a related field.

• Analytical and quantitative, with strong attention to detail

• Self-starter with excellent communication and collaboration skills, with the ability to work effectively in a team environment.

• Ability to thrive in a fast-paced, ambiguous, interruptive environment

• Ability to work independently as well as work collaboratively toward a common goal

Roles and Responsibilities:

• TCAD modeling, simulation, and innovative design of high power electronics devices, as well as device characterization.
• Develop and simulate high power SiC MOSFETs (planar, trench, Super-Junction MOSFET, IGBT) with a blocking voltage exceeding 1.2K using the industry-standard Synopsys/Silvaco simulator.
• Create and simulate practical & efficient junction terminations.
• Model transport and carrier scattering in devices operating under extreme ambient conditions.
• Serve as a valuable resource for colleagues with lesser TCAD power electronics experience and take lead in group projects with managing risks & resource requirements.
• Foster close collaborations with both internal and external customers to fully understand customer issues and requirements.

Job Requirements:

• PhD Degree in Electrical Engineering or related field.
• >2-3 years industrial experience for high power devices design and modeling.
• Thorough understanding of different types of high-voltage, high-power MOSFETs including Planar, Trench, Super-Junction MOSFETs, and IGBTs, with a focus on design and device characterizations.
• Hands-on skill in designing MOSFET/diode layouts.
• Excellent communication skills to effectively engage with customers, address their needs, resolve issues, and meet demands.

Roles and Responsibilities:

• TCAD modeling, simulation, and innovative design of high power electronics devices, as well as device characterization.
• Develop and simulate high power SiC MOSFETs (planar, trench, Super-Junction MOSFET, IGBT) with a blocking voltage exceeding 1.2K using the industry-standard Synopsys/Silvaco simulator.
• Create and simulate practical & efficient junction terminations.
• Model transport and carrier scattering in devices operating under extreme ambient conditions.
• Serve as a valuable resource for colleagues with lesser TCAD power electronics experience and take lead in group projects with managing risks & resource requirements.
• Foster close collaborations with both internal and external customers to fully understand customer issues and requirements.

Job Requirements:

• PhD Degree in Electrical Engineering or related field.
• >2-3 years industrial experience for high power devices design and modeling.
• Thorough understanding of different types of high-voltage, high-power MOSFETs including Planar, Trench, Super-Junction MOSFETs, and IGBTs, with a focus on design and device characterizations.
• Hands-on skill in designing MOSFET/diode layouts.
• Excellent communication skills to effectively engage with customers, address their needs, resolve issues, and meet demands.

As part of IME Integrated Circuit Design and System Department, we are seeking a candidate with relevant experience in analog integrated circuit design. This candidate will contribute to developing analog circuit blocks e.g. low-power operational amplifiers, voltage/current references, and voltage regulators based on thorough topology analysis. This candidate will work closely with other team members for the circuit design, test verification, as well as system integration and validation for a broad range of innovative sensor systems.

Role & Responsibilities

• Circuit schematic design and simulation, layout supervision, pre-tapeout design verification, test plan development and chip measurement
• Work together with teams to investigate novel circuit/system solutions to create new inventions

Requirements

• Bachelor’s / Master’s degree in Electronic Engineering
• Good understanding of CMOS analog IC design methodologies
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

As part of IME Integrated Circuit Design and System Department, we are looking for a candidate with relevant experience in ultrasound imaging system design. This candidate will define an ultrasound transducer array beamformer IC architecture for imaging applications. The candidate will work closely with MEMS team on system architecture, circuit design, simulation, validation, and integration.

Role & Responsibilities

• Perform system-level beamformer architecture, design, and simulation, to derive circuit-level design specifications.
• Beamforming array optimization using AI algorithms.
• Design and implementation of beamformer algorithm in hardware.
• Work together with team to investigate novel circuit/system solutions to create new inventions.

Requirements

• Master’s / PhD degree in Electrical Engineering or equivalent
• Good understanding of ultrasound imaging systems and beamforming theories.
• Knowledge of AI algorithms and implementation will be a plus
• Familiar with IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

What you do

Be part of the team that validates the physical sign-off of our chips, powering the brands we love every year with 2 billion consumer electronic products such as digital TVs, home audio devices, DVD/Blue-ray players, smartphones, tablets, networking and connectivity products, and many more. As a member of the MediaTek Physical Verification Sign-off team, you will be responsible for ensuring the manufacturability and reliability of IC designs through rigorous physical verification processes to enable the success of our chips tape-out. Join us in shaping the future of technology and making a real impact on the world!

• Responsible for assembling of various design system into a full chip.
• Perform design rule checking (DRC) to identify and resolve System-on-chip layout violations and ensure compliance with manufacturing rules and constraints.
• Conduct layout versus schematic (LVS) verification to ensure the accuracy and consistency between full chip layout and schematic of the IC design.
• Execute electrical rule check (ERC) to identify potential electrical issues and ensure the integrity of the design.
• Perform antenna and electrostatic discharge (ESD) checks to prevent potential reliability, latch-up, leakage issues.
• Collaborate with design and layout teams to address and resolve physical design issues and optimize the layout for manufacturability and reliability.
• Contribute to the development and improvement of physical verification methodologies and flows.
• Work closely with process technology teams to understand and address process-related challenges and constraints.
• Participate in tape-out activities and ensure that the physical design meets the required quality and reliability standards for fabrication.

What you bring

• With minimum 8 years of relevant experience.tronic Engineering / Computer Science or equivalent..
• With minimum 8 years of relevant experience
• Solid understanding of physical design concepts, IC manufacturing processes, and semiconductor device physics.
• Proficiency in using physical verification tools such as Calibre, IC Validator, or other industry-standard DRC/LVS tools.
• Experience with scripting languages such as TCL, Perl, or Python for automation and tool customization.
• Strong problem-solving skills and the ability to analyze and debug complex physical design issues.
• Excellent communication and teamwork skills to collaborate effectively with cross-functional teams.
• Familiarity with EDA (Electronic Design Automation) tools and design methodologies is a plus.
• Proficient in UNIX (Linux) platforms.
• Strong communication skills, problem solving and analytical skills.

Location: One North, Singapore

Who We Are

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact. – Join us now!

What you will do

• Develop and review test plans.
• Develop verification environment/testbench in Module/IP/SOC level.
• Develop verification IP and reference model.
• Implement test with randomization based coverage driven verification methodology.
• Implement functional and functional/code coverage closure.
• Hands-on code/debug with UVM, SystemVerilog, Verilog and SystemC.
• Low Power verification.
• Verification automation flow.
  

What you will bring

• Bachelor's/Master's Degree in EEE/Computer/IC design/equivalent.
• With min. 2 years of relevant experience in similar field.
• With IC/ASIC design verification experience on SOC, Ethernet, PCIe, DDR, USB, ARM CPU.
• Strong experience and debugging ability on SystemVerilog/UVM.
• Skilled in Synopsys/Cadence/Mentor Simulator and debugging flow.
• Experience on Low Power and formal verification is a plus.
• Strong in UNIX scripting with Pyhon, Perl, makefile Cshell.
• Fast learner and a good team player.
• Candidates with more years of experience will be considered for a more senior role.

About the team

Our ASIC DV Team focus on developing full and advanced verification methodology IP/SOC. You will have chance to work on challenging projects that attractive and be immersed in leading tech e.g.: WiFi, 5G, AR/VR, AI, Cloud Networking. A comprehensive program for professional development / career growth will be provided to the new joiner and he/she will have chance to learn from the best expert in this area.In MediaTek, we promote diversity and inclusiveness. Passionate talents who love new challenges and keen on learning new technologies, do send us your cv our way today and join our multicultural team that consists of talents from all over the world!

ROLE DESCRIPTION SUMMARY

Join us as a Project Safety Engineer (PSE), where you will be responsible to perform systems safety engineering activities required to develop a safe solution (mainly a software), product or projects. In this role, you will apply your Safety Engineering skills within an interdisciplinary team covering all aspects of a system lifecycle.

KEY ACTIVITIES AND RESPONSIBILITIES

As aProject Safety Engineer, you are accountable for:

As a Project Safety Engineer, you conduct safety engineering activities and produce the required artefacts on time, budget and quality for the allocated project / product.

This includes:

· Conducting a range of activities that identify and address safety hazards and risks by ensuring compliance to legislations, safety policies and the Thales Solution Safety Management System

· Developing and maintaining safety key artefacts: system safety program plans, safety case reports, hazard logs, risk assessments, preliminary system safety assessments and system safety assessments commensurate with the processes, standards and best practices employed by air traffic management domain including fault tree analysis and GSN

· Work closely with the engineering integrated product teams to identify, derive and manage safety requirements, ensure that they are included in the solution design baseline and that their compliance is demonstrated through verification & validation and developing effective mitigations and controls to hazards, procedure and/or training

· Provide timely safety subject matter expertise and engineering support. This includes participating and/or chairing system safety working groups, safety review boards and other safety committees and workshops as required

· Apply Model Based System Engineering tools and modelling methodologies to define system safety functions and requirements as well as managing safety data

· Escalate risks when necessary, provide clear reporting and recommendations

· Work in accordance with Thales processes and practices, and contribute to their improvement

You will also improve the Safety culture within AMS in Singapore by developing, sharing and/or improving safety training material, delivering training as required and pro-active behaviour.

KEY KNOWLEDGE AND EXPERIENCE

To be successful in your role, you will have demonstrated and/or acquired the following knowledge and experience:

SKILLS & ABILITIES

· Experience in the Systems Safety Engineering process in a safety critical industry such a Defence, Land Domain, Manufacturing, Vehicles, Railway, Aerospace, Nuclear or Oil & Gas

· Demonstrated experience applying industry best practice system safety analysis and operational risk management techniques and methodologies

· Proven track record of successfully leading the execution of system safety programs

· Familiarity with Eurocontrol Safety Assessment Methodology and its system safety engineering processes including core system safety analysis techniques: FHA, PHA, PSSA, SSA, ETA, FTA, HAZOP, FMECA, RAM, etc.

· Experience and understanding of the V-cycle and how/when the safety engineering activities are interfaced with

· Knowledge of international standards of the safety domain: ARP 4761/4754, DO-278A/178C, ED-153

· Excellent problem solving and decision-making abilities, great and positive attitude, ability to learn

· Adapt easily to change to work in an agile system engineering environment to understand a problem and provide optimal solution options in terms of size, scale and complexity

· Able to travel to Melbourne, Australia (a few weeks a year).

EXPERIENCE

· Minimum 10 years’ experience in a similar or adjacent role

· Familiar with management and engineering tools such as DOORS, Polarion, JIRA and FTA tool

· Experienced in top-down (abstract ideation) and bottom-up (detailed implementation) approaches in engineering solutions and can work with colleagues with these views

· Knows the structure of a software and be able to apply safety techniques

· Team player: harmonising, influencing, negotiating, seeking feedback and mentoring / coaching

· Self-driven and highly motivated, passionate about systems safety engineering and continual process improvement to achieve optimal outcomes for all stakeholders

· Keen to grow product and process knowledge over time, to enhance your capabilities as a System Safety Engineer within the given environment of practice

· Knowledge of ‘design-to-cost’ approach means and can quickly preform a cost-benefit analysis to different methodologies before executing a system engineering task

· Excellent written and oral communication skills in English

QUALIFICATIONS

· Engineering or Computer Science degree

· System Safety degree

DESIRABLE

· Understand and application of RAMS techniques such as RBD, life data analysis, MTTF, MTBF, MTTR, FMECA

· Knowledge of transverse engineering disciplines: human factor and cyber-security and their links with safety engineering

· Experience in the development of software products and projects in a variety of methodologies, with a particular focus on iterative/agile development

· Conduct independent safety assurance activities including auditing

· Experience in the ATM Domain and related standards (ICAO)

· French language knowledge

General / Special Requirements

· Assist in ensuring a harmonious work environment in all departments that you are working with by upholding Thales' key values.

· An advocate for diversity and inclusion who will be actively involved in implementing change initiatives to achieve our diversity goals

· An advocate for a culture of continuous improvement

· An advocate for Accountability, transparency and curiosity

· Comply with all relevant company Occupational Health, Safety and Environmental policies and framework and work practices with the intent of preventing or minimising accidental exposures to self, colleagues, visitors and/or the environment and to ensure a safe work practises at all times.

· Comply with all relevant Company policies and procedures.

SPECIAL REQUIREMENTS

· Occasional international travel may be required

DesCartes Program (work package 9) is looking for research assistant in UI/UX design and library development. The objective is to develop a user interface and implement libraries as required for the DesCartes Builder, a novel open-source framework for designing, validating, and integrating innovative hybrid AI models and methodologies.

DESCARTES PROGRAM

The DesCartes programme is developing a hybrid AI, combining Learning, Knowledge and Reasoning, which has good properties (need for less resources and data, security, robustness, fairness, respect for privacy, ethics), and demonstrated on industrial applications of the smart city (digital energy, monitoring of structures, air traffic control).

The program brings together 80 permanent researchers (half from France, half from Singapore), with the support of large industrial groups (Thales SG, EDF SG, ESI group, CETIM Matcor, ARIA etc.).

The research will take place mainly in Singapore, at the premises of CNRS@CREATE, with a competitive salary and generous funding for missions.

Read more about the DesCartes program here.

DESCRIPTION

To facilitate the development of the next generation of urban systems, the DesCartes Program is currently developing a software framework that brings together AI components, physics models and data, modelization and control aspects. This framework, the DesCartes Builder, shall play an integral role in developing robust hybrid AI pipelines, as required for the design and deployment of digital twins of urban applications. As a research assistant, you will play a key role in developing the Builder:

• Craft a user-friendly interface:Design an intuitive interface that allows users to define, manipulate and execute the hybrid AI pipelines with flexibility and ease.
• Develop reusable components: Create robust and reusable libraries that will form the foundation of the DesCartes Builder framework.

EXPERIENCE & QUALIFICATIONS

• Minimum Requirements Bachelor or Master in computer science or engineering.
  A first relevant professional experience (master, internships…).
• Required Skills: Rigor, ability to work with autonomy and with a results-oriented mindset.
  Good interpersonal and communication skill; teamwork.
  Knowledge of Python and basics of machine learning
  Basics of UI/UX design
• Preferred Skills: Strong software engineering skills and development methodologies
  Experience with UI/UX design and UI libraries such as Qt,
  Knowledge of C++ & software optimization,
  Experience with Linux development environment (bash, make, etc.),
  Familiarity with machine learning and deep learning libraries (PyTorch, scikit-learn, etc.).
• Keywords: software engineering
  user interface
  library development
  human computer interface
  machine learning
  artificial intelligence

FURTHER INFORMATION & CONTACT

Gross Monthly Salary Range (SGD): 5,500 to 8,000 (depending on suitability and experience).

Workplace address: CREATE Campus, CREATE Tower, 1 Create Way #08-01 Singapore 138602.

Interested applicants, please send your application to:

• Blaise Genest (Prof): [email protected]
• Eduardo de Conto: [email protected]
• DesCartes – Hiring: [email protected]

Please send your application as a single PDF file including CV, cover letter and name/contact (including email addresses) of two referees.

The Bioinformatics Institute (BII), Agency for Science, Technology and Research (A*STR) is seeking applications for an outstanding scientist in the field of quantum computing.

The Bioinformatics Institute (BII) is a computational biology research and postgraduate training institute as well as a national resource centre in bioinformatics within the Biomedical Research Council (BMRC) of A*STAR. Our scientists aim to understand the biomolecular mechanisms that underlie biomedical phenomena by developing sophisticated computational methods to support discovery from a secure and sustainable data hub to cross-disciplinary AI/ML analysis and data integration. We analyse a wide spectrum of biological and clinical data, including omics data (biomolecular sequences, expression profiles, epigenetics data), 3D structures of macromolecules, and biological tissue and macroscopic images from local and international academic, hospital and industry collaborators, public resources and also from in-house efforts. The institute has a vibrant and diverse research portfolio that includes infectious diseases, computational toxicology, precision medicine, oncology and drug discovery.

Job scope and responsibilities:

· Lead efforts in using quantum computing to analyze biomolecular and biomedical data (e.g. protein-ligand interactions, molecular docking, protein/RNA folding, molecular dynamics simulations, imaging, spatial ohmics) and couple it with methods such as quantum machine learning, quantum monte carlo etc, contributing to the development of a broader initiative encompassing AI in drug discovery.

· Collaborate closely with scientists within the Bioinformatics Institute, within A*STAR and within the local ecosystem.

· Lead or participate in research grant proposals.

Requirements:

· Minimum PhD in a related field.

· 2 years or more of postdoctoral experience in quantum computing, demonstrating outstanding research outcomes and strong publication records.

· The candidate must have experience in quantum computing software development/applications, especially with NISQ machines.

· Excellent communication (oral and written) and public speaking skills.

· Strong records of strategic thinking ability.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The Bioinformatics Institute (BII), Agency for Science, Technology and Research (A*STR) is seeking applications for an outstanding scientist in the field of quantum computing.

The Bioinformatics Institute (BII) is a computational biology research and postgraduate training institute as well as a national resource centre in bioinformatics within the Biomedical Research Council (BMRC) of A*STAR. Our scientists aim to understand the biomolecular mechanisms that underlie biomedical phenomena by developing sophisticated computational methods to support discovery from a secure and sustainable data hub to cross-disciplinary AI/ML analysis and data integration. We analyse a wide spectrum of biological and clinical data, including omics data (biomolecular sequences, expression profiles, epigenetics data), 3D structures of macromolecules, and biological tissue and macroscopic images from local and international academic, hospital and industry collaborators, public resources and also from in-house efforts. The institute has a vibrant and diverse research portfolio that includes infectious diseases, computational toxicology, precision medicine, oncology and drug discovery.

Job scope and responsibilities:

· Lead efforts in using quantum computing to analyze biomolecular and biomedical data (e.g. protein-ligand interactions, molecular docking, protein/RNA folding, molecular dynamics simulations, imaging, spatial ohmics) and couple it with methods such as quantum machine learning, quantum monte carlo etc, contributing to the development of a broader initiative encompassing AI in drug discovery.

· Collaborate closely with scientists within the Bioinformatics Institute, within A*STAR and within the local ecosystem.

· Lead or participate in research grant proposals.

Requirements:

· Minimum PhD in a related field.

· 5 years or more of postdoctoral experience in quantum computing, demonstrating outstanding research outcomes and strong publication records.

· The candidate must have experience in quantum computing software development/applications, especially with NISQ machines.

· Excellent communication (oral and written) and public speaking skills.

· Strong records of strategic thinking ability.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Job Purpose:

The Art Teacher is responsible for developing each child interest in arts and the ability to express their artistic ability and creativity, to acquire knowledge and aesthetic understanding, to nurture and develop talents.

Job Responsibility:

• Prepare course materials and execute planned art curriculum lessons in group settings.
• Educate and nurture child to express artistic ability, creativity through principles of art and techniques.
• Demonstrate art techniques in activities including drawing and painting.
• Provide guidance by which children develop aesthetic concepts and appreciations.
• Guide and explain to children on proper care and use of art materials and tools.
• Adopt supportive classroom approach which facilitates positive learning and development.
• Encourage children to express their own personalities and thoughts through creative process.
• Evaluate each child’s performance and growth in knowledge and aesthetic understandings.
• Provide quality feedback on child’s development progress.
• Participate in campus events including parent meeting sessions and festive events.
• Perform any other duties and responsibilities as assigned by the Art Teacher (Supervisor).

Job Requirement:

• Possess Diploma or Bachelor degree in Arts or equivalent.
• Prior experience working in classroom setting is an added advantage.
• Candidates who are innovative, highly driven and take initiative are encouraged to apply.
• Passionate in engaging, teaching and developing children.

Working Hours (43 hours per work week):

Mon : off

Tuesday - Friday : 1.30pm - 7.30pm

Saturday and Sunday: 9.00am - 7.30pm

Looking forward on your resume. Please drop your resume to [email protected].

Regret to inform you that only shortlisted candidates will be notified.

UWCSEA Dover has a vacancy for August 2025 for a Teacher of High School and Middle School Design Technology.

The successful candidate must be experienced and passionate about teaching Design and Technology. The role will include teaching both High School and Middle School aged students in curriculum areas such as Product Design, Food Technology, Electronics and Digital Design. At UWCSEA we offer our own bespoke Design Technology and Food Technology courses in Middle School and in Grades 9 and 10. We offer the IB Diploma, Design Technology courses at Higher and Standard Level, in Grades 11 and 12.

The Design Technology Department is composed of a team of enthusiastic and dynamic teachers who work in a very well ­resourced environment for learning. Teaching takes place in dedicated and well resourced Design Technology classrooms and is supported by skilled technicians.

Main Responsibilities

• Teachers should be willing to contribute positively to the collaborative culture of the Design Technology department and broader Middle and High School teams.
• Teachers should construct learning experiences that challenge and inspire students, support the diversity of learners in each classroom and demonstrate a strong commitment to concept-based teaching and learning.
• Teachers should ensure assessments support ongoing learning and provide timely, relevant, and appropriate feedback to students on formative and summative assessments.
• Teachers should demonstrate effective classroom management that shows an understanding of the academic, social, and emotional dimensions of learning.
• Teachers should keep parents informed about the learning of their children, and be proactive in communication with parents.

Expectations and Standards

• Follow the UWCSEA Professional Code of Conduct and Safeguarding Code of Conduct.
• Teach in line with the UWCSEA Teacher Standards

Person Specifications

• A good degree in Design and Technology or a closely related discipline and a recognized teaching qualification or certification are expected.
• Previous experience of teaching Design and Technology in the 11-18 age range is required.
• Teachers should be willing and eager to participate in the five key elements of a UWCSEA education: Academics; Activities; Outdoor Education; Personal and Social Education, and Service.
• Academic expectations include enthusiastic participation in Professional Learning.
• Pastoral expectations include the leadership of a Mentor group.
• On average the College expects a yearly contribution of two sessions per week in each season to Activities and/or Service.
• The College expects that teachers will participate enthusiastically in the curricular Outdoor Education experiences which are relevant to their students and will also occasionally volunteer for holiday Outdoor Education trips.
• A commitment to diversity and inclusion is essential alongside a willingness to adapt and develop pedagogy to meet the needs of our learners.

Applications

The UWC Mission is to make education a force to unite people, nations and culture for peace and a sustainable future. We are committed to creating a community in which all members feel safe and secure, and know that their authentic selves and individual differences are accepted with respect and care. At UWCSEA, we acknowledge that diversity, equity, inclusion and justice (DEIJ) is an ongoing and evolving process and strive to create and sustain a sense of belonging for all members of our community, past, present and future. All qualified applicants, including those who identify as a part of marginalized group(s) and individuals with (dis)abilities are all encouraged to apply. Our school is committed to safeguarding and promoting the welfare of all the students in our care and expects all applicants to share this commitment. We follow safe recruitment practices and all appointments are subject to interview, satisfactory references, identity and criminal record checks.

Responsibilities:

Design mould, tooling and test socket solutions based on customer specifications, semiconductor packages, and testing requirements.

Utilize CAD tools (such as CREO, AutoCAD, SolidWorks, or similar) to create detailed 3D models and technical drawings.

Ensure designs meet mechanical, thermal, and electrical performance requirements for high-precision semiconductor testing.

Select appropriate materials, tolerances, and manufacturing methods to ensure product durability, precision, and cost-effectiveness.

Able to carry out the R&D of new test socket whenever the market trend is needed.

Work closely with cross-functional teams, including Sales, Product Development, Process Engineering, and Manufacturing, to refine designs and ensure compatibility with testing equipment and processes.

Provide technical support to manufacturing teams during prototyping, production, and assembly to resolve any design-related issues.

Engage with customers and vendors to ensure all moulds, tooling and test socket solutions meet functional requirements and industry standards.

Oversee the prototyping phase, ensuring that initial designs are built and tested effectively.

Lead or participate in validation and testing efforts to ensure the tooling and test sockets perform under specified conditions (e.g., temperature, mechanical stress, electrical signals, thermodynamics).

Analyse test data and provide feedback for continuous improvement in design and materials.

Continuously seek to improve design efficiency and product performance, optimizing socket contact interfaces, reducing testing time, and improving signal integrity.

Innovate by introducing new design techniques, materials, or technologies that improve the quality, reliability, and cost of the test sockets and tooling solutions.

Stay up-to-date with the latest semiconductor technologies and testing methodologies to ensure cutting-edge designs.

Develop and maintain comprehensive documentation for all designs, including detailed engineering drawings, materials specifications, and manufacturing processes.

Create user manuals and technical documentation to guide customers and internal teams on the proper usage of tooling and test sockets.

Qualifications:

At least Bachelor’s degree in Mechanical Engineering, Electrical Engineering, or related field.

5+ years of experience in mould & tooling design AND test socket design within the semiconductor industry or a related field.

Proven experience in designing test sockets, jigs, fixtures, and other related components for semiconductor testing.

Proficiency in & Hands-on experience with CAD software for mechanical design and simulation (e.g., CREO, SolidWorks, or AutoCAD).

Understanding of semiconductor testing processes and requirements (ATE – Automated Test Equipment).

Strong mechanical design and analytical skills.

Knowledge of materials science, particularly in relation to thermal management, wear resistance, and conductivity in socket designs.

Familiarity with signal integrity, high-speed test interfaces, and electrical characteristics relevant to test socket performance.

Excellent problem-solving skills, with the ability to identify and address complex technical challenges.

Strong attention to detail and precision in design and documentation.

Ability to work independently and as part of a cross-functional team.

Familiarity with industry standards for semiconductor testing (JEDEC, EIA, etc.).

Effective communication skills for both internal team coordination and customer interactions.

Willingness to travel occasionally for customer visits, manufacturing site inspections, or vendor meetings.

What you will do

• APU Physical Design Implementation for APU partitions focus on MDLA/NDLA n5/n4/n3e/ process
• Physical VerificaTion to deliver clean APU partition gds N5/n4/n3e/ process
• Perform Timing Closure ECO for APU partition including PrimeTime timing check and twk timing ECO

What you bring

• Apr hands on for n5/n4/n3e process using Innovus and Fusion compiler EDA tool
• tcl/csh/perl/bash. programming skill
• Timing Analysis Debugging and Fixing skills
• Experienced N4/N3e process

Interested applicants are invited to apply directly at the NUS Career Portal

Your application will be processed only if you apply via NUS Career Portal

We regret that only shortlisted candidates will be notified.

Job Description

• The Research Fellow will work closely with the Principal Investigator, Dr. LIN Yiliang, on the research project of bio-interface design between living systems and materials for healthcare and sustainable applications.
• The Research Fellow will help to develop living materials system integrating functional hydrogels with microorganisms, perform material characterization, and investigate the real-world applications.

Job Requirements

• A PhD degree in a relevant area, e.g., Chemical Engineering, Material Science and Engineering, Chemistry, Biomedical Engineering;
• Good publication record;
• Experienced bio-interface design, construction of living materials, materials characterization, and cell culture.
• Any experience with 1) animal experiments, 2) advanced characterization techniques, and 3) soft matter mechanics and physics, is a plus
• This position is available from Jan 2025

DUTIES & RESPONSIBILITIES

• Repair and maintain, equipment and machines of cold room and ice maker
• Installation of chiller room,freezer room and troubleshooting chiller unit,freezer unit and ice maker
• Troubleshoot systems to determine causes and rectify.
• Service and repair kitchen equipment at work shop such as chiller, freezer ,ice maker ,bracing pan, water boiler, combi oven, dough mixer, spiral mixer and etc
• Prepare quotation and evaluate costing and propose to client.
• Ability to run a team and be responsible for installing and maintaining Cold-room projects.
• Dismantle and replace worn or defective equipment.
• Perform mechanical overhauls and refrigerant reclaiming.
• Install expansion and control valves, compressor, condenser and other components
• Top up gas to the systems
• Keep record of repairs and job schedules.
• Maintain tools and spare parts in good order.
• Practise safe and healthy working behaviour and report hazards and unsafe act.

Candidate Requirements

• Bachelor’s degree in Mechanical Engineering, HVAC Engineering, or a related field.
• Proficiency in CAD and AUTOCAD software.
• Strong knowledge of refrigeration, insulation, and energy-efficient design principles.
• Class 3 driving license is an advantage, but not necessary.
• Able to speak and write English.
• Knowledge of electrical wiring and mechanical works.
• Job requires heavy lifting, climbing and handling of materials
• Able to perform overtime and stand by for emergency
• Manage a team with proper guidance and team framework

Interested candidates are invited to send us an updated resume with your current and expected salary and earliest availability to [email protected]

Job Descriptions

• Work closely with Technical Engineer to translate customers' requirements into detailed drawings for tender submission, projects, etc.
• Ensure drawings meet relevant code and compliance requirements
• Rectify and update latest drawings accordance to changes
• Maintain good document control - ensuring drafting list record is always up to date
• On site measurement if required

​ Job Requirements :-

• Min. 3 years of experiences in Aluminium / Construction / Architectural or relevant industry
• ITE / Diploma in Civil Engineering / Structural / any other relevance qualification
• Proficient in AutoCAD
• Strong sense of accountability and ability to quickly prioritize tasks based on urgency in a fast paced environment
• Excellence analytical, communication, organizing and interpersonal skills
• Independent but also a team player