As a NAND CMOS Device Engineer, you will help set the direction for current and future CMOS technology for Micron’s NAND Memory Technology Roadmap!

You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few! In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.

Together with your peers, you craft and implement our NAND-CMOS roadmap and make sure to align to product roadmaps

• You give directions on how to improve our device portfolio, both in performance and cost effectiveness
• You define, execute, and analyze silicon experiments for future device generations
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets
• You strive to ensure that transistor models are correctly targeted to anticipate final silicon
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
• Highly motivated to ensure transistors are developed meeting the required reliability standards
• You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
• You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues

Minimum Qualifications:

• MS/PhD in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
• 5 plus years industry experience in the field of CMOS device design, simulation, characterization
• Experience in developing advanced logic transistor technologies
• Experience in developing Analog FETs operating at higher Voltages
• Preferred: Experience in the field of High Voltage applications, reliability, characterization, device development
• Understanding of analog design concepts
• Good presentation skills
• Excellent team and mentoring skills

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities
• Install equipment and/or CIP hardware for evaluation by the process development team to enable early introduction, maturity, and adoption for current and next node of 3D NAND technology.
• Work with the Fab layout and facility team to ensure smooth and on time installation and operation of the equipment.
• Work with process development team to quantify benefits of equipment/CIP hardware.
• Develop and optimize existing equipment hardware to meet the productivity requirements of advanced 3D NAND parts.
• Participate with Boise TD equipment development peers on technology choices for the upcoming nodes and able to translate future technology needs into clear equipment requirements.
• Identify disruptive equipment early, work with manufacturing and Boise TD to identify viable evaluation path forward in manufacturing.
• Design and implement advanced equipment monitoring and control methodologies.
• Lead team or sites or suppliers on complex projects in focused meetings with end goal of maturity an equipment technology in record times for technical advantage, cost and productivity.
• Serve as a technical expert within Micron, provide advice and recommendations to senior management on improvements from equipment development. Lead and initiate innovation projects through patents/technical papers.
• Identify and resolve safety hazards; follow safety procedures including lockout, chemical safety, lifting techniques and ergonomically correct methods.

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above
Location: Fab10N
Closing Date: Until filled

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Responsibilities

• Process module ownership involving regE process characterizations and advanced process developments for 3D NAND and beyond.
• Work with process development engineers in Singapore and Boise, US TD site and vendors to develop regE processes that meet integration requirements for next-generation 3-D NAND nodes.
• Transfer regE processes to high volume manufacturing (Fab10), and work on continuous improvements to manufacturability.
• Address specific wafer edge issues (such as bevel defects, uniformity issues), working with Fab10N team and with key business partners on tool choices for manufacturing, evaluations etc., as applicable.
• Focus on understanding and improving regE process margins required for meeting the mature yield goal for 3D NAND parts.
• Initiate and manage experiments to widen regE process margins as well as to test out manufacturability of next node solutions
• Incorporate best known manufacturing methods into early development phase of upcoming nodes.
• Design and implement advanced process monitoring and control methodologies.
• Serve as a technical expert within Micron contributing to technical projects for improvements to processes, procedures and equipment.
• Define and leads complex, multi-functional projects of critical importance to Micron, helps to define strategic direction.
• Lead team or sites or suppliers on complex, multi-disciplinary projects in quality focused meetings, process and yield improvement meetings, cost and productivity improvement meetings
• Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers.
• This position requires communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Be part of the continuous worldwide TD engagement with suppliers pushing for breakthrough solutions.

Requirements

• Bachelors’ degree or higher in Materials Science, Chemical Engineering or Physics with minimum 2 years hands-on experiences in relevant regE process developments.
• Familiarity with regE process developments and yield improvements.
• Understanding of various integration and structural impacts and constraints related to wafer edge.
• An understanding of the general process steps and process flow for memory processing, planar and vertical NAND memory in particular.
• Working knowledge of data analysis systems e.g.: Y3 to facilitate analysis of experimental data
• Working knowledge of Design of Experiments (DoE)
• Proven ability to collaborate with local and overseas teams on projects
• Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications.
• Ability to be a self-motivated individual and be adaptable to Micron’s changing needs in terms of working extended hours, if required
• Proven ability to work in a demanding & dynamic environment and able to prioritize and manage multiple projects simultaneously
• Ability to travel for extended periods of time and stay at Boise TD for 4-6 months at a stretch to work on technology development.

As a NAND CMOS Device Engineer, you will help set the direction for current and future CMOS technology for Micron’s NAND Memory Technology Roadmap!

You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few! In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.

Together with your peers, you craft and implement our NAND-CMOS roadmap and make sure to align to product roadmaps

• You give directions on how to improve our device portfolio, both in performance and cost effectiveness
• You define, execute, and analyze silicon experiments for future device generations
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets
• You strive to ensure that transistor models are correctly targeted to anticipate final silicon
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
• Highly motivated to ensure transistors are developed meeting the required reliability standards
• You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
• You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues

Minimum Qualifications:

• MS/PhD in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
• 5 plus years industry experience in the field of CMOS device design, simulation, characterization
• Experience in developing advanced logic transistor technologies
• Experience in developing Analog FETs operating at higher Voltages
• Preferred: Experience in the field of High Voltage applications, reliability, characterization, device development
• Understanding of analog design concepts
• Good presentation skills
• Excellent team and mentoring skills

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

As a Senior NAND Cell Device Engineer, in the Singapore Device Technology Development group of Micron Technology Inc., you will be responsible for electrical characterization of the NAND memory cell and develop novel device solutions for cutting-edge 3D-NAND flash technologies. You will have an exciting opportunity to develop best-in class non-volatile memories and products in the world!

Job responsibilities:

• Develop an understanding of performance & reliability requirements for new NAND cells and help refine requirements, as necessary.
• Characterize NAND Memory cell and array properties to identify device improvement directions.
• Analyse automated tester data to establish product qualification gaps, identify new device corners and improve detection capabilities.
• Contribute to the architecture and process definition for state-of-the-art NAND cell, by providing expertise in NAND device physics and array operation.
• Collaborate effectively with process, integration, product, and design engineers, to address NAND memory cell deficits and deliver improvement roadmaps.

Requirements:

• M.S or Ph.D. in Electrical or Electronics Engineering, Physics or Materials Science Engineering or similar.
• 3+ years of work experience in CMOS or non-volatile memory is preferred.
• Deep understanding of semiconductor device physics and processes.
• Knowledge of statistical methods for experiment design and data analysis.
• Solid communication and reporting abilities.
• The ability to be highly skilled at driving for results.

As a Process Engineer you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology. Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization/development to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with equipment/material suppliers to achieve yield, quality, cost and risk management objectives.

Micron’s NAND Technology Integration (NTI) Singapore R&D group is looking for process development engineer to support R&D activities associated with rapid deployment of technology nodes, the process margin improvement work necessitated thereof as well as to ensure extended engagement with manufacturing on the upcoming technology nodes.

Responsibilities

• Develop and optimize unit processes to meet the yield and quality requirements of advanced NAND products.
• Quantify benefits of innovative process and/or equipment solutions to enable early experimentation and adoption for process margin improvement
• Prioritize within Singapore based manufacturing CVD/PVD teams on the key technology issues that need R&D breakthroughs.
• Integrate and troubleshoot processes as part of cross-functional teams driving yield and quality improvement
• Participate with Boise R&D Films peers on technology choices for the upcoming nodes and able to translate future technology device needs into clear process requirements
• Identify disruptive processes early on and work with manufacturing and Boise R&D to identify viable path forward
• Process development will include performing fundamental research, hardware evaluations, as well as testing processes for novel applications and generating intellectual property relevant to Micron.
• Initiate and manage experiments to widen process margins as well as to test out manufacturability of next node solutions
• Identify process simplification opportunities and drive cross functional teams in implementation
• Incorporate best known manufacturing methods into early development phase of upcoming nodes.
• Design and implement advanced process monitoring and control methodologies.
• Serve as a technical expert within Micron contributing to technical projects for improvements to processes, procedures and equipment.
• Lead team or sites or suppliers on complex, multi-disciplinary projects in quality focused meetings, process and yield improvement meetings, cost and productivity improvement meetings
• Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers.
• This position requires communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Be part of the continuous worldwide R&D engagement with suppliers pushing for breakthrough solutions.

Requirements

• Master degree or higher in Materials Science, Chemical/Microelectronic Engineering, or Physics with minimum 3 years hands-on experience in leading edge film deposition/implant technology work. Fresh PhD/Masters graduates in Materials Science, Chemical/Microelectronic Engineering or Physics are also welcome to apply.
• A deep understanding of chemical kinetics, thermodynamics, physical phenomena and their direct application to CVD/PVD deposition in various deposition methods.
• An ability to understand and troubleshoot precursor depletion effects within three dimensional structures and come up with innovative ideas to mitigate the effects.
• Basic understanding of films and interface engineering and analysis techniques thereof – SIMS, XPS, EDX, SEM/TEM.
• Understanding of various integration and structural impacts and constraints related to film deposition processes.
• An understanding of the general process steps and process flow for memory processing, planar and vertical NAND memory in particular.
• Working knowledge of data analysis systems e.g.: Y3 to facilitate analysis of experimental data
• Working knowledge of Design of Experiments (DoE)
• Proven ability to collaborate with local and overseas teams on projects
• Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications.
• Ability to be a self-motivated individual and be adaptable to Micron’s changing needs in terms of working extended hours, if required
• Proven ability to work in a demanding & dynamic environment and able to prioritize and manage multiple projects simultaneously
• Ability to travel for extended periods of time and stay at Boise R&D for 4-6 months at a stretch to work on technology development.

FE Central Product Integration Engineering (CPIE) HPM PI Engineer

As FE CPIE HPM (High Performance Memory) PI Engineer at Micron Technology, Inc., you will be responsible for working with global Micron network to drive HPM Product yield, quality improvement, new product introduction (NPI) through technical expertise, business process management and project execution.

Responsibilities and Tasks

• Promote worldwide synergy for improved benchmark performance and efficiency gains through global project management and execution, network BKM leveraging and enhancement, and business process creation and re-engineering.
• Active engagement with PI Loop taskforce and/or team in network to address yield and quality challenges, optimize process flow in a timely manner to achieve BIC yield performance.
• Maintain and enhance domain knowledge and technical expertise, explore innovation opportunities with strategic thinking and systematic approach.
• Maintain a strong and open relationship with peer group and managers in other functional areas within central team and outside in areas such as Fab, TD, Product Engineering, GQ. Communicate and respond to issues in a timely manner. Help drive to fix the issue where necessary.
• Demonstrate ability to give effective presentations to both small and large groups on project updates and new initiative proposals.
• Periodically follow up with manager to ensure all type of goals are met and get assistance to remove obstacles.
• Travel to Micron Fab locations as necessary for face-to-face collaboration for program requirements.

Requirements

• Background in electrical engineering, materials science, transistor physics and semiconductor process knowledge.
• Experience with Semiconductor Device Physics, DRAM operations, wafer fabrication process flows, parametric/electrical test, and probe yield will be an added benefit to this position.
• Good data analysis, troubleshoot, problem solving, reporting and presentation skills.
• Good multi-tasking, verbal, and written communication skills.
• Strong interpersonal skills and customer/co-worker relationships. Successfully demonstrated teamwork skills with a strong focus on developing good team dynamics.
• Good organizational capabilities and ability to work effectively with minimal supervision.
• Intermediate to advanced PC skills including Microsoft Office.
• Ability to be flexible with job responsibilities and take the initiative to assume added responsibilities.
• Travel Required: Yes. Willing to travel as needed to support department goals
• Travel Frequency: 20-50%.

Education

• Bachelor’s degree and above in Electrical Engineering, Microelectronics, Physics, Chemistry, Materials Science or related field of study

Your primary responsibilities will be:

• Risk assessment of NAND cell reliability, identification of the process/trim/test strategy to bridge the gaps for JEDEC and internal product qualification.
• Design experiments to identify and segment the limiting reliability mechanisms impacting NAND quality.
• Design high volume electrical experiments (both wafer level and component level) and perform statistical data analysis to validate process/trims solutions required to close reliability gaps.
• Update management and provide continuous feedback to process development and product engineers on the NAND reliability status and roadmap to bridge gaps.
• Contribute to develop forward looking technology path finding for next NAND generation, including reliability risk assessment and product capability projections, identify innovative design and product features required to meet quality specification.

Required skills:

• Proven experience with NAND device structures, operations and algorithms
• Knowledge and understanding of electrical properties of semiconductor and insulator materials, semiconductor device physics and solid-state physics
• In-depth understanding of physics-based modeling of non-volatile memory and semiconductor devices failure mechanisms, reliability analysis
• Knowledge and understanding of statistical analysis and numerical computing software (Matlab, Octave, JMP)
• Knowledge and ability of scripting languages (C, C++, Matlab, Perl)
• Familiar with Big Data and database queries
• Knowledge of JEDEC standards

As a Senior- level Device Engineer in Micron's Front End Central Process Integration Engineering (cPIE) team, you will co-work with the global Micron network on improving Device performance to meet product yield and quality requirements, through optimizing process steps, reducing device variability, optimizing design layout or test specs, and standardizing device engineering business process and working methodology. The primary focus could be either DRAM or NAND flash memory when needed.

Requirements:

• Bachelor's degree with a minimum 5 years of relevant working experience is required. Master's or Ph.D. degree in Physics or Engineering areas is preferred.
• Working experience in fab process or process integration or test engineering. Direct experience in CMOS or NAND/DRAM memory device engineering is preferable.
• Require proven knowledge in semiconductor physics and understanding of transistor operations, scaling limitations and reliability, basic knowledge of CMOS circuits and characterization methods. Experience in advance transistor architectures such as High-K metal gate or FinFET or GAA is preferred.
• Deep understanding of at least one semiconductor fabrication process area, including tool sets, process mechanism, tuning knobs, etc.
• Excellent data analysis skills using at least one software (JMP, SPOTFIRE, etc).
• Strong task ownership, self-motivated to work with other team members to make progress collaboratively.
• Open-minded attitude to learn new skills and could adapt to new working environment swiftly.
• Good communication skills. Proficient in English (speaking and written). Working-level communication capability in Mandarin Chinese OR Japanese is preferred.
• Good digital literacy with MS office. Programming capability such as Python is a plus.
• Occasional domestic and international business travel is required.

Job responsibility:

cPIE Device Engineer, responsible for product yield and quality improvement, by working collaboratively with Micron global network, to improve device performance, standardize business procedure and working methodology.

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities

• Leading the design, development and characterization of new tools and identifying and closing any hardware and procedural gaps.
• Innovate solutions that enable best in class performance
• Oversee installation and upgrades of tools ensuring quality of work, cost control and alignment to project schedule.
• Engage equipment vendors to improve current products and implement roadmap needs.
• Work with Process Engineers, Manufacturing, Procurement, and Vendor partners to develop a comprehensive package capable for our volume manufacturing sites.
• Generating and maintaining documents that outline equipment performance, operating procedures, maintenance specifications, and cost metrics.
• Support Internal And External Audits

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above

Location: Fab10N

Closing Date: Until filled

About Us:

Micron is a global leader in memory solutions, groundbreaking transformative technology that shapes how the world uses information to enrich life for all. With a history spanning over 40 years, Micron has been instrumental in major technological advancements, providing efficient memory and storage systems for diverse applications. As the world transitions to an economy where data drive value creation, Micron plays a pivotal role, with data becoming the new business currency, and memory and storage are strategic differentiators that redefine how we extract value from data, enriching lives globally and redefining society. Micron is also committed to sustainable development, focusing on employee health and safety, environmental quality, and community support.

Main Responsibilities:

Reporting to the Senior Director, Supply Chain Optimization, you will play a pivotal role in optimizing end-to-end inventory and exceeding customer delivery performance expectations. This role is essential for uncovering rich and actionable inventory insights, ensuring working capital is accurately deployed, and delivering outstanding customer experience. You will lead global teams which are responsible for alignment of customer service level targets to demand segments, multi-echelon inventory optimization, cross functional facilitation to improve inventory health, disposition of impaired inventory, management of customer stated lead time policies, and inventory reserves management.

Other Responsibilities:

• Lead and develop the Inventory Optimization, Inventory Management, and Customer Service Level teams.
• Oversee multi-echelon inventory optimization and other supply chain policy management.
• Measure inventory health and implement proactive and reactive strategies for improvement.
• Define and manage structural Days Inventory Outstanding (DIO) targets.
• Facilitate multiple cross functional inventory and service level forums.
• Collaborate with Assembly & Test, Quality, Engineering, and New Product Operations teams to improve inventory processes.
• Be responsible for quarterly reserves and write-down processes for raw materials, in partnership with Finance.
• Monitor and improve customer service levels, balancing inventory levels to meet service expectations without compromising financial performance.

You Are:

• An outstanding leader with a consistent track record in leading supply chain, industrial engineering or relevant areas, with strong analytical and problem-solving skills, and the ability to drive critical initiatives in a highly organized and adaptable manner
• Possess a Bachelors’ Degree or above and at least 12 years of work experience across key business functional areas such as inventory management, supply chain, manufacturing or a related field.
• Strong understanding of semiconductor product and manufacturing processes.
• Excellent interpersonal skills with the ability to work & collaborate at all levels and influence partners without direct authority.
• Passionate about driving improvements and achieving operational excellence.
• The ability to form collaborative partnerships with internal and external partners.

When you join MSB Industrial Engineer (IE) team, you will be learning the skills for capacity modeling, capital planning & execution and factory commit. In the course of work, you'll be exposed to counterparts from a diverse range of backgrounds and teams and will have opportunity for contributing to the organization while learning from each other. You're also part of the team that produce data and analyses supporting factory critical metrics decision making that include (but not exhaustively) capital expenditure, loading (revenue) commit and equipment performance improvement activity, Some aspects of the work are below

Modeling

• Perform line study for setting up capacity model
• Apply statistical analysis to acquire model parameters and Factory Operation related buffer strategy
• Work with relevant teams for auditing and updating model parameters (utilization, UPH, overhead, etc)
• Maintain Factory Planning Master Data in a manner that supports capacity analysis, factory scheduling, supply planning and multi-functional reporting needs
• Use Microsoft Excel and other applications to supplement standard model for quick turn-around analysis

Strategic Planning

• Maintain robust database of key improvement activities and equipment delivery
• Perform capacity analysis loading plan for setting boundary condition, submitting capital requirement and requesting key activities for throughput improvement
• Perform bottoms-up analyses of approved loading and modeling changes
• Coordinate space planning for incoming tool with facility, relevant equipment and manufacturing team members
• Engage in factory space optimization and network capital optimization by identifying under-utilized/obsolete capacity for transfer, re-sale and/or scrap

Factory Commit

• Engage in weekly factory commit activity in collaboration with Factory Planning and Operation teams (current quarter / rolling 13 weeks), and Central Planning teams (up to 9 months)
• Submit equipment and tooling purchase request and coordinate downstream activities: PO release, space enablement, delivery and production release
• Comprehend Tactical Operation constraint in identifying dynamic constraint workstation for robust factory loading commit
• Collaborate with Strategic Scenario and Capital Planning team on investigation of tactical boundary condition comparison with strategic boundary condition

Capital Planning

• Take charge of capacity related capital and Off-Capital items through capital lifecycle: proposal à disposal through appropriate business process and in timely manner
• Strive for capital optimization through network balancing
• Maintain capital related information in system and offline database for own area (capacity and non-capacity related) in robust manner

Space Planning

• Collaborate with Facility IE team on detailed space enablement plan for incoming tools
• Maintain database of incoming and excess tool list for communication with Facility IE

Reporting

• Understand assumptions in reports and use them effectively
• Develop and maintain reports that effectively communicate capacity information

Project Management

• Run regular meeting, take meeting minutes, record action items and ensure closed-loop and accurate completion of action items
• Use established project management approach and methodology when serving as project manager

Continuous Improvement

• Possess a continuous improvement process (CIP) approach where you are always looking for ways to improve current way of doing things
• Apply new (e.g. RPA, Tableau, Power BI) and traditional (Excel, VBA) methods to improve and automate tasks & visualization in the planning system/models

Compliance

• Finishes the required training timely
• Conducts all work in accordance with Micron EHS (Environment, Health, Safety) and ethics policies
• Provide timely feedback when quality, safety, or ethical issues arise

Requirements:

• Degree in Industrial/Mechanical/Computer Engineering and Computer Science preferable
• With at least 2 years of CCA in university, preferably in leadership positions.
• Good in written communication and presentation skills.
• Highly motivated to work in a dynamic environment, with good integrity and character.
• Programming skill will be an added advantage.
• Ability to quickly analyze situations, identify issues, and develop effective solutions under tight deadlines.
• Demonstrated capacity to maintain composure and productivity in high-pressure environments, adapting to changing priorities and challenges.
• Proven ability to prioritize tasks, manage numerous projects simultaneously, and meet deadlines without compromising quality.
• Previous internship experience in a related field, demonstrating practical application of skills and knowledge in a professional setting will be an added advantage.
• Keen in semiconductor industry
• Possess advanced Literacy and Numeracy skills

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities
• Install equipment and/or CIP hardware for evaluation by the process development team to enable early introduction, maturity, and adoption for current and next node of 3D NAND technology.
• Work with the Fab layout and facility team to ensure smooth and on time installation and operation of the equipment.
• Work with process development team to quantify benefits of equipment/CIP hardware.
• Develop and optimize existing equipment hardware to meet the productivity requirements of advanced 3D NAND parts.
• Participate with Boise TD equipment development peers on technology choices for the upcoming nodes and able to translate future technology needs into clear equipment requirements.
• Identify disruptive equipment early, work with manufacturing and Boise TD to identify viable evaluation path forward in manufacturing.
• Design and implement advanced equipment monitoring and control methodologies.
• Lead team or sites or suppliers on complex projects in focused meetings with end goal of maturity an equipment technology in record times for technical advantage, cost and productivity.
• Serve as a technical expert within Micron, provide advice and recommendations to senior management on improvements from equipment development. Lead and initiate innovation projects through patents/technical papers.
• Identify and resolve safety hazards; follow safety procedures including lockout, chemical safety, lifting techniques and ergonomically correct methods.

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above

Location: Fab10N

Closing Date: Until filled

Description

As a NAND CMOS Process Integration Engineer in the Singapore Technology Development department at Micron Technology Inc., you will be responsible for developing 3D NAND CMOS devices scaling and enhancing their performance, reliability and manufacturability.

Responsibilities:

• Develop and innovate critical CMOS modules. Drive multi-functional teams to optimize existing process flows and develop new innovative solutions to meet product requirements and manufacturability.
• Develop/re-define critical specifications criteria for optimum product performance and drive activities to get them to manufacturing process capability.
• Extract and analyze inline, probe, parametric, reliability, and other critical metrics and predict future behavior of the CMOS device performance of the product to enable early innovative solutions to meet product and device specifications.
• Early introduction, characterization and validation of new CMOS device models and test structures for developing future NAND products.
• 3 dimensions analysis with the use of K2 view to extract layout information and combine with the doping profiles of each implant step for product development and integration solutions.
• Interact and collaborate with TCAD, modeling, and layout teams to drive clearer definition of CMOS device and reliability improvements across multiple tech-nodes and designs.
• Coordinate activities at manufacturing site towards gating experiment funding, conversions, and effectively communicate decisions made to all R&D, manufacturing, and relevant partners.
• Take on leadership role at quarterly yield summits and monthly program reviews in summarizing complex problems, deriving and explaining actions taken to address them and getting R&D, manufacturing, and senior management teams on the same page.
• Assist in the transfer of a new technology from R&D to manufacturing and contribute towards ensuring successful ramp and qualification. Supporting the transfer, documentation and training of module fundamentals into manufacturing.

Requirements:

• MS or PhD in Electrical Engineering preferably specialized in Microelectronics and Semiconductor Device Physics. Prior technology development and tech transfer/manufacturing experiences are preferred.
• Fresh MS/PhD candidates with knowledge of semiconductor process Integration, device physics and CMOS engineering.
• Direct fab experience with nonvolatile memories manufacturing, knowledge of TCAD, K2 view layout, and NAND product are highly desirable.
• Ability to develop a strong, holistic, end-to-end understanding of CMOS device and its related module on NAND technologies, related structural and electrical fail mechanisms.
• Deep understanding of probe failure mechanism, ability to do electrical bench data collection.
• Self-motivated, self-governing with proven ability to work in a demanding and dynamic environment.
• Experienced in coordinating cross-functional teams to achieve a goal.
• Solid data analysis, communication and reporting abilities with demonstrated presentation abilities.
• Curiosity and natural tendency of learning new things independently.
• Ability to travel for extended periods of time to the US for collaborative R&D work.

Working Location: Fab10, 1 North Coast Drive, Singapore 757432

As a NAND CMOS Device Engineer, you will help set the direction for current and future CMOS technology for Micron’s NAND Memory Technology Roadmap!

You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few! In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.

Together with your peers, you craft and implement our NAND-CMOS roadmap and make sure to align to product roadmaps

• You give directions on how to improve our device portfolio, both in performance and cost effectiveness
• You define, execute, and analyze silicon experiments for future device generations
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets
• You strive to ensure that transistor models are correctly targeted to anticipate final silicon
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
• Highly motivated to ensure transistors are developed meeting the required reliability standards
• You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
• You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues

Minimum Qualifications:

• MS/PhD in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
• 5 plus years industry experience in the field of CMOS device design, simulation, characterization
• Experience in developing advanced logic transistor technologies
• Experience in developing Analog FETs operating at higher Voltages
• Preferred: Experience in the field of High Voltage applications, reliability, characterization, device development
• Understanding of analog design concepts
• Good presentation skills
• Excellent team and mentoring skills

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

Excellent execution on assembly process for 1st NPI success and smooth transfer process from NPI to HVM

• Excellent execution of the qualification of NPI products / packages build that proliferate from the pilot products and packages according to planned timeline
• Full responsible on support NPI business process with process TRA, POS, PFMEA/QCP, risk mitigation and documentations.
• Deliver BIC yield and cost on product NPI with integration of DFx BIC package solution, process guideline and design rules.
• Collaboration with multi-functional team from NPI to LVM/HVM process transfer.
• On-time execution of NPI Customer samples and Engineering Samples build for new products and package

SME Process Owner Responsible for Continuous Improvement on Process Yield, Defect Elimination and Process Characterization

• Process owner to perform on-time detection with data analysis for process yield improvement. Lead the defect elimination and continue improvement action, with problem solving methodology, statistical analysis and integration solution decision.
• Process owner to develop process recipe for BIC UPH, conducting process characterization to define process parameters and boundary.
• Continuous develop in depth assembly process technical knowledge, well understand process capability/tolerance//spec limit/CpK, and apply key tools PFMEA/QCP/APC/FDC/Alarm on assembly processes Cz/Development/NPI.
• Global leader for cross team collaboration on network BKM, process recipe spec and recipe standardization/conversion.

Technology enablement and development – Process, Material, Equipment

• Participate and support Product Roadmap, to enable key process capability and technology development to ensure packaging solution is ready prior 1st Qual Silicon deliver.
• Frequent engagement with equipment and material supplier (at least interval of monthly or daily/weekly for process issues)
• Collaboration with Supplier and involvement Supplier Roadmap (Material/Equipment/OSAT), to understand market trends and competitor’s direction, ensure key process technology and capability enablement is in-line.
• Frequent review and participant Competitor Analysis, to understand market trends and competitor’s technology/capability boundary
• Engage and follow PDE business process (TGR, TORB, KEG interlock) for new technology qualification, alignment and safe launch

Teamwork and General expectation

• Trainer/Buddy/Mentor for new team members, build effective relationships within team and cross team (peers, counterpart)
• Regularly review data and direction with supervisor. Demonstrate sound data analysis and judgment. Present reports and findings with appropriate conclusions, recommendations and decision making.
• Develop, or coordinate development of, training materials for existing/new process
• Safety Identify and promptly report hazards, follow safety procedures and area work rules including proper PPE, lockout and chemical safety.

Requirements:

• Bachelors/ Masters in Engineering
  
• Showcase leadership experience/potential
  
• Have engaged in projects during internships
• Great teammate
  
• Showcase critical thinking
• Keen interest in Semiconductor industry
  

Performs hardware, software, semiconductor design or telecomm engineering assignments. This job mapping should be used only if the position cannot be mapped specifically to other design/development engineering jobs.

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities
• Install equipment and/or CIP hardware for evaluation by the process development team to enable early introduction, maturity, and adoption for current and next node of 3D NAND technology.
• Work with the Fab layout and facility team to ensure smooth and on time installation and operation of the equipment.
• Work with process development team to quantify benefits of equipment/CIP hardware.
• Develop and optimize existing equipment hardware to meet the productivity requirements of advanced 3D NAND parts.
• Participate with Boise TD equipment development peers on technology choices for the upcoming nodes and able to translate future technology needs into clear equipment requirements.
• Identify disruptive equipment early, work with manufacturing and Boise TD to identify viable evaluation path forward in manufacturing.
• Design and implement advanced equipment monitoring and control methodologies.
• Lead team or sites or suppliers on complex projects in focused meetings with end goal of maturity an equipment technology in record times for technical advantage, cost and productivity.
• Serve as a technical expert within Micron, provide advice and recommendations to senior management on improvements from equipment development. Lead and initiate innovation projects through patents/technical papers.
• Identify and resolve safety hazards; follow safety procedures including lockout, chemical safety, lifting techniques and ergonomically correct methods.

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above
Location: Fab10N
Closing Date: Until filled

As NAND Sg Process Development (PD) Program Management Engineer, you will support the Program Manager, in his collaboration work with Technology Development (TD) peers, High Volume Manufacturing (HVM) Fabs, Operations Central Teams (OCT) and other stakeholders to drive best in class performances and all critical initiatives for NAND nodes to meet program milestones.

You will play a key role in establishing and managing cost programs to meet allocated capital expenditure budget, operational expenditure cost management; and deliver node-over-node cost per gigabit (CPGB) reduction targets meeting business requirements.

You will work in a fast-paced environment with the world’s Best NAND TD team in a role that is highly Collaborative and requires a great deal of Customer Focus; continuous improvement and an Innovative growth mindset are required to achieve desired results. You will work within a Process Development organization alongside leaders and engineers from Fab functional Process Areas.

Responsibilities:

• Regular interaction with PD/PI team for MOR Updates/Tracking in close collaboration with Industrial Engineering (IE) Modeling Team.
• Drive alignment and timely delivery of results on critical projects, manage execution of TD roadmaps/strategies to meet milestones.
• Drive continuous improvement of PMI/SPC from process areas, publish roadmaps, highlight risks and mitigate.
• Prequal Expense: Work with stakeholders to drive prequal expense reduction (materials, spares etc).
• TD-University Engagements: Engage with Talent Acquisition teams to initiate/support initiatives to build strong TD talent pipelines.
• EBD Grants: Collaborate with Finance Team to comply with regular submissions and meet yearly audits.
• Additional portfolio includes Micron Voice Engagements, managing Dept budget, compliance with NMI processes, related TD audits and new scopes along the way that contribute to NAND program successes.

Successful candidates for this position will have:

• Bachelor/Masters in related Engineering fields.
• Familiar with both TD and manufacturing environment and business processes
• Extremely strong organizational and communication skills.
• Strong interpersonal skills for smooth collaboration with cross-functional teams.
• Solid communication skills for cross department alignment and providing clarity to leadership and executive teams.
• Highly motivated and adaptable to our demanding, dynamic and rapidly changing work environment.

As a NAND Process Development (PD) Program Manager, you will work with Technology Development (TD), Operations Central Teams (OCT), High Volume Manufacturing (HVM) Fabs, and other stakeholders to drive best in class Cost performance for NAND nodes within TD and enable our HVM site partners.

You will be in an Individual Contributor (IC) role with no direct reports; however, you will play a key role in establishing and managing cost programs to meet allocated capital expenditure budget, operational expenditure cost management; and deliver node-over-node cost per gigabit (CPGB) reduction targets meeting business requirements.

Additionally, you will drive Process Capability Improvement (PCI) of unit operation processes to achieve yield and device performance targets through the Process Maturity (PMI) and Constructional Specification (CSPEC) business processes.

You will work in a fast-paced environment with the world’s Best NAND TD team in a role that is highly Collaborative and requires a great deal of Customer Focus; continuous improvement and an Innovative growth mindset are required to achieve desired results. You will work within a Process Development organization alongside leaders and engineers from Fab functional Process Areas.7

Responsibilities:

• Sets clear objectives for your function:
• Alignment on critical projects in Process Development (PD), supporting overall Process R&D, TD, and corporate goals.
• Execution of these projects, timely delivery of results, allocating appropriate resources.
• Development and execution of roadmap in support of TD roadmap.
• Participation in execution of Process R&D and TD strategy.
• Enable areas to meet program objectives efficiently.
  
• Process Capability Improvement (PCI) Ownership:
• Leading PD team to achieve unit process capability requirements in accordance with technode schedule.
• Assess and report program status for PMI/CSPEC to TD and HVM Fab stakeholders.
• Drive process areas to be accountable for their PCI (PMI/SPC) status, highlight risks and how to mitigate.
• Drive continuous improvement of PCI through PMI steering committee and other forums.

• PD Model-of-Record (MOR) Ownership:
• Regular interaction with PD/PI team for MOR Updates from Program Kickoff (PK) through Engineering Full Flow Transfer (EFF) in close collaboration with TD Industrial Engineering (IE) Modeling Team.
• Lead node team using Contingency List (CL) and MOR Business Processes, manage MOR changes through Engineering Change Notice (ECN) cycles.
• Cost Summit Planning, Collaboration, and Execution.
• Semi-annual cost summits to establish Capex, Materials, Spares cost targets by node and execution to commits to achieve required $/GB.
  
• POR-MOR Gap tracking and closure:
• Support Transfer from TD to HVM with clear understanding of POR-MOR Gaps and ensure effective mitigations are in place for transfer and ramp while driving POR/Baseline process towards MOR compliance.
• Cost-of Transition (CoT) - project determination & prioritization.
• Planning of MOR and CapEx budget, what is needed to execute results, and ownership/accountability of budget performance.
• Representing PD in capital approval and MOR process.
• Actively support Risk-to-Commit (RTC) business process for CapEx savings optimization.
• Drive readiness for MFG pilot line via OCT/MFG engagement, workshops, and other reporting.
• Engage with other Program Managers for node-node MOR alignment.
• Making timely and effective decisions that deliver results.
• Staying involved in achievement of strategic and/or organizational objectives (Job Rotation Program, Headcount modeling and management, work force development, executive support, etc.).
• Communicate vision of the program to stakeholders by breaking down and clarifying goals that the team needs to perform.Ownership of Technode Key Performance Indicators (KPIs) for PD.
  Identify line-of-sight, tracking goals, and communication of goals and status.
• Ownership of Technode Key Performance Indicators (KPIs) for PD.
• Identify line-of-sight, tracking goals, and communication of goals and status.
  
• Collaboration:
• Process Integration (PI) collaboration – working with PI team as peer, providing ideas, meeting their needs, and staying engaged.
• Operations collaboration – working closely with Operations Development Engineering (ODE) & Industrial Engineering (IE) teams to achieve operational results (e.g. engagement in providing information about potential or likely disruptive POR changes in process flows, equipment, segregations, new materials, etc.).
• Manufacturing – working closely with HVM Fabs, OCT, TD IE Modeling to deliver technology and achieve cost deliverables.
• Peer level – with fellow process development area section managers and other leaders in TD.
  
• Continue to grow technical and management skills (soft and technical areas)
• Additional Responsibilities that may be shared between 1 or multiple PD Program Manager peers:
• Coordinate and drive Tech Acceleration through Vendor Scorecard business process.
• IP Protection as Classification Managers for their respective technologies.
• Program Management and Coordination for Job Shadow Program (JSP).
• Headcount Management and Modeling support.
• PD PM 1:1 alignment and benchmarking.
• Other potential opportunities.

Ex-Pat Assignment:

• This position will initially be for a 1-2 year Ex-Pat assignment in Boise, ID, USA and then transition back to Singapore to support the worldwide NAND development team.

Qualifications & Skills:

• Demonstrated ability to lead small and large teams of diverse stakeholders across different geographical regions.
• Ability to influence and coordinate actions for team members that do not report to you are critical to enable success.
• Strong organizational and communication skills.
• Experienced with Excel, SharePoint, PowerPoint.
• Flexible work schedule to enable collaboration with global partners.
• Ability and willingness to travel internationally.
• Ability to solve complex problems and manage multiple concurrent projects.
• Basic to Advanced understanding and knowledge of Fab Process Areas and Equipment.
  

Education and Experience:

• B.S. or above in science-related field with a minimum of 5 years of experience in semiconductor industry.
• Previous experience as people leader preferred.

Micron is a global leader in NAND technology, pushing the boundaries of semiconductor possibilities. As the Lead (SMTS/Sr. Mgr) of NAND CMOS Team, you will be responsible for the introduction and ramp of ALL NAND products in Singapore, and ensure that all CMOS Device aspects (time-0 and Reliability) are fulfilled with highest quality. You will ensure that all Device VDLs are monitored on a weekly basis, manage a Device Health dashboard (time0 and REL), and provide direction on device optimization/centering to ensure all downstream product requirements are fulfilled on-time.

Leader Responsibilities:

• Ensure that all CMOS VDLs meet Device Maturity Index (DMI) requirements.
• Be the Electrical-SPEC (ESPEC) gate-keeper across all NAND CMOS technologies (through process conversions), and ensure high confidence ESPEC compliance is maintained throughout.
• Manage & Maintain ESPEC spec-source and ensure that performance is compliant with PDK commit. If issues arise, work closely with Design for DTCO containment.
• Have in-depth understanding and ensure full compliance to all key business processes (ESPEC, DTCO, FMEA, DMI, etc..)
• Have in-depth understanding of circuit usage/fail modes (for every VDL), and be able to understand Live-Die vs. Param layout differences.
• Have in-depth understanding of NAND Voltage Spec (VSPEC) document, and ensure that you work with partner Produce & Quality organizations to guarantee 0 VSPEC violations through all end-2-end test methodologies (Probe, Qual flows).
• You will work closely with Device Reliability teams to enable fast reliability flows, towards establishment of continuous line monitor of REL health.
• You will engage seamlessly with the CMOS Process Integration and Device Technology Teams, and foster a One-Team culture always.
• For every Device issue, you will inculcate an FMEA-first and TCAD-first mindset, before deploying silicon solutions.
• Develop a culture of excellence, psychological safety, inclusion, and engagement.
• Continuously improve CMOS team technology approaches and business processes to meet customer needs and adapt to the changing landscape.
• Implement project management best known methods (BKMs) to coordinate activities and deliver projects on schedule.
• Drive effective multi-functional collaboration with internal customers (design, PE, etc.) and partners (integration, process, scribe, modeling, etc.).
• Negotiate and clarify roles and responsibilities with all partner organizations.
• Summarize complex problems and communicate solutions and execution plans to executive leadership.
• Maintain seamless communication between all departments and sites across organizational borders.

Qualifications:

• MS degree (required) or PhD (preferred) with 7-10+ years of DRAM and/or NAND research and development experience.
• Proven capability to deliver novel technology solutions and successfully resolve complex issues that span multiple groups.
• Proven ability to think and communicate clearly in urgent and stressful situations.
• Strong background in CMOS integration, scaling, and device physics.
• Deep knowledge of Design of Experiments (DOE) principles and analytical skills.
• Innovation track record with a proactive approach to exploring new ideas and adapting quickly to change.

Micron is a global leader in NAND technology, pushing the boundaries of semiconductor possibilities. As the Lead (SMTS/Sr. Mgr) of NAND CMOS Team, you will be responsible for the introduction and ramp of ALL NAND products in Singapore, and ensure that all CMOS Device aspects (time-0 and Reliability) are fulfilled with highest quality. You will ensure that all Device VDLs are monitored on a weekly basis, manage a Device Health dashboard (time0 and REL), and provide direction on device optimization/centering to ensure all downstream product requirements are fulfilled on-time.

Leader Responsibilities:

• Ensure that all CMOS VDLs meet Device Maturity Index (DMI) requirements.
• Be the Electrical-SPEC (ESPEC) gate-keeper across all NAND CMOS technologies (through process conversions), and ensure high confidence ESPEC compliance is maintained throughout.
• Manage & Maintain ESPEC spec-source and ensure that performance is compliant with PDK commit. If issues arise, work closely with Design for DTCO containment.
• Have in-depth understanding and ensure full compliance to all key business processes (ESPEC, DTCO, FMEA, DMI, etc..)
• Have in-depth understanding of circuit usage/fail modes (for every VDL), and be able to understand Live-Die vs. Param layout differences.
• Have in-depth understanding of NAND Voltage Spec (VSPEC) document, and ensure that you work with partner Produce & Quality organizations to guarantee 0 VSPEC violations through all end-2-end test methodologies (Probe, Qual flows).
• You will work closely with Device Reliability teams to enable fast reliability flows, towards establishment of continuous line monitor of REL health.
• You will engage seamlessly with the CMOS Process Integration and Device Technology Teams, and foster a One-Team culture always.
• For every Device issue, you will inculcate an FMEA-first and TCAD-first mindset, before deploying silicon solutions.
• Develop a culture of excellence, psychological safety, inclusion, and engagement.
• Continuously improve CMOS team technology approaches and business processes to meet customer needs and adapt to the changing landscape.
• Implement project management best known methods (BKMs) to coordinate activities and deliver projects on schedule.
• Drive effective multi-functional collaboration with internal customers (design, PE, etc.) and partners (integration, process, scribe, modeling, etc.).
• Negotiate and clarify roles and responsibilities with all partner organizations.
• Summarize complex problems and communicate solutions and execution plans to executive leadership.
• Maintain seamless communication between all departments and sites across organizational borders.

Qualifications:

• MS degree (required) or PhD (preferred) with 7-10+ years of DRAM and/or NAND research and development experience.
• Proven capability to deliver novel technology solutions and successfully resolve complex issues that span multiple groups.
• Proven ability to think and communicate clearly in urgent and stressful situations.
• Strong background in CMOS integration, scaling, and device physics.
• Deep knowledge of Design of Experiments (DOE) principles and analytical skills.
• Innovation track record with a proactive approach to exploring new ideas and adapting quickly to change.

Overview

Do you want to lead marketing and commercial plans for one of our billion-dollar brands? P&G Brand Manager identifies business opportunities and works with the multi-functional team to build cohesive commercial plans! You are expected to lead and collaborate with different subject matter experts to deliver end-to-end plans for Vietnam via qualifying communication ideas, adjusting portfolio pricing and identifying shopping barriers and opportunities.

Your Team

You and other Brand Managers (each handling a brand/category) will report to the Senior Brand Manager for the Fabric Care Business Unit. You will work extensively with colleagues from Analytics and Insights, Sales, Communications, Finance,
Research & Development etc.

What Success Looks Like

• Demonstrate positive relationship building skills in initial engagements with multi-functional teams
• Deliver Scorecard Business Targets, in line with the goals of the Business Unit
• Deliver Category growth, market penetration and gaining of New Users via Products Innovation Design
• Successful Design and Deployment of Marketing Toolkits for the Brand

Responsibilities of the role

• Identify Japanese consumers’ needs and wants for P&G’s products, and provide inputs to Research & Development and technical team to design the right package and formula to win with local consumers
• Lead consumer researches to develop qualified brand concept, benefit and claims that addresses Japanese consumers’ unmet needs
• Communicate with local partners, stakeholders and suppliers to drive P&G business initiatives
• Lead creative agencies to develop communication ideas and execute TV copy production designed/customized for the cultural nuances of Japanese consumers
• Develop initiatives fit-for-use toolkits (including copy, prints, digital i-banners, social & eCommerce contents, sampling trial toolkits, in-store activation and demos, etc.), and deploy/guide the Japan delivery team for execution
• Coordinate with R&D, Consumer Research teams to qualify the product and package through various tests.
• Craft promotion/pricing strategy and customer/distributor trade terms with the local trade team

Role Requirements

• A college degree (Bachelor’s or Master’s is fine, preferably with some business focus)
• Past experience working in the FMCG industry for Japan market as the role requires local consumer understanding to develop brand equity and marketing strategies for Japan Market
• Excellent forward-thinking, strategic and courageous leadership skills
• Strengths with strategic and analytical thinking
• An ability to drive innovation and brand growth
• Strong ability to communicate and team capabilities
• You are business proficient in the Japanese language and possess strong market knowledge of Japan as the role requires local consumer understanding to develop brand equity and marketing strategies for Japan Market

About us

We produce globally recognized brands and we grow the best business leaders in the industry. With a portfolio of trusted brands as diverse as ours, it is paramount our leaders are able to lead with courage the vast array of brands, categories and functions. We serve consumers around the world with one of the strongest portfolios of trusted, quality, leadership brands, including Neurobion, Sangobion, Vicks, Always®, Ariel®, Gillette®, Head & Shoulders®, Herbal Essences®, Oral-B®, Pampers®, Pantene®, Tampax® and more. Our community includes operations in approximately 70 countries worldwide.

Visit http://www.pg.com to know more.

Our consumers are diverse and our talents - internally - mirror this diversity to best serve it. That is why we’re committed to building a winning culture based on Inclusion and our ideal candidate is passionate about the same principle: you will join our daily effort of being “in touch” so we craft brands and products to improve the lives of the world’s consumers now and in the future. We want you to inspire us with your unrivaled ideas.

We are committed to providing equal opportunities in employment. We do not discriminate against individuals on the basis of race, color, gender, age, national origin, religion, sexual orientation, gender identity or expression, marital status, citizenship, disability, veteran status, HIV/AIDS status, or any other legally protected factor.

As a FECOS Inventory Control – Probe/PC at Micron Technology, Inc., you will be responsible for overseeing the management of the FECOS Probe team and PC (Production Control) team. These teams are primarily responsible to help to improve Probe and Non-Productive Wafers (NPW) Operations planning and execution within the tactical horizon window.

You will be responsible for collaborating with Front End Manufacturing Inventory output and Probe stakeholders to deliver probe tactical solutions and BKM sharing across the network as well as management of NPW to meet output plan at lowest cost. This will be achieved by developing metrics that clarify deliverables, and by providing front-end manufacturing experience and expertise and influencing key business partners (Supply Chain, SMAI, TSE, Procurement, IE etc). You will build effective global team by distributing work and learning opportunities functionally and regionally, and by empowering team members with the authority to make decisions at the appropriate level and geographically. You will deliver competitive results by spearheading innovative solutions, removing barriers and assisting in troubleshooting and escalating issues.

Responsibilities and Tasks

Performance Management

· Drives Micron Behaviors and FE Central team competencies.

· Ensure clear direction, performance goals, job profiles and job expectations are established for all Team Members.

· Provide a work environment that empowers employees to creatively improve their work environment, instills a sense of ownership in Micron, and supports a team effort.

· Complete written evaluations and a mid-year check-point for each direct report once per year. This includes performance appraisals and work plans that outline Team Members’ strengths and weaknesses, identify areas for improvement, and include a plan for with specific guidance for improving skills. Be specific on the overall performance of the direct report in each category. Clearly outline goals for each Team Member that will impact department goals. Update SuccessFactors with employee information.

· Partner with Team Members on establishing aggressive but achievable goals. Maintain a balance between task-related goals versus results-driven goals.

· Execute short-term goals within Production Operations to meet company Strategic Objectives

· Recruit top-caliber members for the team.

· Drive accountability through clear communication, informal feedback, effective project management, and appropriate usage of metrics.

· Ensure that promotion and recognition programs are aligned to recognize and incentivize high-performing Team Members.

· Ensure that low-performing Team Members are systematically identified and managed.

Strategic Leadership

· Provide “Vision” and “Mission” for Production Operations. Ensure that this vision aligns with needs of the business both internal and external to operations.

· Work with key stakeholders on Production Operations process, systems, methodologies, capabilities and roadmaps. Production Operations to include BKM sharing, Front end operations tactical management support, front end Quarter lock, Cycle time management and etc. Ensure that such support meet Fabs expectations to enable achievement of Tactical objectives and Micron’s business plan.

· Ensure alignment of WW Production Operations to close gaps to benchmark in cycle time. Work in close partnership with MFG sites and supply chain to install correct countermeasures and insure their continuity into the future.

· Develop and track metrics regarding Fab Production Operations performance. Ensure plans are in place to drive key factory metrics to industry-leading performance.

· Create an environment with your group that encourages innovation and technical leadership.

· Work with business partners to ensure best talent is mobilized to business-critical deliverables.

Tactical Leadership

· Conduct ongoing metrics reviews of critical group deliverables to business. Ensure that work reviews are conducted on all programs, projects and critical activities to ensure achievement of committed performance. Establish structure for subordinate manager to conduct such reviews within their teams. Ensure that such reviews are aligned and effective.

· Establish weekly projection plans and step goals and monitor probe/NPW performance to control variance of plan.

· Provide MFG related data support for site business plan and work with IE and ENG to build related capacity model

· Optimize line efficiency to drive for max probe output to meet output/sample plan at lowest cost.

· Responsible to establish governance on best known methodologies and practices to be applied across the Front End network.

· Provide direct leadership on most critical group deliverables and escalated performance items to ensure barriers are removed and correct resources are applied. Ensure that timely and transparent communication with business partners if performance issues will risk business objectives.

· Provide monthly one-on-one sessions to review progress to the and adjust training and performance goals.

· Facilitate the Global Probe regular meeting with key business partners. Ensure that resources are assigned to drive actions defined from meetings.

· Execute, maintain, and continuously improve operations project management and business process in alignment in accordance with QMS standards.

· Develop group leadership to ensure all Team Members receive quality leadership, performance management and assistance from their management team to achieve or exceed expectations.

· Effectively manage team’s internal and worldwide meeting structure. Ensure meetings are efficient, effective and targeted to achieve required outcomes. Effectively reduce your team’s number of FTE spent in meetings.

· Coordinate escalation issues between manufacturing sites as required to drive operations objectives.

Communication

· Provide regular and structured communications to your team, including progress toward strategic objectives, operations goals, priority projects, and company status. Ensure that Team Members are well-engaged and motivated to achieve group and company objectives. Ensure that subordinate managers communicate consistently and in alignment with your regular communications.

· Ensure that structured communications with Team Members provide proper motivation and optimism toward achieving Production Operations execution.

· Provide a work environment that empowers employees to creatively improve their work environment, instills a sense of ownership in Production Operations, and supports a team effort.

· Ensure that leaders, at all levels, engage in productive two-way communications with Team Members.

· Provide regular Probe/NPW Planning Operations updates to key business partners. Updates should show progress against timelines and metrics to add to vision and direction.

· Develop external relationships to achieve new ideas and procedures to keep pace with industry standards and methods.

· Manage communication on critical projects and activities through Change-ABLE methodology. Be prepared to share status of any underperforming project or activity, along with actions required to resolve performance problems.

· Demonstrate cultural sensitivity - Show respect for different cultures and languages; invite feedback to ensure that others understand.

Training and Career Development

· Ensure that the group’s training roadmap is maintained. Focus on developing leading-edge skills and preventing isolated skill sets that risk business continuity.

· Ensure that all leaders have required leadership training and fully understand manager expectations for the position.

· Ensure that leaders set specific training plans, performance goals and development activities for their Team Members.

· Hold quarterly career development discussions with direct report and ensure leaders do the same for Team Members.

· Ensure that leaders are involved in and supporting the use of training plans.

· Leverage Micron’s training tools and programs for standardization and efficiency.

· Ensure that training is provided to partners, internal and external, for business processes.

· Establish and maintain GJS skill sets for each position in your group.

· Develop potential successors within your group and coach/mentor to develop skills.

Safety

· Provide leadership for process safety management systems development and sustainment. Target to achieve zero major event occurrences across the Micron manufacturing network.

· Maintain knowledge of equipment and materials safety concerns.

· Ensure that all sites understand any safety concern for equipment installation and have access to equipment and materials safety information.

· Encourage and create a culture of safety.

· Engage proactively in safety-related issues, and utilize corporate and site safety resources to escalate issues as appropriate.

Education

Required

Bachelors Degree or equivalent experience

· Engineering

· Production and Operations Management (POM)

· Related field of study

Experience

Required

5 years' experience in any of the following:

· Engineering

· Production/Manufacturing

Qualifications

· Master's in industrial engineering or project management preferred

· Has depth of understanding and ability to manage of worldwide business process. Able to adopt a business process approach in worldwide networks.

· Has depth of understanding on project management to manage worldwide projects.

· Has high business savvy to work with business partners to create win-win relationship.

· Depth of understanding business units (BU’s) direction and technical background to understand product quality.

· Ability to escalate critical issues and communicate with upper management.

· Has depth of understanding process operations matters and can give correct total priorities of yield and product qualities to direct reports.

· Has the agility to manage and execute prioritized action items from both tactical and strategic point of views.

· Can maintain good communication with business partners to create win-win relationship.

Workplace

Travel Required?

- Yes

Travel Details

Travel Frequency
Not Specified

Travel Duration
Not Specified

Travel Type
International

Environment

- Office

Shift

- 8+ hour shift, 5 days a week,

Job Hazards
Not Specified

Personal Protective Equipment
Not Specified

Equipment Use
Not Specified

Physical Requirements
Not Specified

Overview

Microsoft is continuing to evolve and grow the Global Employee Relations Team! The Global ER team leads the process, principles, and practices to navigate complex and sensitive matters, conduct investigations and manage workplace conflict. This team works in close partnership with the Legal, Outside Counsel and Human Resources (HR) teams to manage cases involving inquiry into behavior concerns, manager conflict, consulting, investigations and employee grievances related to lived experiences not aligned to aspired culture, and legal risks.

We are looking for a Senior Employee Relations (ER) Manager with deep experience influencing and impacting high growth and dynamic businesses through effective management (both proactive and reactive) of a wide range of employee relations issues. This person will be accountable for working with employees across organizations, building trusted relationships quickly, and leading with warmth, empathy, compassion, and creativity to think inside of and outside of the box to drive the right solutions.

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

Responsibilities

Investigation and management of employee concerns:

• Conducts the analysis and resolution of issues with increasing complexity, visibility and risk related to policy, values or, cultural concerns/violations and incident or threat response, independently or by collaborating with managers, peers in HR and Legal as appropriate; recommends solutions to address issues from a systematic perspective.
• Determines appropriate approach, interviews appropriate parties in an investigation in review of concerns on matters related to policy or culture concerns/violations and workplace behaviors. Documents findings, maintains appropriate levels of confidentiality and demonstrates leadership to influence direction of initiatives and investigations.
• Concludes investigations, using findings, relevant partnership with team, and knowledge of the relevant legislation / regulations, and Microsoft business context and organizational policies to determine a resolution to investigation of policy or culture concerns/violations and incident or threat response, and recommends corrective/disciplinary actions or processes, as deemed appropriate.
• Collaborates with partners across stakeholders to seek counsel from senior peers or managers as needed on proposed strategy weighing complexity, sensitivity, and parties involved.
• Models best practices in interviewing techniques and mastery of empathy, confidentiality, and connecting themes.
• Utilizes tools and resources to track, document work product and makes recommendations for refining, streamlining, and improving tools and their usage to improve future documentation needs.
• Assists/Partners with internal investigative entities at Microsoft (e.g., Workplace Investigations Team [WIT], Business and Regulatory Investigations [BRI], Global Security Investigations [GSI]) in investigations of serious cases and implements appropriate remediation in conjunction with a business, region, or geography; may lead the investigations for a business, region, or geography where resources are limited; ensures appropriate documentation of issues is in place.
• Seeks input from peers, managers, and appropriate stakeholders to ensure compliance with applicable laws and regulations and Microsoft policies.
• Identifies, raises, or escalates issues for trends in ER; partners with team and relevant HR partners to reduce ER issues for a business, region, or geography.

Capability Building

• Coaches employees and managers on navigation of ER processes, provides guidance, coaching or training through the ER experience, and acts as a sounding board for employees and managers on how to navigate work and handle themselves post-investigation.
• Manages through conflict listening for what is said verbally and nonverbally, identifies potential solutions, provides tools and resources for facilitating resolution.
• Consults with partners and stakeholders as subject matter expert on situations or issues providing best practices, influencing policy and observed trends. Use expertise to make recommendations for next steps, determine what would need to occur next for the situation to need to be transferred to WIT, and what best practices other teams should use to navigate the situation/concern.
• Provide one-on-one consulting/coaching with senior/executive business leaders, or by engaging relevant stakeholders and HR partners in capability building conversations.
• Identifies opportunities through insights to build organizational capability to proactively manage the creation of ER matters.
• Partners with other internal teams to influence policy and decision making based upon preexisting ER best practices and observed trends. Recognizes when standard HR policies and process should be followed and where exceptions should and can be made.
• Initiates conversations with individual parties at Microsoft in conflict, listening for what is said both verbally and nonverbally in order to understand the nature of the conflict, what parties' contributions are to the conflict, their respective willingness to resolve it, and what may be potential solutions for conflict resolution while maintaining appropriate levels of confidentiality.
• Coaches and guides parties to leverage best resources and/or approach for the conflict after sharing their findings, or provides the tools that would allow for facilitating conflict resolution to occur as appropriate.

HR Project and Programs

• Guides and oversees the identification of needs to design and implement ER projects or programs (e.g., policy evolution, process, tools and partnerships with business and HR leaders; oversees project planning and execution).
• Gathers and interprets industry trends about Employee Relations programs and processes and identifies execution or communication gaps within a business, region, or geography; develops and proposes action plans to address the gaps in collaboration with peer disciplines (e.g., Human Resources Consulting and Business Partnership) and business leaders.

Operational Compliance

• Interprets and advocates Microsoft values and compliance with Human Resources policies for a business, region, or geography; identifies/raises needs to mitigate potential risks by collaborating with the Legal profession; leads their team in the collaboration with peers in other businesses, regions, or geographies; provides guidance to create standardized/scalable approach for enhancing compliance.
• Identifies the strategy for the localization/update of policies and procedures related to managed projects and programs; gains approval from business leadership in partnerships with Human Resources policy owners and Human Resources Business Partnership (HRBP).

Qualifications

Required/Minimum Qualifications

• 3+ years Employee Relations experience.Bachelor's Degree in Management, Business Administration, Organizational Behavior, HR, Industrial Relations, Psychology, or related field AND 5+ years experience in experience in HR, mediation, investigation, or ER-related roleso OR Juris Doctorate or Master's Degree in Industrial-Organizational Psychology, Human Resources (HR), Business Administration, Organizational Leadership, Industrial Relations, Law, or related field AND 3+ years experience in HR, mediation, investigation, or employee relations (ER)-related roleso OR equivalent experience.
• Employment legal and/or ER expertise across a range of Asia countries, with a particular focus on Japan.

Preffered Qualifications

• Proficiency in Japanese language skills highly preferred as these covers Japan market.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

Youle Mandarin is a young and dynamic Pre-School and Primary School Mandarin Enrichment School. We specialize in Mandarin programmes for children ages 1 to 12.

• Be at the forefront in handling customers’ inquiries, maintaining relationships with existing customers, and coordinating teachers’ and students’ attendance records
• Have to actively drive student recruitment and enrolment of students as well as organize and plan the class schedules for the centre
• Assist in generating daily customer inquiries, student enrolment, class attendance and other relevant centre operational statistics reports
• Assist in all other routine admin work required in the centre daily operations

Candidate Requirements 教师需求

• Ability to handle customers’ inquiries and turn customer leads into actual sales and student enrolment is a must
• Effectively bilingual in Mandarin and English (to liaise with Mandarin speaking associates)
• Able to work both weekends
• Motivated team player with a pleasant personality, positive working attitude, and determination to learn, achieve and excel
• A self-starter who has energy and passion is key to success in the role
• Able to multi-task and work in a fast-paced and dynamic environment
• Marketing competency is required
• Prior teaching experience and working experience in preschool enrichment centre will be looked upon favourably
• Bookkeeping knowledge will be a plus point
• Candidates with relevant experience could be considered for a Centre Manager role

What We Offer 待遇福利：

• Attractive Salary
• Numerous career growth opportunities
• Comprehensive and structured training provided
• Staff incentive
• Not required to work on public holidays, and one year 4 weeks fixed annual leave
• Performance Bonus
• Medical and dental benefits
• Long service award
• School fee discount for staff children