Job Description

• In charge of supervising the entire set-up and operation performance of the central kitchen.
• Monitoring of purchase and orders to manage cost flow including operation costs and kitchen overheads that do not exceed set par levels.
• Ensured that all employees followed food hygiene practices and safety standards.
• Improvise SOPs in Central Kitchens, shop outlets, and even delivery units to achieve the highest food standard, quality menus, and food products to the brand outlets.
• Will be involved in ingredients matching, fusion food new menu creations, assisting Chef as and when required.
• Coordinate Human Resources, including Part-Timers and cleaners to keep labour costs within budget while maintaining service standards and maximise productivity.
• Streamline service processes to boost productivity and efficiency in central kitchen and outside dining services.
• Will be required to work alongside or together with the Marketing Department to create a marketing campaign and menu item promotions.
• Carry out other duties as assigned by management.

Job Requirements

• Preferably possess Diploma or Advanced/Higher/Graduate Diploma in Food & Beverage Service Management or related field
• At least 10 years of relevant experience in a managerial position in a Central Kitchen facility or related field
• Strong knowledge of Central Kitchen operations and practices, from set-up to daily operations, to maximize the productivity of the facility
• Excellent operational expertise in F&B industry and organizational skills
• Independent, self-driven, resourceful and reliable
• Excellent communication skills and planning
• Strong team player, and able to work with the team members to produce exceptional results

Your primary responsibilities will be:

• Risk assessment of NAND cell reliability, identification of the process/trim/test strategy to bridge the gaps for JEDEC and internal product qualification.
• Design experiments to identify and segment the limiting reliability mechanisms impacting NAND quality.
• Design high volume electrical experiments (both wafer level and component level) and perform statistical data analysis to validate process/trims solutions required to close reliability gaps.
• Update management and provide continuous feedback to process development and product engineers on the NAND reliability status and roadmap to bridge gaps.
• Contribute to develop forward looking technology path finding for next NAND generation, including reliability risk assessment and product capability projections, identify innovative design and product features required to meet quality specification.

Required skills:

• Proven experience with NAND device structures, operations and algorithms
• Knowledge and understanding of electrical properties of semiconductor and insulator materials, semiconductor device physics and solid-state physics
• In-depth understanding of physics-based modeling of non-volatile memory and semiconductor devices failure mechanisms, reliability analysis
• Knowledge and understanding of statistical analysis and numerical computing software (Matlab, Octave, JMP)
• Knowledge and ability of scripting languages (C, C++, Matlab, Perl)
• Familiar with Big Data and database queries
• Knowledge of JEDEC standards

Working location:

• 1, North Coast Drive, Singapore 757432

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

As a NAND CMOS Device Engineer, you will help set the direction for current and future CMOS technology for Micron’s NAND Memory Technology Roadmap!

You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few! In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.

Together with your peers, you craft and implement our NAND-CMOS roadmap and make sure to align to product roadmaps

• You give directions on how to improve our device portfolio, both in performance and cost effectiveness
• You define, execute, and analyze silicon experiments for future device generations
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets
• You strive to ensure that transistor models are correctly targeted to anticipate final silicon
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
• Highly motivated to ensure transistors are developed meeting the required reliability standards
• You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
• You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues

Minimum Qualifications:

• MS/PhD in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
• 5 plus years industry experience in the field of CMOS device design, simulation, characterization
• Experience in developing advanced logic transistor technologies
• Experience in developing Analog FETs operating at higher Voltages
• Preferred: Experience in the field of High Voltage applications, reliability, characterization, device development
• Understanding of analog design concepts
• Good presentation skills
• Excellent team and mentoring skills

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities
• Install equipment and/or CIP hardware for evaluation by the process development team to enable early introduction, maturity, and adoption for current and next node of 3D NAND technology.
• Work with the Fab layout and facility team to ensure smooth and on time installation and operation of the equipment.
• Work with process development team to quantify benefits of equipment/CIP hardware.
• Develop and optimize existing equipment hardware to meet the productivity requirements of advanced 3D NAND parts.
• Participate with Boise TD equipment development peers on technology choices for the upcoming nodes and able to translate future technology needs into clear equipment requirements.
• Identify disruptive equipment early, work with manufacturing and Boise TD to identify viable evaluation path forward in manufacturing.
• Design and implement advanced equipment monitoring and control methodologies.
• Lead team or sites or suppliers on complex projects in focused meetings with end goal of maturity an equipment technology in record times for technical advantage, cost and productivity.
• Serve as a technical expert within Micron, provide advice and recommendations to senior management on improvements from equipment development. Lead and initiate innovation projects through patents/technical papers.
• Identify and resolve safety hazards; follow safety procedures including lockout, chemical safety, lifting techniques and ergonomically correct methods.

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above
Location: Fab10N
Closing Date: Until filled

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Responsibilities

• Process module ownership involving regE process characterizations and advanced process developments for 3D NAND and beyond.
• Work with process development engineers in Singapore and Boise, US TD site and vendors to develop regE processes that meet integration requirements for next-generation 3-D NAND nodes.
• Transfer regE processes to high volume manufacturing (Fab10), and work on continuous improvements to manufacturability.
• Address specific wafer edge issues (such as bevel defects, uniformity issues), working with Fab10N team and with key business partners on tool choices for manufacturing, evaluations etc., as applicable.
• Focus on understanding and improving regE process margins required for meeting the mature yield goal for 3D NAND parts.
• Initiate and manage experiments to widen regE process margins as well as to test out manufacturability of next node solutions
• Incorporate best known manufacturing methods into early development phase of upcoming nodes.
• Design and implement advanced process monitoring and control methodologies.
• Serve as a technical expert within Micron contributing to technical projects for improvements to processes, procedures and equipment.
• Define and leads complex, multi-functional projects of critical importance to Micron, helps to define strategic direction.
• Lead team or sites or suppliers on complex, multi-disciplinary projects in quality focused meetings, process and yield improvement meetings, cost and productivity improvement meetings
• Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers.
• This position requires communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Be part of the continuous worldwide TD engagement with suppliers pushing for breakthrough solutions.

Requirements

• Bachelors’ degree or higher in Materials Science, Chemical Engineering or Physics with minimum 2 years hands-on experiences in relevant regE process developments.
• Familiarity with regE process developments and yield improvements.
• Understanding of various integration and structural impacts and constraints related to wafer edge.
• An understanding of the general process steps and process flow for memory processing, planar and vertical NAND memory in particular.
• Working knowledge of data analysis systems e.g.: Y3 to facilitate analysis of experimental data
• Working knowledge of Design of Experiments (DoE)
• Proven ability to collaborate with local and overseas teams on projects
• Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications.
• Ability to be a self-motivated individual and be adaptable to Micron’s changing needs in terms of working extended hours, if required
• Proven ability to work in a demanding & dynamic environment and able to prioritize and manage multiple projects simultaneously
• Ability to travel for extended periods of time and stay at Boise TD for 4-6 months at a stretch to work on technology development.

As a NAND CMOS Device Engineer, you will help set the direction for current and future CMOS technology for Micron’s NAND Memory Technology Roadmap!

You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few! In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.

Together with your peers, you craft and implement our NAND-CMOS roadmap and make sure to align to product roadmaps

• You give directions on how to improve our device portfolio, both in performance and cost effectiveness
• You define, execute, and analyze silicon experiments for future device generations
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets
• You strive to ensure that transistor models are correctly targeted to anticipate final silicon
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
• Highly motivated to ensure transistors are developed meeting the required reliability standards
• You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
• You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues

Minimum Qualifications:

• MS/PhD in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
• 5 plus years industry experience in the field of CMOS device design, simulation, characterization
• Experience in developing advanced logic transistor technologies
• Experience in developing Analog FETs operating at higher Voltages
• Preferred: Experience in the field of High Voltage applications, reliability, characterization, device development
• Understanding of analog design concepts
• Good presentation skills
• Excellent team and mentoring skills

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

As a Senior NAND Cell Device Engineer, in the Singapore Device Technology Development group of Micron Technology Inc., you will be responsible for electrical characterization of the NAND memory cell and develop novel device solutions for cutting-edge 3D-NAND flash technologies. You will have an exciting opportunity to develop best-in class non-volatile memories and products in the world!

Job responsibilities:

• Develop an understanding of performance & reliability requirements for new NAND cells and help refine requirements, as necessary.
• Characterize NAND Memory cell and array properties to identify device improvement directions.
• Analyse automated tester data to establish product qualification gaps, identify new device corners and improve detection capabilities.
• Contribute to the architecture and process definition for state-of-the-art NAND cell, by providing expertise in NAND device physics and array operation.
• Collaborate effectively with process, integration, product, and design engineers, to address NAND memory cell deficits and deliver improvement roadmaps.

Requirements:

• M.S or Ph.D. in Electrical or Electronics Engineering, Physics or Materials Science Engineering or similar.
• 3+ years of work experience in CMOS or non-volatile memory is preferred.
• Deep understanding of semiconductor device physics and processes.
• Knowledge of statistical methods for experiment design and data analysis.
• Solid communication and reporting abilities.
• The ability to be highly skilled at driving for results.

As a Process Engineer you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology. Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization/development to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with equipment/material suppliers to achieve yield, quality, cost and risk management objectives.

Micron’s NAND Technology Integration (NTI) Singapore R&D group is looking for process development engineer to support R&D activities associated with rapid deployment of technology nodes, the process margin improvement work necessitated thereof as well as to ensure extended engagement with manufacturing on the upcoming technology nodes.

Responsibilities

• Develop and optimize unit processes to meet the yield and quality requirements of advanced NAND products.
• Quantify benefits of innovative process and/or equipment solutions to enable early experimentation and adoption for process margin improvement
• Prioritize within Singapore based manufacturing CVD/PVD teams on the key technology issues that need R&D breakthroughs.
• Integrate and troubleshoot processes as part of cross-functional teams driving yield and quality improvement
• Participate with Boise R&D Films peers on technology choices for the upcoming nodes and able to translate future technology device needs into clear process requirements
• Identify disruptive processes early on and work with manufacturing and Boise R&D to identify viable path forward
• Process development will include performing fundamental research, hardware evaluations, as well as testing processes for novel applications and generating intellectual property relevant to Micron.
• Initiate and manage experiments to widen process margins as well as to test out manufacturability of next node solutions
• Identify process simplification opportunities and drive cross functional teams in implementation
• Incorporate best known manufacturing methods into early development phase of upcoming nodes.
• Design and implement advanced process monitoring and control methodologies.
• Serve as a technical expert within Micron contributing to technical projects for improvements to processes, procedures and equipment.
• Lead team or sites or suppliers on complex, multi-disciplinary projects in quality focused meetings, process and yield improvement meetings, cost and productivity improvement meetings
• Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers.
• This position requires communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Be part of the continuous worldwide R&D engagement with suppliers pushing for breakthrough solutions.

Requirements

• Master degree or higher in Materials Science, Chemical/Microelectronic Engineering, or Physics with minimum 3 years hands-on experience in leading edge film deposition/implant technology work. Fresh PhD/Masters graduates in Materials Science, Chemical/Microelectronic Engineering or Physics are also welcome to apply.
• A deep understanding of chemical kinetics, thermodynamics, physical phenomena and their direct application to CVD/PVD deposition in various deposition methods.
• An ability to understand and troubleshoot precursor depletion effects within three dimensional structures and come up with innovative ideas to mitigate the effects.
• Basic understanding of films and interface engineering and analysis techniques thereof – SIMS, XPS, EDX, SEM/TEM.
• Understanding of various integration and structural impacts and constraints related to film deposition processes.
• An understanding of the general process steps and process flow for memory processing, planar and vertical NAND memory in particular.
• Working knowledge of data analysis systems e.g.: Y3 to facilitate analysis of experimental data
• Working knowledge of Design of Experiments (DoE)
• Proven ability to collaborate with local and overseas teams on projects
• Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications.
• Ability to be a self-motivated individual and be adaptable to Micron’s changing needs in terms of working extended hours, if required
• Proven ability to work in a demanding & dynamic environment and able to prioritize and manage multiple projects simultaneously
• Ability to travel for extended periods of time and stay at Boise R&D for 4-6 months at a stretch to work on technology development.

FE Central Product Integration Engineering (CPIE) HPM PI Engineer

As FE CPIE HPM (High Performance Memory) PI Engineer at Micron Technology, Inc., you will be responsible for working with global Micron network to drive HPM Product yield, quality improvement, new product introduction (NPI) through technical expertise, business process management and project execution.

Responsibilities and Tasks

• Promote worldwide synergy for improved benchmark performance and efficiency gains through global project management and execution, network BKM leveraging and enhancement, and business process creation and re-engineering.
• Active engagement with PI Loop taskforce and/or team in network to address yield and quality challenges, optimize process flow in a timely manner to achieve BIC yield performance.
• Maintain and enhance domain knowledge and technical expertise, explore innovation opportunities with strategic thinking and systematic approach.
• Maintain a strong and open relationship with peer group and managers in other functional areas within central team and outside in areas such as Fab, TD, Product Engineering, GQ. Communicate and respond to issues in a timely manner. Help drive to fix the issue where necessary.
• Demonstrate ability to give effective presentations to both small and large groups on project updates and new initiative proposals.
• Periodically follow up with manager to ensure all type of goals are met and get assistance to remove obstacles.
• Travel to Micron Fab locations as necessary for face-to-face collaboration for program requirements.

Requirements

• Background in electrical engineering, materials science, transistor physics and semiconductor process knowledge.
• Experience with Semiconductor Device Physics, DRAM operations, wafer fabrication process flows, parametric/electrical test, and probe yield will be an added benefit to this position.
• Good data analysis, troubleshoot, problem solving, reporting and presentation skills.
• Good multi-tasking, verbal, and written communication skills.
• Strong interpersonal skills and customer/co-worker relationships. Successfully demonstrated teamwork skills with a strong focus on developing good team dynamics.
• Good organizational capabilities and ability to work effectively with minimal supervision.
• Intermediate to advanced PC skills including Microsoft Office.
• Ability to be flexible with job responsibilities and take the initiative to assume added responsibilities.
• Travel Required: Yes. Willing to travel as needed to support department goals
• Travel Frequency: 20-50%.

Education

• Bachelor’s degree and above in Electrical Engineering, Microelectronics, Physics, Chemistry, Materials Science or related field of study

About Us:

Micron is a global leader in memory solutions, groundbreaking transformative technology that shapes how the world uses information to enrich life for all. With a history spanning over 40 years, Micron has been instrumental in major technological advancements, providing efficient memory and storage systems for diverse applications. As the world transitions to an economy where data drive value creation, Micron plays a pivotal role, with data becoming the new business currency, and memory and storage are strategic differentiators that redefine how we extract value from data, enriching lives globally and redefining society. Micron is also committed to sustainable development, focusing on employee health and safety, environmental quality, and community support.

Main Responsibilities:

Reporting to the Senior Director, Supply Chain Optimization, you will play a pivotal role in optimizing end-to-end inventory and exceeding customer delivery performance expectations. This role is essential for uncovering rich and actionable inventory insights, ensuring working capital is accurately deployed, and delivering outstanding customer experience. You will lead global teams which are responsible for alignment of customer service level targets to demand segments, multi-echelon inventory optimization, cross functional facilitation to improve inventory health, disposition of impaired inventory, management of customer stated lead time policies, and inventory reserves management.

Other Responsibilities:

• Lead and develop the Inventory Optimization, Inventory Management, and Customer Service Level teams.
• Oversee multi-echelon inventory optimization and other supply chain policy management.
• Measure inventory health and implement proactive and reactive strategies for improvement.
• Define and manage structural Days Inventory Outstanding (DIO) targets.
• Facilitate multiple cross functional inventory and service level forums.
• Collaborate with Assembly & Test, Quality, Engineering, and New Product Operations teams to improve inventory processes.
• Be responsible for quarterly reserves and write-down processes for raw materials, in partnership with Finance.
• Monitor and improve customer service levels, balancing inventory levels to meet service expectations without compromising financial performance.

You Are:

• An outstanding leader with a consistent track record in leading supply chain, industrial engineering or relevant areas, with strong analytical and problem-solving skills, and the ability to drive critical initiatives in a highly organized and adaptable manner
• Possess a Bachelors’ Degree or above and at least 12 years of work experience across key business functional areas such as inventory management, supply chain, manufacturing or a related field.
• Strong understanding of semiconductor product and manufacturing processes.
• Excellent interpersonal skills with the ability to work & collaborate at all levels and influence partners without direct authority.
• Passionate about driving improvements and achieving operational excellence.
• The ability to form collaborative partnerships with internal and external partners.

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities
• Install equipment and/or CIP hardware for evaluation by the process development team to enable early introduction, maturity, and adoption for current and next node of 3D NAND technology.
• Work with the Fab layout and facility team to ensure smooth and on time installation and operation of the equipment.
• Work with process development team to quantify benefits of equipment/CIP hardware.
• Develop and optimize existing equipment hardware to meet the productivity requirements of advanced 3D NAND parts.
• Participate with Boise TD equipment development peers on technology choices for the upcoming nodes and able to translate future technology needs into clear equipment requirements.
• Identify disruptive equipment early, work with manufacturing and Boise TD to identify viable evaluation path forward in manufacturing.
• Design and implement advanced equipment monitoring and control methodologies.
• Lead team or sites or suppliers on complex projects in focused meetings with end goal of maturity an equipment technology in record times for technical advantage, cost and productivity.
• Serve as a technical expert within Micron, provide advice and recommendations to senior management on improvements from equipment development. Lead and initiate innovation projects through patents/technical papers.
• Identify and resolve safety hazards; follow safety procedures including lockout, chemical safety, lifting techniques and ergonomically correct methods.

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above

Location: Fab10N

Closing Date: Until filled

Description

As a NAND CMOS Process Integration Engineer in the Singapore Technology Development department at Micron Technology Inc., you will be responsible for developing 3D NAND CMOS devices scaling and enhancing their performance, reliability and manufacturability.

Responsibilities:

• Develop and innovate critical CMOS modules. Drive multi-functional teams to optimize existing process flows and develop new innovative solutions to meet product requirements and manufacturability.
• Develop/re-define critical specifications criteria for optimum product performance and drive activities to get them to manufacturing process capability.
• Extract and analyze inline, probe, parametric, reliability, and other critical metrics and predict future behavior of the CMOS device performance of the product to enable early innovative solutions to meet product and device specifications.
• Early introduction, characterization and validation of new CMOS device models and test structures for developing future NAND products.
• 3 dimensions analysis with the use of K2 view to extract layout information and combine with the doping profiles of each implant step for product development and integration solutions.
• Interact and collaborate with TCAD, modeling, and layout teams to drive clearer definition of CMOS device and reliability improvements across multiple tech-nodes and designs.
• Coordinate activities at manufacturing site towards gating experiment funding, conversions, and effectively communicate decisions made to all R&D, manufacturing, and relevant partners.
• Take on leadership role at quarterly yield summits and monthly program reviews in summarizing complex problems, deriving and explaining actions taken to address them and getting R&D, manufacturing, and senior management teams on the same page.
• Assist in the transfer of a new technology from R&D to manufacturing and contribute towards ensuring successful ramp and qualification. Supporting the transfer, documentation and training of module fundamentals into manufacturing.

Requirements:

• MS or PhD in Electrical Engineering preferably specialized in Microelectronics and Semiconductor Device Physics. Prior technology development and tech transfer/manufacturing experiences are preferred.
• Fresh MS/PhD candidates with knowledge of semiconductor process Integration, device physics and CMOS engineering.
• Direct fab experience with nonvolatile memories manufacturing, knowledge of TCAD, K2 view layout, and NAND product are highly desirable.
• Ability to develop a strong, holistic, end-to-end understanding of CMOS device and its related module on NAND technologies, related structural and electrical fail mechanisms.
• Deep understanding of probe failure mechanism, ability to do electrical bench data collection.
• Self-motivated, self-governing with proven ability to work in a demanding and dynamic environment.
• Experienced in coordinating cross-functional teams to achieve a goal.
• Solid data analysis, communication and reporting abilities with demonstrated presentation abilities.
• Curiosity and natural tendency of learning new things independently.
• Ability to travel for extended periods of time to the US for collaborative R&D work.

Working Location: Fab10, 1 North Coast Drive, Singapore 757432

As a NAND CMOS Device Engineer, you will help set the direction for current and future CMOS technology for Micron’s NAND Memory Technology Roadmap!

You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few! In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.

Together with your peers, you craft and implement our NAND-CMOS roadmap and make sure to align to product roadmaps

• You give directions on how to improve our device portfolio, both in performance and cost effectiveness
• You define, execute, and analyze silicon experiments for future device generations
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets
• You strive to ensure that transistor models are correctly targeted to anticipate final silicon
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
• Highly motivated to ensure transistors are developed meeting the required reliability standards
• You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
• You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues

Minimum Qualifications:

• MS/PhD in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
• 5 plus years industry experience in the field of CMOS device design, simulation, characterization
• Experience in developing advanced logic transistor technologies
• Experience in developing Analog FETs operating at higher Voltages
• Preferred: Experience in the field of High Voltage applications, reliability, characterization, device development
• Understanding of analog design concepts
• Good presentation skills
• Excellent team and mentoring skills

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

Your primary responsibilities will be:

• Risk assessment of NAND cell reliability, identification of the process/trim/test strategy to bridge the gaps for JEDEC and internal product qualification.
• Design experiments to identify and segment the limiting reliability mechanisms impacting NAND quality.
• Design high volume electrical experiments (both wafer level and component level) and perform statistical data analysis to validate process/trims solutions required to close reliability gaps.
• Update management and provide continuous feedback to process development and product engineers on the NAND reliability status and roadmap to bridge gaps.
• Contribute to develop forward looking technology path finding for next NAND generation, including reliability risk assessment and product capability projections, identify innovative design and product features required to meet quality specification.

Required skills:

• Proven experience with NAND device structures, operations and algorithms
• Knowledge and understanding of electrical properties of semiconductor and insulator materials, semiconductor device physics and solid-state physics
• In-depth understanding of physics-based modeling of non-volatile memory and semiconductor devices failure mechanisms, reliability analysis
• Knowledge and understanding of statistical analysis and numerical computing software (Matlab, Octave, JMP)
• Knowledge and ability of scripting languages (C, C++, Matlab, Perl)
• Familiar with Big Data and database queries
• Knowledge of JEDEC standards

As a Senior- level Device Engineer in Micron's Front End Central Process Integration Engineering (cPIE) team, you will co-work with the global Micron network on improving Device performance to meet product yield and quality requirements, through optimizing process steps, reducing device variability, optimizing design layout or test specs, and standardizing device engineering business process and working methodology. The primary focus could be either DRAM or NAND flash memory when needed.

Requirements:

• Bachelor's degree with a minimum 5 years of relevant working experience is required. Master's or Ph.D. degree in Physics or Engineering areas is preferred.
• Working experience in fab process or process integration or test engineering. Direct experience in CMOS or NAND/DRAM memory device engineering is preferable.
• Require proven knowledge in semiconductor physics and understanding of transistor operations, scaling limitations and reliability, basic knowledge of CMOS circuits and characterization methods. Experience in advance transistor architectures such as High-K metal gate or FinFET or GAA is preferred.
• Deep understanding of at least one semiconductor fabrication process area, including tool sets, process mechanism, tuning knobs, etc.
• Excellent data analysis skills using at least one software (JMP, SPOTFIRE, etc).
• Strong task ownership, self-motivated to work with other team members to make progress collaboratively.
• Open-minded attitude to learn new skills and could adapt to new working environment swiftly.
• Good communication skills. Proficient in English (speaking and written). Working-level communication capability in Mandarin Chinese OR Japanese is preferred.
• Good digital literacy with MS office. Programming capability such as Python is a plus.
• Occasional domestic and international business travel is required.

Job responsibility:

cPIE Device Engineer, responsible for product yield and quality improvement, by working collaboratively with Micron global network, to improve device performance, standardize business procedure and working methodology.

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities

• Leading the design, development and characterization of new tools and identifying and closing any hardware and procedural gaps.
• Innovate solutions that enable best in class performance
• Oversee installation and upgrades of tools ensuring quality of work, cost control and alignment to project schedule.
• Engage equipment vendors to improve current products and implement roadmap needs.
• Work with Process Engineers, Manufacturing, Procurement, and Vendor partners to develop a comprehensive package capable for our volume manufacturing sites.
• Generating and maintaining documents that outline equipment performance, operating procedures, maintenance specifications, and cost metrics.
• Support Internal And External Audits

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above

Location: Fab10N

Closing Date: Until filled

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities
• Install equipment and/or CIP hardware for evaluation by the process development team to enable early introduction, maturity, and adoption for current and next node of 3D NAND technology.
• Work with the Fab layout and facility team to ensure smooth and on time installation and operation of the equipment.
• Work with process development team to quantify benefits of equipment/CIP hardware.
• Develop and optimize existing equipment hardware to meet the productivity requirements of advanced 3D NAND parts.
• Participate with Boise TD equipment development peers on technology choices for the upcoming nodes and able to translate future technology needs into clear equipment requirements.
• Identify disruptive equipment early, work with manufacturing and Boise TD to identify viable evaluation path forward in manufacturing.
• Design and implement advanced equipment monitoring and control methodologies.
• Lead team or sites or suppliers on complex projects in focused meetings with end goal of maturity an equipment technology in record times for technical advantage, cost and productivity.
• Serve as a technical expert within Micron, provide advice and recommendations to senior management on improvements from equipment development. Lead and initiate innovation projects through patents/technical papers.
• Identify and resolve safety hazards; follow safety procedures including lockout, chemical safety, lifting techniques and ergonomically correct methods.

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above
Location: Fab10N
Closing Date: Until filled

As NAND Sg Process Development (PD) Program Management Engineer, you will support the Program Manager, in his collaboration work with Technology Development (TD) peers, High Volume Manufacturing (HVM) Fabs, Operations Central Teams (OCT) and other stakeholders to drive best in class performances and all critical initiatives for NAND nodes to meet program milestones.

You will play a key role in establishing and managing cost programs to meet allocated capital expenditure budget, operational expenditure cost management; and deliver node-over-node cost per gigabit (CPGB) reduction targets meeting business requirements.

You will work in a fast-paced environment with the world’s Best NAND TD team in a role that is highly Collaborative and requires a great deal of Customer Focus; continuous improvement and an Innovative growth mindset are required to achieve desired results. You will work within a Process Development organization alongside leaders and engineers from Fab functional Process Areas.

Responsibilities:

• Regular interaction with PD/PI team for MOR Updates/Tracking in close collaboration with Industrial Engineering (IE) Modeling Team.
• Drive alignment and timely delivery of results on critical projects, manage execution of TD roadmaps/strategies to meet milestones.
• Drive continuous improvement of PMI/SPC from process areas, publish roadmaps, highlight risks and mitigate.
• Prequal Expense: Work with stakeholders to drive prequal expense reduction (materials, spares etc).
• TD-University Engagements: Engage with Talent Acquisition teams to initiate/support initiatives to build strong TD talent pipelines.
• EBD Grants: Collaborate with Finance Team to comply with regular submissions and meet yearly audits.
• Additional portfolio includes Micron Voice Engagements, managing Dept budget, compliance with NMI processes, related TD audits and new scopes along the way that contribute to NAND program successes.

Successful candidates for this position will have:

• Bachelor/Masters in related Engineering fields.
• Familiar with both TD and manufacturing environment and business processes
• Extremely strong organizational and communication skills.
• Strong interpersonal skills for smooth collaboration with cross-functional teams.
• Solid communication skills for cross department alignment and providing clarity to leadership and executive teams.
• Highly motivated and adaptable to our demanding, dynamic and rapidly changing work environment.

Micron is a global leader in NAND technology, pushing the boundaries of semiconductor possibilities. As the Lead (SMTS/Sr. Mgr) of NAND CMOS Team, you will be responsible for the introduction and ramp of ALL NAND products in Singapore, and ensure that all CMOS Device aspects (time-0 and Reliability) are fulfilled with highest quality. You will ensure that all Device VDLs are monitored on a weekly basis, manage a Device Health dashboard (time0 and REL), and provide direction on device optimization/centering to ensure all downstream product requirements are fulfilled on-time.

Leader Responsibilities:

• Ensure that all CMOS VDLs meet Device Maturity Index (DMI) requirements.
• Be the Electrical-SPEC (ESPEC) gate-keeper across all NAND CMOS technologies (through process conversions), and ensure high confidence ESPEC compliance is maintained throughout.
• Manage & Maintain ESPEC spec-source and ensure that performance is compliant with PDK commit. If issues arise, work closely with Design for DTCO containment.
• Have in-depth understanding and ensure full compliance to all key business processes (ESPEC, DTCO, FMEA, DMI, etc..)
• Have in-depth understanding of circuit usage/fail modes (for every VDL), and be able to understand Live-Die vs. Param layout differences.
• Have in-depth understanding of NAND Voltage Spec (VSPEC) document, and ensure that you work with partner Produce & Quality organizations to guarantee 0 VSPEC violations through all end-2-end test methodologies (Probe, Qual flows).
• You will work closely with Device Reliability teams to enable fast reliability flows, towards establishment of continuous line monitor of REL health.
• You will engage seamlessly with the CMOS Process Integration and Device Technology Teams, and foster a One-Team culture always.
• For every Device issue, you will inculcate an FMEA-first and TCAD-first mindset, before deploying silicon solutions.
• Develop a culture of excellence, psychological safety, inclusion, and engagement.
• Continuously improve CMOS team technology approaches and business processes to meet customer needs and adapt to the changing landscape.
• Implement project management best known methods (BKMs) to coordinate activities and deliver projects on schedule.
• Drive effective multi-functional collaboration with internal customers (design, PE, etc.) and partners (integration, process, scribe, modeling, etc.).
• Negotiate and clarify roles and responsibilities with all partner organizations.
• Summarize complex problems and communicate solutions and execution plans to executive leadership.
• Maintain seamless communication between all departments and sites across organizational borders.

Qualifications:

• MS degree (required) or PhD (preferred) with 7-10+ years of DRAM and/or NAND research and development experience.
• Proven capability to deliver novel technology solutions and successfully resolve complex issues that span multiple groups.
• Proven ability to think and communicate clearly in urgent and stressful situations.
• Strong background in CMOS integration, scaling, and device physics.
• Deep knowledge of Design of Experiments (DOE) principles and analytical skills.
• Innovation track record with a proactive approach to exploring new ideas and adapting quickly to change.

Micron is a global leader in NAND technology, pushing the boundaries of semiconductor possibilities. As the Lead (SMTS/Sr. Mgr) of NAND CMOS Team, you will be responsible for the introduction and ramp of ALL NAND products in Singapore, and ensure that all CMOS Device aspects (time-0 and Reliability) are fulfilled with highest quality. You will ensure that all Device VDLs are monitored on a weekly basis, manage a Device Health dashboard (time0 and REL), and provide direction on device optimization/centering to ensure all downstream product requirements are fulfilled on-time.

Leader Responsibilities:

• Ensure that all CMOS VDLs meet Device Maturity Index (DMI) requirements.
• Be the Electrical-SPEC (ESPEC) gate-keeper across all NAND CMOS technologies (through process conversions), and ensure high confidence ESPEC compliance is maintained throughout.
• Manage & Maintain ESPEC spec-source and ensure that performance is compliant with PDK commit. If issues arise, work closely with Design for DTCO containment.
• Have in-depth understanding and ensure full compliance to all key business processes (ESPEC, DTCO, FMEA, DMI, etc..)
• Have in-depth understanding of circuit usage/fail modes (for every VDL), and be able to understand Live-Die vs. Param layout differences.
• Have in-depth understanding of NAND Voltage Spec (VSPEC) document, and ensure that you work with partner Produce & Quality organizations to guarantee 0 VSPEC violations through all end-2-end test methodologies (Probe, Qual flows).
• You will work closely with Device Reliability teams to enable fast reliability flows, towards establishment of continuous line monitor of REL health.
• You will engage seamlessly with the CMOS Process Integration and Device Technology Teams, and foster a One-Team culture always.
• For every Device issue, you will inculcate an FMEA-first and TCAD-first mindset, before deploying silicon solutions.
• Develop a culture of excellence, psychological safety, inclusion, and engagement.
• Continuously improve CMOS team technology approaches and business processes to meet customer needs and adapt to the changing landscape.
• Implement project management best known methods (BKMs) to coordinate activities and deliver projects on schedule.
• Drive effective multi-functional collaboration with internal customers (design, PE, etc.) and partners (integration, process, scribe, modeling, etc.).
• Negotiate and clarify roles and responsibilities with all partner organizations.
• Summarize complex problems and communicate solutions and execution plans to executive leadership.
• Maintain seamless communication between all departments and sites across organizational borders.

Qualifications:

• MS degree (required) or PhD (preferred) with 7-10+ years of DRAM and/or NAND research and development experience.
• Proven capability to deliver novel technology solutions and successfully resolve complex issues that span multiple groups.
• Proven ability to think and communicate clearly in urgent and stressful situations.
• Strong background in CMOS integration, scaling, and device physics.
• Deep knowledge of Design of Experiments (DOE) principles and analytical skills.
• Innovation track record with a proactive approach to exploring new ideas and adapting quickly to change.

• Supporting managers: Assisting managers with operational issues, and overseeing daily shift operations
• Ensuring efficiency: Ensuring that all operations are carried out in a timely and efficient manner
• Maintaining equipment: Maintaining the company's equipment and materials
• Managing inventory: Overseeing business inventories, stocks, and supplies
• Handling complaints: Handling client complaints and finding solutions
• Reporting inventory issues: Reporting damaged or missing inventory to the manager

Duties and Responsibilities

Ø Control project timelines and ensure smooth project implementation

Ø Conduct Business analysis and fact finding at client organisations

Ø Deliver project objectives as to cost, quality, timing and specs in relation to company and client requirements

Ø Manage and address project risks and issues

Ø Maintain close communication with clients and internal staff

Requirements

Ø Degree in IT, Engineering or related discipline

Ø Must be familiar with Microsoft Dynamics Nav/BC

Ø Knowledge with SQL database environment

Ø Able to work independently and under pressure

Ø Strong communication and problem resolution skills

Ø Able to guide and motivate team members

Ø At least 3 year of relevant work experience

Responsibilities:

• Solution Selling for Mobile & Web Application.
• Identify and develop sales opportunities in Singapore market.
• Develop plans and sales strategies to increase branding and market share.
• Prepare sales presentations and solution demonstration.
• Prepare Sales proposal.
• Work with Marketing team to develop sales campaigns to target vertical industry.
• Forecast monthly, quarterly and annual sales revenue and generate timely sales report.

Job requirements:

• Experience in Software Solution Selling
• Good working attitude and communication skills.
• Minimum 4 years Software Sales experience
• IT background preferred.

About Love & Bloom:
Love & Bloom is dedicated to offering beautifully crafted handicrafts, collectibles, and gifts that bring joy to our customers’ lives. We strive to create exceptional shopping experiences through excellent customer service, thoughtful product curation, and a welcoming brand presence. As a growing organization, we embrace innovation, collaboration, and authenticity, building a workplace where team members are inspired to thrive and grow together.

Role Overview:
As a Sales Manager at Love & Bloom, you will lead a passionate team of sales professionals to achieve and exceed revenue targets. Your primary responsibility is to develop and execute sales strategies that expand our customer base, improve in-store and online sales conversions, and enhance overall customer satisfaction. You will leverage your sales expertise to mentor team members, implement performance metrics, and drive continuous improvement. Your hands-on leadership style and strategic thinking will ensure that Love & Bloom not only meets its sales goals but also strengthens the loyalty of its customers.

Key Responsibilities:

• Sales Strategy & Planning:Develop comprehensive sales plans aligned with Love & Bloom’s brand values, market position, and business objectives.
  Monitor industry trends, competitor activities, and customer feedback to identify new market opportunities and refine sales approaches.
  
• Team Leadership & Development:Recruit, train, and mentor the sales team, fostering a supportive and high-performance environment.
  Set clear performance expectations, provide regular feedback, and implement ongoing training programs to strengthen product knowledge, customer engagement, and negotiation skills.
  
• Performance Management & Reporting:Establish key performance indicators (KPIs) and use data-driven insights to evaluate team performance, identify areas for improvement, and celebrate successes.
  Prepare periodic sales reports, analyzing trends, pipeline forecasts, and customer behavior, then share actionable recommendations with management.
  
• Customer Engagement & Relationship Building:Promote a customer-centric culture within the sales team, ensuring that every interaction—whether in-store, online, or via other channels—reflects Love & Bloom’s commitment to exceptional service.
  Develop and maintain strong relationships with key clients, seeking opportunities to deepen loyalty, upsell new products, and encourage repeat business.
  
• Collaboration with Cross-Functional Teams:Work closely with marketing, operations, and product teams to ensure that sales initiatives align with overall brand strategies and inventory management goals.
  Provide insights on product demand, merchandising effectiveness, and promotional campaigns, supporting product launches and seasonal marketing efforts.
  

Key Responsibilities:

• Oversee day-to-day operations on the construction site.
• Coordinate and supervise subcontractors, laborers, and other construction staff.
• Ensure project timelines are met and manage any delays or issues that arise.
• Monitor and enforce site safety regulations and compliance with local building codes.
• Maintain communication with clients, architects, engineers, and other stakeholders.
• Review project plans, schedules, and budgets to ensure successful project delivery.
• Maintain accurate records of work performed and materials used.
• Troubleshoot and resolve issues as they arise on-site.

Requirements:

• Minimum 5 years experience as a Construction Site Manager or similar role.
• Well-versed in understanding and application of electrical codes and standards including Singapore Standards, IEC, IEEE, etc