Working Location: Islandwide
Contract Duration: Up to 12 Months Contract

Working Hours: Monday – Thursday: 8.30am – 6pm, Friday: 8.30am – 5.30pm
Basic Salary: Up to $2,980 per month

Background:

This is a generic job posting for Entry Level applicants who are interested in a role within the Social Service sector. More details will be furnished during the screening process.

Responsibilities:

Your job duties may involve:

• Processing of Applications: Assist in processing and assessing online applications received in the system.
• Training Administration: Assist in training logistics such as setting up and tearing down of training venues, coordinating refreshments, and tech support.
• Data Management: Collecting, analysing, and presenting data on dashboards. (IT background preferred)
• General Administration: Coordination of meetings, minutes taking, tracking of returns, data entry, etc
• Fieldwork: Assist Adult Protection Officers in field work.
• IT System Administration: Assist in managing account and compliance matters for systems, support in tech refresh and major system enhancements.
• Other ad-hoc duties as assigned.
• 
  

Job Requirements:

· Diploma or Bachelor’s Degree in Psychology / Social Work / Sociology / Early Childhood Education or other relevant disciplines.

· Immediate Starters are preferred (Not serving any notice period)

· Entry Level applicants with interest in the Social Service sector are welcomed to apply.

Interested candidates, please forward a copy of your resume to: [email protected].

We regret to inform that only shortlisted candidates will be notified.

Justin Lee
Registration No: R22107715
APBA TG Human Resource Pte Ltd
EA License: 14C7275

Interested applicants are invited to apply directly at the NUS Career Portal

Your application will be processed only if you apply via NUS Career Portal

We regret that only shortlisted candidates will be notified.

About Us

Founded in the same year that Singapore gained independence, NUS Business School stands today among the world’s leading business schools. It is distinctive for offering the best of global business knowledge with deep Asian insights, preparing students to lead Asian businesses to international success and to help global businesses succeed in Asia.

For more than 50 years, NUS Business School has offered a rigorous, relevant and rewarding business education to outstanding students from across the world. That would not have been possible without a group of dedicated professionals who are passionate about building a positive environment to grow and groom future business leaders. And we are looking to add to our BIZ family!

To learn more about the NUS Business School, please visit https://bschool.nus.edu.sg/

Job Description

The incumbent will be leading the MSc degree programmes’ marketing and promotional activities and administration at NUS Business School. The duties and responsibilities are as follows.

Events and Outreach with Business Development

• Participate in outreach events to promote the MSc programmes
• Coordinate and organise offline and online outreach events (e.g. info sessions, coffee chats, etc.) to promote the MSc programmes
• Work with the Digital Marketing colleagues to design campaigns in promoting outreach events as well as post-event engagements
• Research and identify prospective corporates and companies for B2B marketing
• Develop and nurture such relationships to explore potential scholarships and admission opportunities for their employees

Direct Marketing Campaigns

• Co-manage the email marketing campaigns and activities of the various NUS MSc Programmes
• Analyse current email marketing campaigns and make recommendations for improvement
• Leverage on the CRM to maximize marketing opportunities
• Track leads and applicants, following up through their journey and process

Content Management and Marketing

• Work closely with our MSc Programmes Office team, NUS BIZ Corporate Communications Office and other stakeholders to act as a brand guardian in terms of the look and feel of online communications as well as the tone of voice of copy
• Handle programme-related enquiries from prospects and glean insight on generating relevant content strategy
• Be part of the team effort to generate and manage content ideas (including but not limited to copy, visuals, infographics, etc.) for EDMs, social media, student blogs etc.

Research and Reporting

• Conduct periodic research on customers, market conditions and competitors
• Analyse and report on return on investment for the different marketing campaigns

Other roles within the office as designated by the Reporting Manager and Director.

Qualifications

• Bachelor degree from a reputable institution, with at least 3-5 years of relevant working experience including marketing academic programmes in tertiary institutions will be preferred
• Some Business Development experience is preferred
• High level of written and oral communication skills
• Experienced, confident and effective working in cross-cultural settings
• Meticulous with an eye for detail and a keen appreciation of good documentation
• Ability to manage multiple and competing tasks and deadlines well, and with a high degree of accuracy
• Team player with a good combination of high intelligence, emotional and cultural quotient
• IT savvy, with good knowledge of Microsoft Office Applications

(Appointment job grade will commensurate with the selected candidate's experience)

The Industry Development Division 2 (IDD2) within the Training Partners Group at SkillsFuture Singapore (SSG) is committed to fostering a high-quality Continuing Education and Training (CET) ecosystem. This is achieved through strategic partnerships with CET providers and engaging enterprises in skills development.

The Manager/Senior Manager will report to a Team Lead and will be part of the Programme Policy, Finance & System Management team. The role involves managing strategic CET partners to develop capabilities, supporting sectoral manpower development, identifying best-in-class partners, and implementing workforce transformation strategies.

a) Stakeholders’ Engagement and Partnership Management

a. Identify, appoint, and engage strategic training partners to support SkillsFuture and national initiatives.

b. Collaborate with SSG Divisions to implement, manage, and evaluate programme outcomes.

c. Perform contract management, including negotiating partnership scopes, preparing budget proposals, managing contract sign-offs, and handling grant disbursements.

d. Conduct and monitor periodic reporting of training partners' efforts and programme outcomes.

b) Programme Policy Review and Monitoring

a. Review operational policies and processes, draft submissions, and present to Management in consultation with stakeholders.

b. Conduct regular reviews and evaluations of programmes to assess effectiveness and impact.

c. Analyse data and performance metrics to identify areas for improvement and recommend enhancements.

d. Communicate findings and recommendations to stakeholders and support the implementation of changes.

e. Track progress and outcomes of programmes, gathering and analysing data for reporting.

c) Systems Coordination

a. Coordinate system transition activities, including communications to stakeholders.

b. Perform data preparation, cleansing, and participate in user requirement and User Acceptance Tests.

c. Ensure data integrity of programmes, agreements, and courses in the Training Grant System.

d) Admin & Finance Management

a. Support management of key SSG programmes, liaising with training providers for corporate reporting and programme closure.

b. Monitor and review budget/cashflow utilization and outcome achievements.

c. Oversee Customer Relationship Management cases and ensure timely responses.

d. Review and improve knowledge management processes.

Requirements:

· Tertiary qualifications or equivalent work experience.

· Up to 7 years’ experience in partnership management, budget/programme review, and implementation.

· Proven networking and negotiation skills, with the ability to engage stakeholders at all levels.

· Strong analytical and systematic problem-solving skills, with the ability to derive insights from data.

· Proficient in data collation, management, analysis, and presentation.

· Performance-driven, outcome-oriented, and meticulous.

· Ability to effectively prioritize tasks and meet project deadlines.

· Proactive, self-motivated, with a strong sense of accountability and ownership.

· Adaptable and open to learning, with a willingness to embrace new challenges.

· Excellent writing, communication, and digital literacy skills.

Candidates without the required qualification but possess the relevant work experience are welcome to apply.

Successful candidates will be offered a 2-year contract in the first instance and may be considered for an extension or be placed on a permanent tenure.

Responsibilities

• To develop and maintain strong, long-term relationships with key corporate and maritime clients.

• To identify new business opportunities with existing accounts by collaborating with clients to develop corporate healthcare solutions to meet their evolving needs, including upselling or cross-selling additional services.

• To actively manage and track the end-to-end sales cycle of opportunities from lead generation to deal closing and contracting, including maintaining an up-to-date sales pipeline and disciplined process of client relationship management.

• To ensure smooth and timely delivery of commercial projects from deployment planning to on-the-ground execution, working closely with internal teams such as operations, procurement, technology, finance, and HR.

• Support acquisition of new clients by working closely with Chief Corporate Development Officer to engage and cultivate potential accounts.

Requirement

• Bachelor degree in Business Administration, Marketing, Healthcare Management, or related field

• Minimum of 10 years of experience in business development, sales operations, or a related role, preferably within the healthcare sector

• Strategic thinker with strong problem-solving skills and the ability to adapt to a rapidly changing environment

• Knowledge of the Maritime sector and its health and safety regulations is a plus

Interested candidates please send in your resume to:

[email protected]

EA Personnel: Valerie Yong Kian Fung

CEI No.: R1103704

Recruit Express Pte Ltd, EA License No.: 99C4599

1. Singapore Citizens or PRs are preferred;

2. It is best to have more than 3 years of work experience in BEAUTY CENTRE MANAGER OR SHOP SALES MANAGER .

3. The salary range is between SGD 6000-11999.

4.Work 6 days a week, overtime on Saturday and Sunday, shift work system.

Interested applicant please email your resume at [email protected] or contact us at +65 86969408.

Singjob International Pte Ltd | Rainobw Deng | R1871429 | EA License No. 18C9193

Your primary responsibilities will be:

• Risk assessment of NAND cell reliability, identification of the process/trim/test strategy to bridge the gaps for JEDEC and internal product qualification.
• Design experiments to identify and segment the limiting reliability mechanisms impacting NAND quality.
• Design high volume electrical experiments (both wafer level and component level) and perform statistical data analysis to validate process/trims solutions required to close reliability gaps.
• Update management and provide continuous feedback to process development and product engineers on the NAND reliability status and roadmap to bridge gaps.
• Contribute to develop forward looking technology path finding for next NAND generation, including reliability risk assessment and product capability projections, identify innovative design and product features required to meet quality specification.

Required skills:

• Proven experience with NAND device structures, operations and algorithms
• Knowledge and understanding of electrical properties of semiconductor and insulator materials, semiconductor device physics and solid-state physics
• In-depth understanding of physics-based modeling of non-volatile memory and semiconductor devices failure mechanisms, reliability analysis
• Knowledge and understanding of statistical analysis and numerical computing software (Matlab, Octave, JMP)
• Knowledge and ability of scripting languages (C, C++, Matlab, Perl)
• Familiar with Big Data and database queries
• Knowledge of JEDEC standards

As a Senior- level Device Engineer in Micron's Front End Central Process Integration Engineering (cPIE) team, you will co-work with the global Micron network on improving Device performance to meet product yield and quality requirements, through optimizing process steps, reducing device variability, optimizing design layout or test specs, and standardizing device engineering business process and working methodology. The primary focus could be either DRAM or NAND flash memory when needed.

Requirements:

• Bachelor's degree with a minimum 5 years of relevant working experience is required. Master's or Ph.D. degree in Physics or Engineering areas is preferred.
• Working experience in fab process or process integration or test engineering. Direct experience in CMOS or NAND/DRAM memory device engineering is preferable.
• Require proven knowledge in semiconductor physics and understanding of transistor operations, scaling limitations and reliability, basic knowledge of CMOS circuits and characterization methods. Experience in advance transistor architectures such as High-K metal gate or FinFET or GAA is preferred.
• Deep understanding of at least one semiconductor fabrication process area, including tool sets, process mechanism, tuning knobs, etc.
• Excellent data analysis skills using at least one software (JMP, SPOTFIRE, etc).
• Strong task ownership, self-motivated to work with other team members to make progress collaboratively.
• Open-minded attitude to learn new skills and could adapt to new working environment swiftly.
• Good communication skills. Proficient in English (speaking and written). Working-level communication capability in Mandarin Chinese OR Japanese is preferred.
• Good digital literacy with MS office. Programming capability such as Python is a plus.
• Occasional domestic and international business travel is required.

Job responsibility:

cPIE Device Engineer, responsible for product yield and quality improvement, by working collaboratively with Micron global network, to improve device performance, standardize business procedure and working methodology.

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities

• Leading the design, development and characterization of new tools and identifying and closing any hardware and procedural gaps.
• Innovate solutions that enable best in class performance
• Oversee installation and upgrades of tools ensuring quality of work, cost control and alignment to project schedule.
• Engage equipment vendors to improve current products and implement roadmap needs.
• Work with Process Engineers, Manufacturing, Procurement, and Vendor partners to develop a comprehensive package capable for our volume manufacturing sites.
• Generating and maintaining documents that outline equipment performance, operating procedures, maintenance specifications, and cost metrics.
• Support Internal And External Audits

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above

Location: Fab10N

Closing Date: Until filled

Your primary responsibilities will be:

• Risk assessment of NAND cell reliability, identification of the process/trim/test strategy to bridge the gaps for JEDEC and internal product qualification.
• Design experiments to identify and segment the limiting reliability mechanisms impacting NAND quality.
• Design high volume electrical experiments (both wafer level and component level) and perform statistical data analysis to validate process/trims solutions required to close reliability gaps.
• Update management and provide continuous feedback to process development and product engineers on the NAND reliability status and roadmap to bridge gaps.
• Contribute to develop forward looking technology path finding for next NAND generation, including reliability risk assessment and product capability projections, identify innovative design and product features required to meet quality specification.

Required skills:

• Proven experience with NAND device structures, operations and algorithms
• Knowledge and understanding of electrical properties of semiconductor and insulator materials, semiconductor device physics and solid-state physics
• In-depth understanding of physics-based modeling of non-volatile memory and semiconductor devices failure mechanisms, reliability analysis
• Knowledge and understanding of statistical analysis and numerical computing software (Matlab, Octave, JMP)
• Knowledge and ability of scripting languages (C, C++, Matlab, Perl)
• Familiar with Big Data and database queries
• Knowledge of JEDEC standards

Working location:

• 1, North Coast Drive, Singapore 757432

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

As a NAND CMOS Device Engineer, you will help set the direction for current and future CMOS technology for Micron’s NAND Memory Technology Roadmap!

You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few! In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.

Together with your peers, you craft and implement our NAND-CMOS roadmap and make sure to align to product roadmaps

• You give directions on how to improve our device portfolio, both in performance and cost effectiveness
• You define, execute, and analyze silicon experiments for future device generations
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets
• You strive to ensure that transistor models are correctly targeted to anticipate final silicon
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
• Highly motivated to ensure transistors are developed meeting the required reliability standards
• You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
• You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues

Minimum Qualifications:

• MS/PhD in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
• 5 plus years industry experience in the field of CMOS device design, simulation, characterization
• Experience in developing advanced logic transistor technologies
• Experience in developing Analog FETs operating at higher Voltages
• Preferred: Experience in the field of High Voltage applications, reliability, characterization, device development
• Understanding of analog design concepts
• Good presentation skills
• Excellent team and mentoring skills

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities
• Install equipment and/or CIP hardware for evaluation by the process development team to enable early introduction, maturity, and adoption for current and next node of 3D NAND technology.
• Work with the Fab layout and facility team to ensure smooth and on time installation and operation of the equipment.
• Work with process development team to quantify benefits of equipment/CIP hardware.
• Develop and optimize existing equipment hardware to meet the productivity requirements of advanced 3D NAND parts.
• Participate with Boise TD equipment development peers on technology choices for the upcoming nodes and able to translate future technology needs into clear equipment requirements.
• Identify disruptive equipment early, work with manufacturing and Boise TD to identify viable evaluation path forward in manufacturing.
• Design and implement advanced equipment monitoring and control methodologies.
• Lead team or sites or suppliers on complex projects in focused meetings with end goal of maturity an equipment technology in record times for technical advantage, cost and productivity.
• Serve as a technical expert within Micron, provide advice and recommendations to senior management on improvements from equipment development. Lead and initiate innovation projects through patents/technical papers.
• Identify and resolve safety hazards; follow safety procedures including lockout, chemical safety, lifting techniques and ergonomically correct methods.

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above
Location: Fab10N
Closing Date: Until filled

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Responsibilities

• Process module ownership involving regE process characterizations and advanced process developments for 3D NAND and beyond.
• Work with process development engineers in Singapore and Boise, US TD site and vendors to develop regE processes that meet integration requirements for next-generation 3-D NAND nodes.
• Transfer regE processes to high volume manufacturing (Fab10), and work on continuous improvements to manufacturability.
• Address specific wafer edge issues (such as bevel defects, uniformity issues), working with Fab10N team and with key business partners on tool choices for manufacturing, evaluations etc., as applicable.
• Focus on understanding and improving regE process margins required for meeting the mature yield goal for 3D NAND parts.
• Initiate and manage experiments to widen regE process margins as well as to test out manufacturability of next node solutions
• Incorporate best known manufacturing methods into early development phase of upcoming nodes.
• Design and implement advanced process monitoring and control methodologies.
• Serve as a technical expert within Micron contributing to technical projects for improvements to processes, procedures and equipment.
• Define and leads complex, multi-functional projects of critical importance to Micron, helps to define strategic direction.
• Lead team or sites or suppliers on complex, multi-disciplinary projects in quality focused meetings, process and yield improvement meetings, cost and productivity improvement meetings
• Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers.
• This position requires communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Be part of the continuous worldwide TD engagement with suppliers pushing for breakthrough solutions.

Requirements

• Bachelors’ degree or higher in Materials Science, Chemical Engineering or Physics with minimum 2 years hands-on experiences in relevant regE process developments.
• Familiarity with regE process developments and yield improvements.
• Understanding of various integration and structural impacts and constraints related to wafer edge.
• An understanding of the general process steps and process flow for memory processing, planar and vertical NAND memory in particular.
• Working knowledge of data analysis systems e.g.: Y3 to facilitate analysis of experimental data
• Working knowledge of Design of Experiments (DoE)
• Proven ability to collaborate with local and overseas teams on projects
• Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications.
• Ability to be a self-motivated individual and be adaptable to Micron’s changing needs in terms of working extended hours, if required
• Proven ability to work in a demanding & dynamic environment and able to prioritize and manage multiple projects simultaneously
• Ability to travel for extended periods of time and stay at Boise TD for 4-6 months at a stretch to work on technology development.

As a NAND CMOS Device Engineer, you will help set the direction for current and future CMOS technology for Micron’s NAND Memory Technology Roadmap!

You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few! In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.

Together with your peers, you craft and implement our NAND-CMOS roadmap and make sure to align to product roadmaps

• You give directions on how to improve our device portfolio, both in performance and cost effectiveness
• You define, execute, and analyze silicon experiments for future device generations
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets
• You strive to ensure that transistor models are correctly targeted to anticipate final silicon
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
• Highly motivated to ensure transistors are developed meeting the required reliability standards
• You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
• You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues

Minimum Qualifications:

• MS/PhD in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
• 5 plus years industry experience in the field of CMOS device design, simulation, characterization
• Experience in developing advanced logic transistor technologies
• Experience in developing Analog FETs operating at higher Voltages
• Preferred: Experience in the field of High Voltage applications, reliability, characterization, device development
• Understanding of analog design concepts
• Good presentation skills
• Excellent team and mentoring skills

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

As a Senior NAND Cell Device Engineer, in the Singapore Device Technology Development group of Micron Technology Inc., you will be responsible for electrical characterization of the NAND memory cell and develop novel device solutions for cutting-edge 3D-NAND flash technologies. You will have an exciting opportunity to develop best-in class non-volatile memories and products in the world!

Job responsibilities:

• Develop an understanding of performance & reliability requirements for new NAND cells and help refine requirements, as necessary.
• Characterize NAND Memory cell and array properties to identify device improvement directions.
• Analyse automated tester data to establish product qualification gaps, identify new device corners and improve detection capabilities.
• Contribute to the architecture and process definition for state-of-the-art NAND cell, by providing expertise in NAND device physics and array operation.
• Collaborate effectively with process, integration, product, and design engineers, to address NAND memory cell deficits and deliver improvement roadmaps.

Requirements:

• M.S or Ph.D. in Electrical or Electronics Engineering, Physics or Materials Science Engineering or similar.
• 3+ years of work experience in CMOS or non-volatile memory is preferred.
• Deep understanding of semiconductor device physics and processes.
• Knowledge of statistical methods for experiment design and data analysis.
• Solid communication and reporting abilities.
• The ability to be highly skilled at driving for results.

As a Process Engineer you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology. Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization/development to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with equipment/material suppliers to achieve yield, quality, cost and risk management objectives.

Micron’s NAND Technology Integration (NTI) Singapore R&D group is looking for process development engineer to support R&D activities associated with rapid deployment of technology nodes, the process margin improvement work necessitated thereof as well as to ensure extended engagement with manufacturing on the upcoming technology nodes.

Responsibilities

• Develop and optimize unit processes to meet the yield and quality requirements of advanced NAND products.
• Quantify benefits of innovative process and/or equipment solutions to enable early experimentation and adoption for process margin improvement
• Prioritize within Singapore based manufacturing CVD/PVD teams on the key technology issues that need R&D breakthroughs.
• Integrate and troubleshoot processes as part of cross-functional teams driving yield and quality improvement
• Participate with Boise R&D Films peers on technology choices for the upcoming nodes and able to translate future technology device needs into clear process requirements
• Identify disruptive processes early on and work with manufacturing and Boise R&D to identify viable path forward
• Process development will include performing fundamental research, hardware evaluations, as well as testing processes for novel applications and generating intellectual property relevant to Micron.
• Initiate and manage experiments to widen process margins as well as to test out manufacturability of next node solutions
• Identify process simplification opportunities and drive cross functional teams in implementation
• Incorporate best known manufacturing methods into early development phase of upcoming nodes.
• Design and implement advanced process monitoring and control methodologies.
• Serve as a technical expert within Micron contributing to technical projects for improvements to processes, procedures and equipment.
• Lead team or sites or suppliers on complex, multi-disciplinary projects in quality focused meetings, process and yield improvement meetings, cost and productivity improvement meetings
• Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers.
• This position requires communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Be part of the continuous worldwide R&D engagement with suppliers pushing for breakthrough solutions.

Requirements

• Master degree or higher in Materials Science, Chemical/Microelectronic Engineering, or Physics with minimum 3 years hands-on experience in leading edge film deposition/implant technology work. Fresh PhD/Masters graduates in Materials Science, Chemical/Microelectronic Engineering or Physics are also welcome to apply.
• A deep understanding of chemical kinetics, thermodynamics, physical phenomena and their direct application to CVD/PVD deposition in various deposition methods.
• An ability to understand and troubleshoot precursor depletion effects within three dimensional structures and come up with innovative ideas to mitigate the effects.
• Basic understanding of films and interface engineering and analysis techniques thereof – SIMS, XPS, EDX, SEM/TEM.
• Understanding of various integration and structural impacts and constraints related to film deposition processes.
• An understanding of the general process steps and process flow for memory processing, planar and vertical NAND memory in particular.
• Working knowledge of data analysis systems e.g.: Y3 to facilitate analysis of experimental data
• Working knowledge of Design of Experiments (DoE)
• Proven ability to collaborate with local and overseas teams on projects
• Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications.
• Ability to be a self-motivated individual and be adaptable to Micron’s changing needs in terms of working extended hours, if required
• Proven ability to work in a demanding & dynamic environment and able to prioritize and manage multiple projects simultaneously
• Ability to travel for extended periods of time and stay at Boise R&D for 4-6 months at a stretch to work on technology development.

FE Central Product Integration Engineering (CPIE) HPM PI Engineer

As FE CPIE HPM (High Performance Memory) PI Engineer at Micron Technology, Inc., you will be responsible for working with global Micron network to drive HPM Product yield, quality improvement, new product introduction (NPI) through technical expertise, business process management and project execution.

Responsibilities and Tasks

• Promote worldwide synergy for improved benchmark performance and efficiency gains through global project management and execution, network BKM leveraging and enhancement, and business process creation and re-engineering.
• Active engagement with PI Loop taskforce and/or team in network to address yield and quality challenges, optimize process flow in a timely manner to achieve BIC yield performance.
• Maintain and enhance domain knowledge and technical expertise, explore innovation opportunities with strategic thinking and systematic approach.
• Maintain a strong and open relationship with peer group and managers in other functional areas within central team and outside in areas such as Fab, TD, Product Engineering, GQ. Communicate and respond to issues in a timely manner. Help drive to fix the issue where necessary.
• Demonstrate ability to give effective presentations to both small and large groups on project updates and new initiative proposals.
• Periodically follow up with manager to ensure all type of goals are met and get assistance to remove obstacles.
• Travel to Micron Fab locations as necessary for face-to-face collaboration for program requirements.

Requirements

• Background in electrical engineering, materials science, transistor physics and semiconductor process knowledge.
• Experience with Semiconductor Device Physics, DRAM operations, wafer fabrication process flows, parametric/electrical test, and probe yield will be an added benefit to this position.
• Good data analysis, troubleshoot, problem solving, reporting and presentation skills.
• Good multi-tasking, verbal, and written communication skills.
• Strong interpersonal skills and customer/co-worker relationships. Successfully demonstrated teamwork skills with a strong focus on developing good team dynamics.
• Good organizational capabilities and ability to work effectively with minimal supervision.
• Intermediate to advanced PC skills including Microsoft Office.
• Ability to be flexible with job responsibilities and take the initiative to assume added responsibilities.
• Travel Required: Yes. Willing to travel as needed to support department goals
• Travel Frequency: 20-50%.

Education

• Bachelor’s degree and above in Electrical Engineering, Microelectronics, Physics, Chemistry, Materials Science or related field of study

When you join MSB Industrial Engineer (IE) team, you will be learning the skills for capacity modeling, capital planning & execution and factory commit. In the course of work, you'll be exposed to counterparts from a diverse range of backgrounds and teams and will have opportunity for contributing to the organization while learning from each other. You're also part of the team that produce data and analyses supporting factory critical metrics decision making that include (but not exhaustively) capital expenditure, loading (revenue) commit and equipment performance improvement activity, Some aspects of the work are below

Modeling

• Perform line study for setting up capacity model
• Apply statistical analysis to acquire model parameters and Factory Operation related buffer strategy
• Work with relevant teams for auditing and updating model parameters (utilization, UPH, overhead, etc)
• Maintain Factory Planning Master Data in a manner that supports capacity analysis, factory scheduling, supply planning and multi-functional reporting needs
• Use Microsoft Excel and other applications to supplement standard model for quick turn-around analysis

Strategic Planning

• Maintain robust database of key improvement activities and equipment delivery
• Perform capacity analysis loading plan for setting boundary condition, submitting capital requirement and requesting key activities for throughput improvement
• Perform bottoms-up analyses of approved loading and modeling changes
• Coordinate space planning for incoming tool with facility, relevant equipment and manufacturing team members
• Engage in factory space optimization and network capital optimization by identifying under-utilized/obsolete capacity for transfer, re-sale and/or scrap

Factory Commit

• Engage in weekly factory commit activity in collaboration with Factory Planning and Operation teams (current quarter / rolling 13 weeks), and Central Planning teams (up to 9 months)
• Submit equipment and tooling purchase request and coordinate downstream activities: PO release, space enablement, delivery and production release
• Comprehend Tactical Operation constraint in identifying dynamic constraint workstation for robust factory loading commit
• Collaborate with Strategic Scenario and Capital Planning team on investigation of tactical boundary condition comparison with strategic boundary condition

Capital Planning

• Take charge of capacity related capital and Off-Capital items through capital lifecycle: proposal à disposal through appropriate business process and in timely manner
• Strive for capital optimization through network balancing
• Maintain capital related information in system and offline database for own area (capacity and non-capacity related) in robust manner

Space Planning

• Collaborate with Facility IE team on detailed space enablement plan for incoming tools
• Maintain database of incoming and excess tool list for communication with Facility IE

Reporting

• Understand assumptions in reports and use them effectively
• Develop and maintain reports that effectively communicate capacity information

Project Management

• Run regular meeting, take meeting minutes, record action items and ensure closed-loop and accurate completion of action items
• Use established project management approach and methodology when serving as project manager

Continuous Improvement

• Possess a continuous improvement process (CIP) approach where you are always looking for ways to improve current way of doing things
• Apply new (e.g. RPA, Tableau, Power BI) and traditional (Excel, VBA) methods to improve and automate tasks & visualization in the planning system/models

Compliance

• Finishes the required training timely
• Conducts all work in accordance with Micron EHS (Environment, Health, Safety) and ethics policies
• Provide timely feedback when quality, safety, or ethical issues arise

Requirements:

• Degree in Industrial/Mechanical/Computer Engineering and Computer Science preferable
• With at least 2 years of CCA in university, preferably in leadership positions.
• Good in written communication and presentation skills.
• Highly motivated to work in a dynamic environment, with good integrity and character.
• Programming skill will be an added advantage.
• Ability to quickly analyze situations, identify issues, and develop effective solutions under tight deadlines.
• Demonstrated capacity to maintain composure and productivity in high-pressure environments, adapting to changing priorities and challenges.
• Proven ability to prioritize tasks, manage numerous projects simultaneously, and meet deadlines without compromising quality.
• Previous internship experience in a related field, demonstrating practical application of skills and knowledge in a professional setting will be an added advantage.
• Keen in semiconductor industry
• Possess advanced Literacy and Numeracy skills

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities
• Install equipment and/or CIP hardware for evaluation by the process development team to enable early introduction, maturity, and adoption for current and next node of 3D NAND technology.
• Work with the Fab layout and facility team to ensure smooth and on time installation and operation of the equipment.
• Work with process development team to quantify benefits of equipment/CIP hardware.
• Develop and optimize existing equipment hardware to meet the productivity requirements of advanced 3D NAND parts.
• Participate with Boise TD equipment development peers on technology choices for the upcoming nodes and able to translate future technology needs into clear equipment requirements.
• Identify disruptive equipment early, work with manufacturing and Boise TD to identify viable evaluation path forward in manufacturing.
• Design and implement advanced equipment monitoring and control methodologies.
• Lead team or sites or suppliers on complex projects in focused meetings with end goal of maturity an equipment technology in record times for technical advantage, cost and productivity.
• Serve as a technical expert within Micron, provide advice and recommendations to senior management on improvements from equipment development. Lead and initiate innovation projects through patents/technical papers.
• Identify and resolve safety hazards; follow safety procedures including lockout, chemical safety, lifting techniques and ergonomically correct methods.

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above

Location: Fab10N

Closing Date: Until filled

Description

As a NAND CMOS Process Integration Engineer in the Singapore Technology Development department at Micron Technology Inc., you will be responsible for developing 3D NAND CMOS devices scaling and enhancing their performance, reliability and manufacturability.

Responsibilities:

• Develop and innovate critical CMOS modules. Drive multi-functional teams to optimize existing process flows and develop new innovative solutions to meet product requirements and manufacturability.
• Develop/re-define critical specifications criteria for optimum product performance and drive activities to get them to manufacturing process capability.
• Extract and analyze inline, probe, parametric, reliability, and other critical metrics and predict future behavior of the CMOS device performance of the product to enable early innovative solutions to meet product and device specifications.
• Early introduction, characterization and validation of new CMOS device models and test structures for developing future NAND products.
• 3 dimensions analysis with the use of K2 view to extract layout information and combine with the doping profiles of each implant step for product development and integration solutions.
• Interact and collaborate with TCAD, modeling, and layout teams to drive clearer definition of CMOS device and reliability improvements across multiple tech-nodes and designs.
• Coordinate activities at manufacturing site towards gating experiment funding, conversions, and effectively communicate decisions made to all R&D, manufacturing, and relevant partners.
• Take on leadership role at quarterly yield summits and monthly program reviews in summarizing complex problems, deriving and explaining actions taken to address them and getting R&D, manufacturing, and senior management teams on the same page.
• Assist in the transfer of a new technology from R&D to manufacturing and contribute towards ensuring successful ramp and qualification. Supporting the transfer, documentation and training of module fundamentals into manufacturing.

Requirements:

• MS or PhD in Electrical Engineering preferably specialized in Microelectronics and Semiconductor Device Physics. Prior technology development and tech transfer/manufacturing experiences are preferred.
• Fresh MS/PhD candidates with knowledge of semiconductor process Integration, device physics and CMOS engineering.
• Direct fab experience with nonvolatile memories manufacturing, knowledge of TCAD, K2 view layout, and NAND product are highly desirable.
• Ability to develop a strong, holistic, end-to-end understanding of CMOS device and its related module on NAND technologies, related structural and electrical fail mechanisms.
• Deep understanding of probe failure mechanism, ability to do electrical bench data collection.
• Self-motivated, self-governing with proven ability to work in a demanding and dynamic environment.
• Experienced in coordinating cross-functional teams to achieve a goal.
• Solid data analysis, communication and reporting abilities with demonstrated presentation abilities.
• Curiosity and natural tendency of learning new things independently.
• Ability to travel for extended periods of time to the US for collaborative R&D work.

Working Location: Fab10, 1 North Coast Drive, Singapore 757432

As a NAND CMOS Device Engineer, you will help set the direction for current and future CMOS technology for Micron’s NAND Memory Technology Roadmap!

You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few! In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.

Together with your peers, you craft and implement our NAND-CMOS roadmap and make sure to align to product roadmaps

• You give directions on how to improve our device portfolio, both in performance and cost effectiveness
• You define, execute, and analyze silicon experiments for future device generations
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets
• You strive to ensure that transistor models are correctly targeted to anticipate final silicon
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
• Highly motivated to ensure transistors are developed meeting the required reliability standards
• You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
• You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues

Minimum Qualifications:

• MS/PhD in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
• 5 plus years industry experience in the field of CMOS device design, simulation, characterization
• Experience in developing advanced logic transistor technologies
• Experience in developing Analog FETs operating at higher Voltages
• Preferred: Experience in the field of High Voltage applications, reliability, characterization, device development
• Understanding of analog design concepts
• Good presentation skills
• Excellent team and mentoring skills

Develops new or modified process formulations, defines processing or handling equipment requirements and specifications, and reviews processing techniques and methods applied in the manufacture, fabrication, and evaluation of products. Involvement may begin at any step from pilot plant to full-scale manufacturing. Coordinates design requirement review with appropriate engineering/scientific personnel to ensure compatibility of processing methods. Compiles and evaluates test data to determine appropriate limits and variables for process or material specifications. May conceive and plan projects involving definition and selection of new concepts, equipment automation technology, and approaches in the processing or development of new or improved processes.

WSP Consultancy Pte Ltd

This is a role requires a driven and detailed individual, with expertise in finance, accounting, reporting and experience with managing statutory requirements as such year-end audit, GST submission and year-end tax filing. This is a hands-on role as you will be required to take on detailed budget submissions, preparing financial reports etc.

The role has a high visibility to Management and opportunity to drive process improvements and manage outsourcing to shared services centre in Guangzhou.

Responsibilities:

1. Actively lead the accounting function, ensuring timely period end close, preparation and submission of reports, review of balance sheet schedules and reconciliations. Ensure all month end journals are recorded, and management reports prepared and submitted on time.

2. Review all intercompany reconciliations, oversee the management and resolution of discrepancies.

3. Oversee the Accounts Payable function, cashflow projections and payment runs.

4. Plan and manage the year end audits to ensure timely completion and filing of accounts. Assist with the preparation of statutory financial statements and ensure statutory deadlines are met.

5. Participate in the half yearly forecast exercise, co-ordinate data uploading from Project Finance, aggregate Company level submissions, compile and prepare the respective reports required for the review and submission.

6. Manage queries from Group companies and Asia HQ and resolve issues.

7. Review project backlog tabulation and phasing regularly. Highlight areas for follow-up and work with Project Finance on team on updates.

8. Participate actively and work closely with business leaders to support business improvements and Project Finance team on project related matters.

9. Support the team on their career and professional development.

Requirements:

• Degree in Accountancy/ACCA with at least 5 years in a related role. Good knowledge of GST, withholding tax and corporate tax.
• Experience with handling budget and reporting for multiple cost centres and divisions within a single company. Prior working experience in a service-related organization or construction industry will be advantageous.
• Team player with a hands-on, can-do attitude. Self-motivated, meticulous, keen attention to details and comfortable with handling detailed and voluminous financial reports and committed to deadlines.
• Applied knowledge of Oracle, EPM and Hyperion Financial Management and advanced EXCEL skills.
• Good verbal and written communication, comfortable communicating with multiple senior leaders.
• Adaptable and able to work under pressure, good personal efficiency, can-do attitude.

Excellent execution on assembly process for 1st NPI success and smooth transfer process from NPI to HVM

• Excellent execution of the qualification of NPI products / packages build that proliferate from the pilot products and packages according to planned timeline
• Full responsible on support NPI business process with process TRA, POS, PFMEA/QCP, risk mitigation and documentations.
• Deliver BIC yield and cost on product NPI with integration of DFx BIC package solution, process guideline and design rules.
• Collaboration with multi-functional team from NPI to LVM/HVM process transfer.
• On-time execution of NPI Customer samples and Engineering Samples build for new products and package

SME Process Owner Responsible for Continuous Improvement on Process Yield, Defect Elimination and Process Characterization

• Process owner to perform on-time detection with data analysis for process yield improvement. Lead the defect elimination and continue improvement action, with problem solving methodology, statistical analysis and integration solution decision.
• Process owner to develop process recipe for BIC UPH, conducting process characterization to define process parameters and boundary.
• Continuous develop in depth assembly process technical knowledge, well understand process capability/tolerance//spec limit/CpK, and apply key tools PFMEA/QCP/APC/FDC/Alarm on assembly processes Cz/Development/NPI.
• Global leader for cross team collaboration on network BKM, process recipe spec and recipe standardization/conversion.

Technology enablement and development – Process, Material, Equipment

• Participate and support Product Roadmap, to enable key process capability and technology development to ensure packaging solution is ready prior 1st Qual Silicon deliver.
• Frequent engagement with equipment and material supplier (at least interval of monthly or daily/weekly for process issues)
• Collaboration with Supplier and involvement Supplier Roadmap (Material/Equipment/OSAT), to understand market trends and competitor’s direction, ensure key process technology and capability enablement is in-line.
• Frequent review and participant Competitor Analysis, to understand market trends and competitor’s technology/capability boundary
• Engage and follow PDE business process (TGR, TORB, KEG interlock) for new technology qualification, alignment and safe launch

Teamwork and General expectation

• Trainer/Buddy/Mentor for new team members, build effective relationships within team and cross team (peers, counterpart)
• Regularly review data and direction with supervisor. Demonstrate sound data analysis and judgment. Present reports and findings with appropriate conclusions, recommendations and decision making.
• Develop, or coordinate development of, training materials for existing/new process
• Safety Identify and promptly report hazards, follow safety procedures and area work rules including proper PPE, lockout and chemical safety.

Requirements:

• Bachelors/ Masters in Engineering
  
• Showcase leadership experience/potential
  
• Have engaged in projects during internships
• Great teammate
  
• Showcase critical thinking
• Keen interest in Semiconductor industry
  

Performs hardware, software, semiconductor design or telecomm engineering assignments. This job mapping should be used only if the position cannot be mapped specifically to other design/development engineering jobs.

As a Senior Equipment Engineer/Equipment Engineer in the NTI, you will be expected to support R&D activities associated with rapid deployment of First-of-Kind equipment, the CIP hardware evaluations and managing on the timeline needed to deploy in current technode/next advance technode on time. Good team spirit and good collaborations working is needed with various stakeholders including (not limited to) facilities/fab support/Gas & Chemical/EHS/F4/F10/Central team etc with various equipment setup and improvement work necessitated thereof as well as to ensure extended engagement with F4 on the upcoming First-of-Kind equipment in upcoming technode. Expected to work independently with minimal direction and complete projects in a timely manner and achieve set objectives.

Responsibilities
• Install equipment and/or CIP hardware for evaluation by the process development team to enable early introduction, maturity, and adoption for current and next node of 3D NAND technology.
• Work with the Fab layout and facility team to ensure smooth and on time installation and operation of the equipment.
• Work with process development team to quantify benefits of equipment/CIP hardware.
• Develop and optimize existing equipment hardware to meet the productivity requirements of advanced 3D NAND parts.
• Participate with Boise TD equipment development peers on technology choices for the upcoming nodes and able to translate future technology needs into clear equipment requirements.
• Identify disruptive equipment early, work with manufacturing and Boise TD to identify viable evaluation path forward in manufacturing.
• Design and implement advanced equipment monitoring and control methodologies.
• Lead team or sites or suppliers on complex projects in focused meetings with end goal of maturity an equipment technology in record times for technical advantage, cost and productivity.
• Serve as a technical expert within Micron, provide advice and recommendations to senior management on improvements from equipment development. Lead and initiate innovation projects through patents/technical papers.
• Identify and resolve safety hazards; follow safety procedures including lockout, chemical safety, lifting techniques and ergonomically correct methods.

Requirements:
• A minimum of 2-3 years of experience in the semiconductor industry in the area of equipment engineer roles.
• In-depth understanding of the equipment operation, working principles, troubleshooting and tool installation procedure is a must.
• Exposure to R&D equipment transfer and ability to develop/optimize equipment hardware design is preferred.
• Communications and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property protection policy is a must.
• Self-motivated and adaptable to Micron’s fast paced, demanding and dynamic work environment; flexibility to work for extended hours, as required.
• Excellent oral and written communication skills with ability to convey the message clearly and sharply both locally and globally.
• Excellent ability to prioritize and manage multiple projects simultaneously; efficiently utilize available resources or seek peers’ and/or management help to get over the roadblocks to drive to solutions.
• Encourage and enforce safe, compliant behavior through periodic communications and the performance management process.

GJS for this position: E2 and above
Location: Fab10N
Closing Date: Until filled

As NAND Sg Process Development (PD) Program Management Engineer, you will support the Program Manager, in his collaboration work with Technology Development (TD) peers, High Volume Manufacturing (HVM) Fabs, Operations Central Teams (OCT) and other stakeholders to drive best in class performances and all critical initiatives for NAND nodes to meet program milestones.

You will play a key role in establishing and managing cost programs to meet allocated capital expenditure budget, operational expenditure cost management; and deliver node-over-node cost per gigabit (CPGB) reduction targets meeting business requirements.

You will work in a fast-paced environment with the world’s Best NAND TD team in a role that is highly Collaborative and requires a great deal of Customer Focus; continuous improvement and an Innovative growth mindset are required to achieve desired results. You will work within a Process Development organization alongside leaders and engineers from Fab functional Process Areas.

Responsibilities:

• Regular interaction with PD/PI team for MOR Updates/Tracking in close collaboration with Industrial Engineering (IE) Modeling Team.
• Drive alignment and timely delivery of results on critical projects, manage execution of TD roadmaps/strategies to meet milestones.
• Drive continuous improvement of PMI/SPC from process areas, publish roadmaps, highlight risks and mitigate.
• Prequal Expense: Work with stakeholders to drive prequal expense reduction (materials, spares etc).
• TD-University Engagements: Engage with Talent Acquisition teams to initiate/support initiatives to build strong TD talent pipelines.
• EBD Grants: Collaborate with Finance Team to comply with regular submissions and meet yearly audits.
• Additional portfolio includes Micron Voice Engagements, managing Dept budget, compliance with NMI processes, related TD audits and new scopes along the way that contribute to NAND program successes.

Successful candidates for this position will have:

• Bachelor/Masters in related Engineering fields.
• Familiar with both TD and manufacturing environment and business processes
• Extremely strong organizational and communication skills.
• Strong interpersonal skills for smooth collaboration with cross-functional teams.
• Solid communication skills for cross department alignment and providing clarity to leadership and executive teams.
• Highly motivated and adaptable to our demanding, dynamic and rapidly changing work environment.

Micron is a global leader in NAND technology, pushing the boundaries of semiconductor possibilities. As the Lead (SMTS/Sr. Mgr) of NAND CMOS Team, you will be responsible for the introduction and ramp of ALL NAND products in Singapore, and ensure that all CMOS Device aspects (time-0 and Reliability) are fulfilled with highest quality. You will ensure that all Device VDLs are monitored on a weekly basis, manage a Device Health dashboard (time0 and REL), and provide direction on device optimization/centering to ensure all downstream product requirements are fulfilled on-time.

Leader Responsibilities:

• Ensure that all CMOS VDLs meet Device Maturity Index (DMI) requirements.
• Be the Electrical-SPEC (ESPEC) gate-keeper across all NAND CMOS technologies (through process conversions), and ensure high confidence ESPEC compliance is maintained throughout.
• Manage & Maintain ESPEC spec-source and ensure that performance is compliant with PDK commit. If issues arise, work closely with Design for DTCO containment.
• Have in-depth understanding and ensure full compliance to all key business processes (ESPEC, DTCO, FMEA, DMI, etc..)
• Have in-depth understanding of circuit usage/fail modes (for every VDL), and be able to understand Live-Die vs. Param layout differences.
• Have in-depth understanding of NAND Voltage Spec (VSPEC) document, and ensure that you work with partner Produce & Quality organizations to guarantee 0 VSPEC violations through all end-2-end test methodologies (Probe, Qual flows).
• You will work closely with Device Reliability teams to enable fast reliability flows, towards establishment of continuous line monitor of REL health.
• You will engage seamlessly with the CMOS Process Integration and Device Technology Teams, and foster a One-Team culture always.
• For every Device issue, you will inculcate an FMEA-first and TCAD-first mindset, before deploying silicon solutions.
• Develop a culture of excellence, psychological safety, inclusion, and engagement.
• Continuously improve CMOS team technology approaches and business processes to meet customer needs and adapt to the changing landscape.
• Implement project management best known methods (BKMs) to coordinate activities and deliver projects on schedule.
• Drive effective multi-functional collaboration with internal customers (design, PE, etc.) and partners (integration, process, scribe, modeling, etc.).
• Negotiate and clarify roles and responsibilities with all partner organizations.
• Summarize complex problems and communicate solutions and execution plans to executive leadership.
• Maintain seamless communication between all departments and sites across organizational borders.

Qualifications:

• MS degree (required) or PhD (preferred) with 7-10+ years of DRAM and/or NAND research and development experience.
• Proven capability to deliver novel technology solutions and successfully resolve complex issues that span multiple groups.
• Proven ability to think and communicate clearly in urgent and stressful situations.
• Strong background in CMOS integration, scaling, and device physics.
• Deep knowledge of Design of Experiments (DOE) principles and analytical skills.
• Innovation track record with a proactive approach to exploring new ideas and adapting quickly to change.