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Experience: 5 years & above
* Experience IP Level & SOC Level Verification.
* Skilled in Verilog, SystemVerilog, UVM
* High Experience in defining block, Sub-System and SOC top level test plans.
* Experienced with System Verilog assertions, code and functional coverage implementation and analysis.
* Experience with one or more high speed protocols is an added advantage.
* Good interpersonal and communication skills
