Responsibilities:
- Responsible for new product startup and sustaining high volume product yield/product grade improvement
- Lead Yield/Product Grade enhancement, including monitoring, performance to plan, and drive improvement
- Perform data analysis through analysis/statistic tools, summarize, present and publish data/result to all associated groups.
- Design and run DOE to drive improvement activities.
- Drive taskforce meeting to mitigate yield loss and generate roadmap for continuous improvement process with cross functional team
- Communicated effectively with key stakeholders, able to propose strategy and make decision based on data and result.
- Collaborated with the wafer fab process/integration group to address process-related defects affecting product yield
- Collaborated with FAB/MH/PE/PYE/etc to resolve process/device/test related issues.
Requirements:
- Bachelor's/Master's Degree in Electrical/Electronic/Microelectronic/Material/Data Science or equivalent background is preferred.
- Excellent problem-solving and analytical skills.
- Proven ability to communicate effectively both written and verbal to all level.
- Proven ability in multi-tasking complex projects and driving them to completion.
- Strong teamwork skills and the ability to build strong peer relationships
- Experience in yield analysis/EFA will be added advantage in consideration.
- Good understanding of CMOS device physics is an added advantage
- Knowledge of NAND devices operations is an added advantage
- Understanding of probe test flow & test methodology including array operation, customer feature and specification is an added advantage.
- Willing to work flexible hours that overlap with different time zones, or nights and weekends if necessary.
